| /linux-5.10/drivers/staging/comedi/drivers/ |
| D | ni_mio_common.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 * Hardware driver for DAQ-STC based boards
5 * COMEDI - Linux Control and Measurement Device Interface
6 * Copyright (C) 1997-2001 David A. Schleef <ds@schleef.org>
7 * Copyright (C) 2002-2006 Frank Mori Hess <fmhess@users.sourceforge.net>
17 * 340747b.pdf AT-MIO E series Register Level Programmer Manual
19 * 340934b.pdf DAQ-STC reference manual
31 * 321791a.pdf discontinuation of at-mio-16e-10 rev. c
32 * 321808a.pdf about at-mio-16e-10 rev P
33 * 321837a.pdf discontinuation of at-mio-16de-10 rev d
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| /linux-5.10/drivers/gpio/ |
| D | gpio-brcmstb.c | 2 * Copyright (C) 2015-2017 Broadcom
71 #define GPIO_BIT(gpio) ((gpio) & (MAX_GPIO_PER_BANK - 1))
77 return bank->parent_priv; in brcmstb_gpio_gc_to_priv()
83 void __iomem *reg_base = bank->parent_priv->reg_base; in __brcmstb_gpio_get_active_irqs()
85 return bank->gc.read_reg(reg_base + GIO_STAT(bank->id)) & in __brcmstb_gpio_get_active_irqs()
86 bank->gc.read_reg(reg_base + GIO_MASK(bank->id)); in __brcmstb_gpio_get_active_irqs()
95 spin_lock_irqsave(&bank->gc.bgpio_lock, flags); in brcmstb_gpio_get_active_irqs()
97 spin_unlock_irqrestore(&bank->gc.bgpio_lock, flags); in brcmstb_gpio_get_active_irqs()
105 return hwirq - (bank->gc.base - bank->parent_priv->gpio_base); in brcmstb_gpio_hwirq_to_offset()
111 struct gpio_chip *gc = &bank->gc; in brcmstb_gpio_set_imask()
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| /linux-5.10/drivers/video/fbdev/omap2/omapfb/dss/ |
| D | dss.c | 1 // SPDX-License-Identifier: GPL-2.0-only
123 #define SR(reg) \ argument
124 dss.ctx[(DSS_##reg).idx / sizeof(u32)] = dss_read_reg(DSS_##reg)
125 #define RR(reg) \ argument
126 dss_write_reg(DSS_##reg, dss.ctx[(DSS_##reg).idx / sizeof(u32)])
267 l = FLD_MOD(l, datapairs-1, 3, 2); /* SDI_PRSEL */ in dss_sdi_init()
333 return -ETIMEDOUT; in dss_sdi_enable()
359 seq_printf(s, "- DSS -\n"); in dss_dump_clocks()
374 #define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, dss_read_reg(r)) in dss_dump_regs()
534 fckd_hw_max = dss.feat->fck_div_max; in dss_div_calc()
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| /linux-5.10/sound/aoa/core/ |
| D | gpio-feature.c | 1 // SPDX-License-Identifier: GPL-2.0-only
60 const u32 *reg; in get_gpio() local
63 *gpioptr = -1; in get_gpio()
68 /* some machines have only gpioX/extint-gpioX nodes, in get_gpio()
69 * and an audio-gpio property saying what it is ... in get_gpio()
76 audio_gpio = of_get_property(np, "audio-gpio", NULL); in get_gpio()
90 reg = of_get_property(np, "reg", NULL); in get_gpio()
91 if (!reg) { in get_gpio()
96 *gpioptr = *reg; in get_gpio()
98 /* this is a hack, usually the GPIOs 'reg' property in get_gpio()
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| /linux-5.10/arch/powerpc/boot/dts/fsl/ |
| D | p2041si-post.dtsi | 4 * Copyright 2011 - 2015 Freescale Semiconductor Inc.
14 * names of its contributors may be used to endorse or promote products
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10 0>;
41 compatible = "fsl,qman-fqd";
42 alloc-ranges = <0 0 0x10 0>;
46 compatible = "fsl,qman-pfdr";
47 alloc-ranges = <0 0 0x10 0>;
51 compatible = "fsl,p2041-elbc", "fsl,elbc", "simple-bus";
53 #address-cells = <2>;
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| D | mpc8572ds.dtsi | 2 * MPC8572DS Device Tree Source stub (no addresses or top-level ranges)
14 * names of its contributors may be used to endorse or promote products
37 #address-cells = <1>;
38 #size-cells = <1>;
39 compatible = "cfi-flash";
40 reg = <0x0 0x0 0x8000000>;
41 bank-width = <2>;
42 device-width = <1>;
45 reg = <0x0 0x03000000>;
46 label = "ramdisk-nor";
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| D | p5020si-post.dtsi | 4 * Copyright 2011 - 2015 Freescale Semiconductor Inc.
14 * names of its contributors may be used to endorse or promote products
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10000 0>;
41 compatible = "fsl,qman-fqd";
42 alloc-ranges = <0 0 0x10000 0>;
46 compatible = "fsl,qman-pfdr";
47 alloc-ranges = <0 0 0x10000 0>;
51 compatible = "fsl,p5020-elbc", "fsl,elbc", "simple-bus";
53 #address-cells = <2>;
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| D | p3041si-post.dtsi | 4 * Copyright 2011 - 2015 Freescale Semiconductor Inc.
14 * names of its contributors may be used to endorse or promote products
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10 0>;
41 compatible = "fsl,qman-fqd";
42 alloc-ranges = <0 0 0x10 0>;
46 compatible = "fsl,qman-pfdr";
47 alloc-ranges = <0 0 0x10 0>;
51 compatible = "fsl,p3041-elbc", "fsl,elbc", "simple-bus";
53 #address-cells = <2>;
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| D | p5040si-post.dtsi | 4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
14 * names of its contributors may be used to endorse or promote products
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10000 0>;
41 compatible = "fsl,qman-fqd";
42 alloc-ranges = <0 0 0x10000 0>;
46 compatible = "fsl,qman-pfdr";
47 alloc-ranges = <0 0 0x10000 0>;
51 compatible = "fsl,p5040-elbc", "fsl,elbc", "simple-bus";
53 #address-cells = <2>;
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| /linux-5.10/Documentation/devicetree/bindings/powerpc/fsl/ |
| D | dcsr.txt | 6 to change. Some of the compatible strings that contain only generic names
21 - compatible
24 Definition: Must include "fsl,dcsr" and "simple-bus".
25 The DCSR space exists in the memory-mapped bus.
27 - #address-cells
33 - #size-cells
40 - ranges
42 Value type: <prop-encoded-array>
48 #address-cells = <1>;
49 #size-cells = <1>;
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| /linux-5.10/drivers/soc/ti/ |
| D | pruss.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * PRU-ICSS platform driver for various TI SoCs
5 * Copyright (C) 2014-2020 Texas Instruments Incorporated - http://www.ti.com/
7 * Suman Anna <s-anna@ti.com>
11 #include <linux/clk-provider.h>
12 #include <linux/dma-mapping.h>
24 * struct pruss_private_data - PRUSS driver private data
45 struct device *dev = pruss->dev; in pruss_clk_mux_setup()
49 void __iomem *reg; in pruss_clk_mux_setup() local
57 return -ENODEV; in pruss_clk_mux_setup()
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| /linux-5.10/arch/arm64/boot/dts/nvidia/ |
| D | tegra194-p3668-0000.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/mfd/max77620.h>
8 compatible = "nvidia,p3668-0000", "nvidia,tegra194";
28 stdout-path = "serial0:115200n8";
35 phy-reset-gpios = <&gpio TEGRA194_MAIN_GPIO(R, 1) GPIO_ACTIVE_LOW>;
36 phy-handle = <&phy>;
37 phy-mode = "rgmii-id";
40 #address-cells = <1>;
41 #size-cells = <0>;
44 compatible = "ethernet-phy-ieee802.3-c22";
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| D | tegra194-p2888.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/mfd/max77620.h>
27 stdout-path = "serial0:115200n8";
34 phy-reset-gpios = <&gpio TEGRA194_MAIN_GPIO(G, 5) GPIO_ACTIVE_LOW>;
35 phy-handle = <&phy>;
36 phy-mode = "rgmii-id";
39 #address-cells = <1>;
40 #size-cells = <0>;
43 compatible = "ethernet-phy-ieee802.3-c22";
44 reg = <0x0>;
[all …]
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| /linux-5.10/arch/arm/boot/dts/ |
| D | tegra124-jetson-tk1.dts | 1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
7 #include "tegra124-jetson-tk1-emc.dtsi"
11 compatible = "nvidia,jetson-tk1", "nvidia,tegra124";
17 /* This order keeps the mapping DB9 connector <-> ttyS0 */
24 stdout-path = "serial0:115200n8";
28 reg = <0x0 0x80000000 0x0 0x80000000>;
34 avddio-pex-supply = <&vdd_1v05_run>;
35 dvddio-pex-supply = <&vdd_1v05_run>;
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| D | tegra114-dalmore.dts | 1 // SPDX-License-Identifier: GPL-2.0
7 /dts-v1/;
9 #include <dt-bindings/input/input.h>
23 stdout-path = "serial0:115200n8";
27 reg = <0x80000000 0x40000000>;
34 hdmi-supply = <&vdd_5v0_hdmi>;
35 vdd-supply = <&vdd_hdmi_reg>;
36 pll-supply = <&palmas_smps3_reg>;
38 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
39 nvidia,hpd-gpio =
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| /linux-5.10/Documentation/devicetree/bindings/arm/ |
| D | cpus.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
21 with updates for 32-bit and 64-bit ARM systems provided in this document.
30 - square brackets define bitfields, eg reg[7:0] value of the bitfield in
31 the reg property contained in bits 7 down to 0
42 reg:
54 Bits [11:0] in the reg cell must be set to
57 All other bits in the reg cell must be set to 0.
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| /linux-5.10/include/linux/mfd/ |
| D | sta2x11-mfd.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (c) 2009-2011 Wind River Systems, Inc.
28 #define STA2X11_MFD_SCTL_NAME "sta2x11-sctl"
29 #define STA2X11_MFD_GPIO_NAME "sta2x11-gpio"
30 #define STA2X11_MFD_SCR_NAME "sta2x11-scr"
31 #define STA2X11_MFD_TIME_NAME "sta2x11-time"
32 #define STA2X11_MFD_APBREG_NAME "sta2x11-apbreg"
33 #define STA2X11_MFD_APB_SOC_REGS_NAME "sta2x11-apb-soc-regs"
34 #define STA2X11_MFD_VIC_NAME "sta2x11-vic"
47 /* Pinconfig is set by the board definition: altfunc, pull-up, pull-down */
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| /linux-5.10/drivers/media/platform/vsp1/ |
| D | vsp1_uif.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 * vsp1_uif.c -- R-Car VSP1 User Logic Interface
5 * Copyright (C) 2017-2018 Laurent Pinchart
14 #include <media/media-entity.h>
15 #include <media/v4l2-subdev.h>
25 /* -----------------------------------------------------------------------------
29 static inline u32 vsp1_uif_read(struct vsp1_uif *uif, u32 reg) in vsp1_uif_read() argument
31 return vsp1_read(uif->entity.vsp1, in vsp1_uif_read()
32 uif->entity.index * VI6_UIF_OFFSET + reg); in vsp1_uif_read()
36 struct vsp1_dl_body *dlb, u32 reg, u32 data) in vsp1_uif_write() argument
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| /linux-5.10/arch/arm64/boot/dts/freescale/ |
| D | imx8mn-ddr4-evk.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
9 #include "imx8mn-evk.dtsi"
13 compatible = "fsl,imx8mn-ddr4-evk", "fsl,imx8mn";
17 cpu-supply = <&buck2_reg>;
21 cpu-supply = <&buck2_reg>;
25 cpu-supply = <&buck2_reg>;
29 cpu-supply = <&buck2_reg>;
33 operating-points-v2 = <&ddrc_opp_table>;
35 ddrc_opp_table: opp-table {
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| /linux-5.10/arch/mips/include/asm/ |
| D | mipsregs.h | 19 #include <asm/isa-rev.h>
45 * Coprocessor 0 register names
101 * R4640/R4650 cp0 register names. These registers are listed
115 * Coprocessor 0 Set 1 register names
122 * Coprocessor 0 Set 2 register names
127 * Coprocessor 0 Set 3 register names
152 #define MIPS_ENTRYLO_XI (_ULCAST_(1) << (BITS_PER_LONG - 2))
153 #define MIPS_ENTRYLO_RI (_ULCAST_(1) << (BITS_PER_LONG - 1))
392 /* in-kernel enabled CUs */
470 #define EXCCODE_TLBRI 19 /* TLB Read-Inhibit exception */
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| /linux-5.10/Documentation/devicetree/bindings/pinctrl/ |
| D | img,pistachio-pinctrl.txt | 8 each. The GPIO banks are represented as sub-nodes of the pad controller node.
10 Please refer to pinctrl-bindings.txt, ../gpio/gpio.txt, and
11 ../interrupt-controller/interrupts.txt for generic information regarding
15 --------------------------------------------
16 - compatible: "img,pistachio-system-pinctrl".
17 - reg: Address range of the pinctrl registers.
19 Required properties for GPIO bank sub-nodes:
20 --------------------------------------------
21 - interrupts: Interrupt line for the GPIO bank.
22 - gpio-controller: Indicates the device is a GPIO controller.
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| /linux-5.10/Documentation/devicetree/bindings/pci/ |
| D | faraday,ftpci100.txt | 14 - compatible: ranging from specific to generic, should be one of
15 "cortina,gemini-pci", "faraday,ftpci100"
16 "cortina,gemini-pci-dual", "faraday,ftpci100-dual"
18 "faraday,ftpci100-dual"
19 - reg: memory base and size for the host bridge
20 - #address-cells: set to <3>
21 - #size-cells: set to <2>
22 - #interrupt-cells: set to <1>
23 - bus-range: set to <0x00 0xff>
24 - device_type, set to "pci"
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| /linux-5.10/drivers/soc/fsl/qbman/ |
| D | bman_portal.c | 1 /* Copyright 2008 - 2016 Freescale Semiconductor, Inc.
11 * names of its contributors may be used to endorse or promote products
44 dev_crit(pcfg->dev, "%s: Portal failure on cpu %d\n", in init_pcfg()
45 __func__, pcfg->cpu); in init_pcfg()
50 affine_bportals[pcfg->cpu] = p; in init_pcfg()
52 dev_info(pcfg->dev, "Portal initialised, cpu %d\n", pcfg->cpu); in init_pcfg()
71 irq_set_affinity(pcfg->irq, cpumask_of(cpu)); in bman_offline_cpu()
87 irq_set_affinity(pcfg->irq, cpumask_of(cpu)); in bman_online_cpu()
99 struct device *dev = &pdev->dev; in bman_portal_probe()
100 struct device_node *node = dev->of_node; in bman_portal_probe()
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| /linux-5.10/drivers/input/touchscreen/ |
| D | chipone_icn8505.c | 1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (c) 2015-2018 Red Hat Inc.
97 buf[i] = (reg_addr >> (reg_addr_width - (i + 1) * 8)) & 0xff; in icn8505_read_xfer()
99 ret = i2c_transfer(client->adapter, msg, 2); in icn8505_read_xfer()
102 ret = -EIO; in icn8505_read_xfer()
104 dev_err(&client->dev, in icn8505_read_xfer()
105 "Error reading addr %#x reg %#x: %d\n", in icn8505_read_xfer()
117 u8 buf[3 + 32]; /* 3 bytes for 24 bit reg-addr + 32 bytes max len */ in icn8505_write_xfer()
126 return -EINVAL; in icn8505_write_xfer()
129 buf[i] = (reg_addr >> (reg_addr_width - (i + 1) * 8)) & 0xff; in icn8505_write_xfer()
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| /linux-5.10/drivers/clk/ |
| D | clk-si570.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * Copyright (C) 2011 - 2013 Xilinx Inc.
14 #include <linux/clk-provider.h>
85 * si570_get_divs() - Read clock dividers from HW
98 u8 reg[6]; in si570_get_divs() local
101 err = regmap_bulk_read(data->regmap, SI570_REG_HS_N1 + data->div_offset, in si570_get_divs()
102 reg, ARRAY_SIZE(reg)); in si570_get_divs()
106 *hs_div = ((reg[0] & HS_DIV_MASK) >> HS_DIV_SHIFT) + HS_DIV_OFFSET; in si570_get_divs()
107 *n1 = ((reg[0] & N1_6_2_MASK) << 2) + ((reg[1] & N1_1_0_MASK) >> 6) + 1; in si570_get_divs()
112 tmp = reg[1] & RFREQ_37_32_MASK; in si570_get_divs()
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