dts/fsl/mpc8572ds.dtsi

2  * MPC8572DS Device Tree Source stub (no addresses or top-level ranges)
14  *       names of its contributors may be used to endorse or promote products
37 		#address-cells = <1>;
38 		#size-cells = <1>;
39 		compatible = "cfi-flash";
40 		reg = <0x0 0x0 0x8000000>;
41 		bank-width = <2>;
42 		device-width = <1>;
45 			reg = <0x0 0x03000000>;
46 			label = "ramdisk-nor";
50 			reg = <0x03000000 0x00e00000>;
51 			label = "diagnostic-nor";
52 			read-only;
56 			reg = <0x03e00000 0x00200000>;
57 			label = "dink-nor";
58 			read-only;
62 			reg = <0x04000000 0x00400000>;
63 			label = "kernel-nor";
67 			reg = <0x04400000 0x03b00000>;
68 			label = "fs-nor";
72 			reg = <0x07f00000 0x00060000>;
73 			label = "dtb-nor";
77 			reg = <0x07f60000 0x00020000>;
78 			label = "env-nor";
79 			read-only;
83 			reg = <0x07f80000 0x00080000>;
84 			label = "u-boot-nor";
85 			read-only;
90 		#address-cells = <1>;
91 		#size-cells = <1>;
92 		compatible = "fsl,mpc8572-fcm-nand",
93 			     "fsl,elbc-fcm-nand";
94 		reg = <0x2 0x0 0x40000>;
97 			reg = <0x0 0x02000000>;
98 			label = "u-boot-nand";
99 			read-only;
103 			reg = <0x02000000 0x10000000>;
104 			label = "fs-nand";
108 			reg = <0x12000000 0x08000000>;
109 			label = "ramdisk-nand";
113 			reg = <0x1a000000 0x04000000>;
114 			label = "kernel-nand";
118 			reg = <0x1e000000 0x01000000>;
119 			label = "dtb-nand";
123 			reg = <0x1f000000 0x21000000>;
124 			label = "empty-nand";
129 		compatible = "fsl,mpc8572-fcm-nand",
130 			     "fsl,elbc-fcm-nand";
131 		reg = <0x4 0x0 0x40000>;
135 		compatible = "fsl,mpc8572-fcm-nand",
136 			     "fsl,elbc-fcm-nand";
137 		reg = <0x5 0x0 0x40000>;
141 		compatible = "fsl,mpc8572-fcm-nand",
142 			     "fsl,elbc-fcm-nand";
143 		reg = <0x6 0x0 0x40000>;
149 		tbi-handle = <&tbi0>;
150 		phy-handle = <&phy0>;
151 		phy-connection-type = "rgmii-id";
155 		phy0: ethernet-phy@0 {
157 			reg = <0x0>;
159 		phy1: ethernet-phy@1 {
161 			reg = <0x1>;
163 		phy2: ethernet-phy@2 {
165 			reg = <0x2>;
167 		phy3: ethernet-phy@3 {
169 			reg = <0x3>;
172 		sgmii_phy0: sgmii-phy@0 {
174 			reg = <0x1c>;
176 		sgmii_phy1: sgmii-phy@1 {
178 			reg = <0x1d>;
180 		sgmii_phy2: sgmii-phy@2 {
182 			reg = <0x1e>;
184 		sgmii_phy3: sgmii-phy@3 {
186 			reg = <0x1f>;
189 		tbi0: tbi-phy@11 {
190 			reg = <0x11>;
191 			device_type = "tbi-phy";
196 		fsl,tclk-period = <5>;
197 		fsl,tmr-prsc = <200>;
198 		fsl,tmr-add = <0xAAAAAAAB>;
199 		fsl,tmr-fiper1 = <0x3B9AC9FB>;
200 		fsl,tmr-fiper2 = <0x3B9AC9FB>;
201 		fsl,max-adj = <499999999>;
205 		tbi-handle = <&tbi1>;
206 		phy-handle = <&phy1>;
207 		phy-connection-type = "rgmii-id";
212 		tbi1: tbi-phy@11 {
213 			reg = <0x11>;
214 			device_type = "tbi-phy";
219 		tbi-handle = <&tbi2>;
220 		phy-handle = <&phy2>;
221 		phy-connection-type = "rgmii-id";
225 		tbi2: tbi-phy@11 {
226 			reg = <0x11>;
227 			device_type = "tbi-phy";
232 		tbi-handle = <&tbi3>;
233 		phy-handle = <&phy3>;
234 		phy-connection-type = "rgmii-id";
238 		tbi3: tbi-phy@11 {
239 			reg = <0x11>;
240 			device_type = "tbi-phy";
247 		interrupt-map-mask = <0xff00 0x0 0x0 0x7>;
248 		interrupt-map = <
249 			/* IDSEL 0x11 func 0 - PCI slot 1 */
255 			/* IDSEL 0x11 func 1 - PCI slot 1 */
261 			/* IDSEL 0x11 func 2 - PCI slot 1 */
267 			/* IDSEL 0x11 func 3 - PCI slot 1 */
273 			/* IDSEL 0x11 func 4 - PCI slot 1 */
279 			/* IDSEL 0x11 func 5 - PCI slot 1 */
285 			/* IDSEL 0x11 func 6 - PCI slot 1 */
291 			/* IDSEL 0x11 func 7 - PCI slot 1 */
297 			/* IDSEL 0x12 func 0 - PCI slot 2 */
303 			/* IDSEL 0x12 func 1 - PCI slot 2 */
309 			/* IDSEL 0x12 func 2 - PCI slot 2 */
315 			/* IDSEL 0x12 func 3 - PCI slot 2 */
321 			/* IDSEL 0x12 func 4 - PCI slot 2 */
327 			/* IDSEL 0x12 func 5 - PCI slot 2 */
333 			/* IDSEL 0x12 func 6 - PCI slot 2 */
339 			/* IDSEL 0x12 func 7 - PCI slot 2 */
365 			reg = <0x0 0x0 0x0 0x0 0x0>;
366 			#size-cells = <2>;
367 			#address-cells = <3>;
377 				#interrupt-cells = <2>;
378 				#size-cells = <1>;
379 				#address-cells = <2>;
380 				reg = <0xf000 0x0 0x0 0x0 0x0>;
383 				interrupt-parent = <&i8259>;
385 				i8259: interrupt-controller@20 {
386 					reg = <0x1 0x20 0x2
389 					interrupt-controller;
390 					device_type = "interrupt-controller";
391 					#address-cells = <0>;
392 					#interrupt-cells = <2>;
395 					interrupt-parent = <&mpic>;
399 					#size-cells = <0>;
400 					#address-cells = <1>;
401 					reg = <0x1 0x60 0x1 0x1 0x64 0x1>;
403 					interrupt-parent =
407 						reg = <0x0>;
412 						reg = <0x1>;
419 					reg = <0x1 0x70 0x2>;
423 					reg = <0x1 0x400 0x80>;