/linux-5.10/arch/powerpc/boot/dts/fsl/ |
D | p1022ds_32b.dts | 2 * P1022 DS 32-bit Physical Address Map Device Tree Source 14 * names of its contributors may be used to endorse or promote products 35 /include/ "p1022si-pre.dtsi" 49 reg = <0x0 0xffe05000 0 0x1000>; 59 reg = <0x0 0xffe09000 0 0x1000>; 74 reg = <0 0xffe0a000 0 0x1000>; 89 reg = <0 0xffe0b000 0 0x1000>; 102 /include/ "p1022si-post.dtsi"
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D | pq3-etsec1-1.dtsi | 4 * Copyright 2011-2012 Freescale Semiconductor Inc. 14 * names of its contributors may be used to endorse or promote products 36 #address-cells = <1>; 37 #size-cells = <1>; 38 cell-index = <1>; 42 reg = <0x25000 0x1000>; 44 fsl,magic-packet; 45 local-mac-address = [ 00 00 00 00 00 00 ]; 50 #address-cells = <1>; 51 #size-cells = <0>; [all …]
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D | bsc9132si-pre.dtsi | 14 * names of its contributors may be used to endorse or promote products 35 /dts-v1/; 40 #address-cells = <2>; 41 #size-cells = <2>; 42 interrupt-parent = <&mpic>; 52 #address-cells = <1>; 53 #size-cells = <0>; 57 reg = <0x0>; 58 next-level-cache = <&L2>; 63 reg = <0x1>; [all …]
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D | pq3-etsec1-2.dtsi | 4 * Copyright 2011-2012 Freescale Semiconductor Inc. 14 * names of its contributors may be used to endorse or promote products 36 #address-cells = <1>; 37 #size-cells = <1>; 38 cell-index = <2>; 42 reg = <0x26000 0x1000>; 44 fsl,magic-packet; 45 local-mac-address = [ 00 00 00 00 00 00 ]; 50 #address-cells = <1>; 51 #size-cells = <0>; [all …]
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D | pq3-etsec1-3.dtsi | 4 * Copyright 2011-2012 Freescale Semiconductor Inc. 14 * names of its contributors may be used to endorse or promote products 36 #address-cells = <1>; 37 #size-cells = <1>; 38 cell-index = <3>; 42 reg = <0x27000 0x1000>; 44 fsl,magic-packet; 45 local-mac-address = [ 00 00 00 00 00 00 ]; 50 #address-cells = <1>; 51 #size-cells = <0>; [all …]
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D | pq3-etsec1-0.dtsi | 4 * Copyright 2011-2012 Freescale Semiconductor Inc. 14 * names of its contributors may be used to endorse or promote products 36 #address-cells = <1>; 37 #size-cells = <1>; 38 cell-index = <0>; 42 reg = <0x24000 0x1000>; 44 fsl,magic-packet; 45 local-mac-address = [ 00 00 00 00 00 00 ]; 50 #address-cells = <1>; 51 #size-cells = <0>; [all …]
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D | mpc8536ds.dtsi | 2 * MPC8536DS Device Tree Source stub (no addresses or top-level ranges) 14 * names of its contributors may be used to endorse or promote products 37 #address-cells = <1>; 38 #size-cells = <1>; 39 compatible = "cfi-flash"; 40 reg = <0x0 0x0 0x8000000>; 41 bank-width = <2>; 42 device-width = <1>; 45 reg = <0x0 0x03000000>; 46 label = "ramdisk-nor"; [all …]
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/linux-5.10/arch/arm/boot/dts/ |
D | gemini-wbd222.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree file for Wiliboard WBD-222 6 /dts-v1/; 9 #include <dt-bindings/input/input.h> 12 model = "Wiliboard WBD-222"; 14 #address-cells = <1>; 15 #size-cells = <1>; 19 reg = <0x00000000 0x8000000>; 24 stdout-path = &uart0; 28 compatible = "gpio-keys"; [all …]
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D | sun8i-r16-bananapi-m2m.dts | 2 * Copyright (c) 2017 Free Electrons <maxime.ripard@free-electrons.com> 4 * This file is dual-licensed: you can use it either under the terms 43 /dts-v1/; 44 #include "sun8i-a33.dtsi" 46 #include <dt-bindings/gpio/gpio.h> 50 compatible = "sinovoip,bananapi-m2m", "allwinner,sun8i-a33"; 61 stdout-path = "serial0:115200n8"; 65 compatible = "gpio-leds"; 68 label = "bpi-m2m:blue:usr"; 73 label = "bpi-m2m:green:usr"; [all …]
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D | qcom-apq8064-ifc6410.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 #include "qcom-apq8064-v2.0.dtsi" 3 #include <dt-bindings/gpio/gpio.h> 4 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 8 compatible = "qcom,apq8064-ifc6410", "qcom,apq8064"; 21 stdout-path = "serial0:115200n8"; 25 compatible = "simple-bus"; 28 pinctrl-names = "default"; 29 pinctrl-0 = <&wlan_default_gpios>; 30 compatible = "mmc-pwrseq-simple"; [all …]
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D | bcm47094-linksys-panamera.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 6 /dts-v1/; 9 #include "bcm5301x-nand-cs0-bch8.dtsi" 21 reg = <0x00000000 0x08000000 25 gpio-keys { 26 compatible = "gpio-keys"; 48 compatible = "gpio-leds"; 58 trigger-sources = <&ohci_port2>, <&ehci_port2>; 59 linux,default-trigger = "usbport"; 65 trigger-sources = <&ohci_port1>, <&ehci_port1>, [all …]
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D | ox810se-wd-mbwe.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * wd-mbwe.dtsi - Device tree file for Western Digital My Book World Edition 8 /dts-v1/; 22 reg = <0x48000000 0x8000000>; 31 gpio-keys-polled { 32 compatible = "gpio-keys-polled"; 33 #address-cells = <1>; 34 #size-cells = <0>; 35 poll-interval = <100>; 51 compatible = "gpio-leds"; [all …]
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D | kirkwood-dir665.dts | 1 // SPDX-License-Identifier: GPL-2.0 7 /dts-v1/; 10 #include "kirkwood-6281.dtsi" 13 model = "D-Link DIR-665"; 14 compatible = "dlink,dir-665", "marvell,kirkwood-88f6281", "marvell,kirkwood"; 18 reg = <0x00000000 0x8000000>; /* 128 MB */ 23 stdout-path = &uart0; 27 pinctrl: pin-controller@10000 { 28 pinctrl-0 =< &pmx_led_usb 35 pinctrl-names = "default"; [all …]
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/linux-5.10/arch/arm64/boot/dts/xilinx/ |
D | zynqmp-zcu111-revA.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 5 * (C) Copyright 2017 - 2019, Xilinx, Inc. 10 /dts-v1/; 13 #include "zynqmp-clk-ccf.dtsi" 14 #include <dt-bindings/input/input.h> 15 #include <dt-bindings/gpio/gpio.h> 19 compatible = "xlnx,zynqmp-zcu111-revA", "xlnx,zynqmp-zcu111", "xlnx,zynqmp"; 33 stdout-path = "serial0:115200n8"; 38 reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>; 42 gpio-keys { [all …]
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/linux-5.10/Documentation/devicetree/bindings/mmc/ |
D | img-dw-mshc.txt | 7 by synopsys-dw-mshc.txt and the properties used by the Imagination specific 13 - "img,pistachio-dw-mshc": for Pistachio SoCs 18 compatible = "img,pistachio-dw-mshc"; 19 reg = <0x18142000 0x400>; 23 clock-names = "biu", "ciu"; 25 fifo-depth = <0x20>; 26 bus-width = <4>; 27 disable-wp;
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D | ti-omap.txt | 13 - compatible: Must be "ti,omap2420-mmc", for OMAP2420 controllers 14 - ti,hwmods: For 2420, must be "msdi<n>", where n is controller 20 compatible = "ti,omap2420-mmc"; 22 reg = <0x4809c000 0x80>; 25 dma-names = "tx", "rx";
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/linux-5.10/arch/arm64/boot/dts/rockchip/ |
D | rk3399-rockpro64.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 /dts-v1/; 9 #include "rk3399-rockpro64.dtsi" 13 compatible = "pine64,rockpro64-v2.1", "pine64,rockpro64", "rockchip,rk3399"; 19 reg = <0x11>; 21 clock-names = "mclk"; 22 #sound-dai-cells = <0>; 26 remote-endpoint = <&i2s1_p0_0>;
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D | rk3399-rockpro64-v2.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 /dts-v1/; 9 #include "rk3399-rockpro64.dtsi" 13 compatible = "pine64,rockpro64-v2.0", "pine64,rockpro64", "rockchip,rk3399"; 19 reg = <0x10>; 21 clock-names = "mclk"; 22 #sound-dai-cells = <0>; 26 remote-endpoint = <&i2s1_p0_0>;
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/linux-5.10/Documentation/devicetree/bindings/mfd/ |
D | act8945a.txt | 1 Device-Tree bindings for Active-semi ACT8945A MFD driver 4 - compatible: "active-semi,act8945a". 5 - reg: the I2C slave address for the ACT8945A chip 8 - a regulators: see ../regulator/act8945a-regulator.txt 9 - a charger: see ../power/act8945a-charger.txt 13 compatible = "active-semi,act8945a"; 14 reg = <0x5b>; 16 active-semi,vsel-high; 20 regulator-name = "VDD_1V35"; 21 regulator-min-microvolt = <1350000>; [all …]
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/linux-5.10/arch/arm64/boot/dts/renesas/ |
D | aistarvision-mipi-adapter-2.1.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 10 compatible = "regulator-fixed"; 11 regulator-name = "camera_vdddo"; 12 regulator-min-microvolt = <1800000>; 13 regulator-max-microvolt = <1800000>; 14 regulator-always-on; 18 compatible = "regulator-fixed"; 19 regulator-name = "camera_vdda"; 20 regulator-min-microvolt = <2800000>; 21 regulator-max-microvolt = <2800000>; [all …]
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/linux-5.10/Documentation/devicetree/bindings/regulator/ |
D | slg51000.txt | 4 - compatible : Should be "dlg,slg51000" for SLG51000 5 - reg : Specifies the I2C slave address. 6 - xxx-supply: Input voltage supply regulator for ldo3 to ldo7. 9 If some of input supply is powered through battery or always-on supply then 12 vin3-supply: Input supply for ldo3 13 vin4-supply: Input supply for ldo4 14 vin5-supply: Input supply for ldo5 15 vin6-supply: Input supply for ldo6 16 vin7-supply: Input supply for ldo7 19 - interrupt-parent : Specifies the reference to the interrupt controller. [all …]
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/linux-5.10/Documentation/devicetree/bindings/net/nfc/ |
D | nfcmrvl.txt | 4 - compatible: Should be: 5 - "marvell,nfc-uart" or "mrvl,nfc-uart" for UART devices 6 - "marvell,nfc-i2c" for I2C devices 7 - "marvell,nfc-spi" for SPI devices 10 - pinctrl-names: Contains only one value - "default". 11 - pintctrl-0: Specifies the pin control groups used for this controller. 12 - reset-n-io: Output GPIO pin used to reset the chip (active low). 13 - hci-muxed: Specifies that the chip is muxing NCI over HCI frames. 15 Optional UART-based chip specific properties: 16 - flow-control: Specifies that the chip is using RTS/CTS. [all …]
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/linux-5.10/Documentation/devicetree/bindings/sound/ |
D | rt5640.txt | 7 - compatible : One of "realtek,rt5640" or "realtek,rt5639". 9 - reg : The I2C address of the device. 11 - interrupts : The CODEC's interrupt output. 15 - clocks: The phandle of the master clock to the CODEC 16 - clock-names: Should be "mclk" 18 - realtek,in1-differential 19 - realtek,in2-differential 20 - realtek,in3-differential 21 Boolean. Indicate MIC1/2/3 input are differential, rather than single-ended. 23 - realtek,ldo1-en-gpios : The GPIO that controls the CODEC's LDO1_EN pin. [all …]
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/linux-5.10/Documentation/devicetree/bindings/pinctrl/ |
D | rockchip,pinctrl.txt | 8 Please refer to pinctrl-bindings.txt in this directory for details of the 16 settings such as pull-up, etc. 19 defined as gpio sub-nodes of the pinmux controller. 22 - compatible: should be 23 "rockchip,px30-pinctrl": for Rockchip PX30 24 "rockchip,rv1108-pinctrl": for Rockchip RV1108 25 "rockchip,rk2928-pinctrl": for Rockchip RK2928 26 "rockchip,rk3066a-pinctrl": for Rockchip RK3066a 27 "rockchip,rk3066b-pinctrl": for Rockchip RK3066b 28 "rockchip,rk3128-pinctrl": for Rockchip RK3128 [all …]
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/linux-5.10/drivers/clk/sunxi/ |
D | clk-sun9i-cpus.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (C) 2015 Chen-Yu Tsai 5 * Chen-Yu Tsai <wens@csie.org> 12 #include <linux/clk-provider.h> 22 * sun9i_a80_cpus_clk_setup() - Setup function for a80 cpus composite clk 29 #define SUN9I_CPUS_MUX_GET_PARENT(reg) ((reg & SUN9I_CPUS_MUX_MASK) >> \ argument 34 #define SUN9I_CPUS_DIV_GET(reg) ((reg & SUN9I_CPUS_DIV_MASK) >> \ argument 36 #define SUN9I_CPUS_DIV_SET(reg, div) ((reg & ~SUN9I_CPUS_DIV_MASK) | \ argument 40 #define SUN9I_CPUS_PLL4_DIV_GET(reg) ((reg & SUN9I_CPUS_PLL4_DIV_MASK) >> \ argument 42 #define SUN9I_CPUS_PLL4_DIV_SET(reg, div) ((reg & ~SUN9I_CPUS_PLL4_DIV_MASK) | \ argument [all …]
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