Searched +full:reg +full:- +full:names (Results 2901 – 2925 of 5072) sorted by relevance
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/linux-6.15/Documentation/devicetree/bindings/net/pse-pd/ |
D | ti,tps23881.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/net/pse-pd/ti,tps23881.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Kory Maincent <kory.maincent@bootlin.com> 13 - $ref: pse-controller.yaml# 18 - ti,tps23881 20 reg: 23 '#pse-cells': 26 reset-gpios: [all …]
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/linux-6.15/arch/arm64/boot/dts/apple/ |
D | t8010.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT 5 * Other names: H9P, "Cayman" 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/interrupt-controller/apple-aic.h> 12 #include <dt-bindings/interrupt-controller/irq.h> 13 #include <dt-bindings/pinctrl/apple.h> 16 interrupt-parent = <&aic>; 17 #address-cells = <2>; 18 #size-cells = <2>; 20 clkref: clock-ref { [all …]
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/linux-6.15/arch/arm/boot/dts/allwinner/ |
D | sun7i-a20-cubietruck.dts | 6 * This file is dual-licensed: you can use it either under the terms 45 /dts-v1/; 46 #include "sun7i-a20.dtsi" 47 #include "sunxi-common-regulators.dtsi" 49 #include <dt-bindings/gpio/gpio.h> 50 #include <dt-bindings/interrupt-controller/irq.h> 54 compatible = "cubietech,cubietruck", "allwinner,sun7i-a20"; 61 stdout-path = "serial0:115200n8"; 64 hdmi-connector { 65 compatible = "hdmi-connector"; [all …]
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/linux-6.15/arch/arm64/boot/dts/freescale/ |
D | imx93-kontron-osm-s.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 6 #include <dt-bindings/interrupt-controller/irq.h> 10 model = "Kontron OSM-S i.MX93"; 11 compatible = "kontron,imx93-osm-s", "fsl,imx93"; 20 reg = <0x0 0x40000000 0 0x80000000>; 24 stdout-path = &lpuart1; 27 reg_usdhc2_vcc: regulator-usdhc2-vcc { 28 compatible = "regulator-fixed"; 29 pinctrl-names = "default"; 30 pinctrl-0 = <&pinctrl_reg_usdhc2_vcc>; [all …]
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/linux-6.15/arch/arm/boot/dts/nxp/imx/ |
D | imx7-colibri.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 3 * Copyright 2016-2022 Toradex 6 #include <dt-bindings/pwm/pwm.h> 15 brightness-levels = <0 45 63 88 119 158 203 255>; 16 compatible = "pwm-backlight"; 17 default-brightness-level = <4>; 18 enable-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; 19 pinctrl-names = "default"; 20 pinctrl-0 = <&pinctrl_gpio_bl_on>; 21 power-supply = <®_module_3v3>; [all …]
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/linux-6.15/Documentation/devicetree/bindings/memory-controllers/ |
D | renesas,rpc-if.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/memory-controllers/renesas,rpc-if.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Renesas Reduced Pin Count Interface (RPC-IF) 10 - Sergei Shtylyov <sergei.shtylyov@gmail.com> 13 Renesas RPC-IF allows a SPI flash or HyperFlash connected to the SoC to 16 The flash chip itself should be represented by a subnode of the RPC-IF node. 19 - if it contains "jedec,spi-nor", then SPI is used; 20 - if it contains "cfi-flash", then HyperFlash is used. [all …]
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/linux-6.15/arch/arm64/boot/dts/marvell/ |
D | cn9130-cf-base.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright (C) 2024 Josua Mayer <josua@solid-run.com> 9 /dts-v1/; 11 #include <dt-bindings/input/input.h> 12 #include <dt-bindings/leds/common.h> 15 #include "cn9130-sr-som.dtsi" 16 #include "cn9130-cf.dtsi" 20 compatible = "solidrun,cn9130-clearfog-base", 21 "solidrun,cn9130-sr-som", "marvell,cn9130"; 23 gpio-keys { [all …]
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/linux-6.15/Documentation/devicetree/bindings/phy/ |
D | intel,lgm-emmc-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/intel,lgm-emmc-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> 19 - compatible: Should be one of the following: 20 "intel,lgm-syscon", "syscon" 21 - reg: 27 - intel,lgm-emmc-phy 28 - intel,keembay-emmc-phy [all …]
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D | mixel,mipi-dsi-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/mixel,mipi-dsi-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Guido Günther <agx@sigxcpu.org> 13 The Mixel MIPI-DSI PHY IP block is e.g. found on i.MX8 platforms (along the 14 MIPI-DSI IP from Northwest Logic). It represents the physical layer for the 18 in either MIPI-DSI PHY mode or LVDS PHY mode. 23 - fsl,imx8mq-mipi-dphy 24 - fsl,imx8qxp-mipi-dphy [all …]
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/linux-6.15/Documentation/devicetree/bindings/clock/ |
D | moxa,moxart-clock.txt | 1 Device Tree Clock bindings for arch-moxart 5 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt 14 - compatible : Must be "moxa,moxart-pll-clock" 15 - #clock-cells : Should be 0 16 - reg : Should contain registers location and length 17 - clocks : Should contain phandle + clock-specifier for the parent clock 20 - clock-output-names : Should contain clock name 26 - compatible : Must be "moxa,moxart-apb-clock" 27 - #clock-cells : Should be 0 28 - reg : Should contain registers location and length [all …]
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D | renesas,cpg-mstp-clocks.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/renesas,cpg-mstp-clocks.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Geert Uytterhoeven <geert+renesas@glider.be> 23 - enum: 24 - renesas,r7s72100-mstp-clocks # RZ/A1 25 - renesas,r8a73a4-mstp-clocks # R-Mobile APE6 26 - renesas,r8a7740-mstp-clocks # R-Mobile A1 27 - renesas,r8a7778-mstp-clocks # R-Car M1 [all …]
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D | microchip,mpfs-ccc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/microchip,mpfs-ccc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Conor Dooley <conor.dooley@microchip.com> 16 https://onlinedocs.microchip.com/pr/GUID-8F0CC4C0-0317-4262-89CA-CE7773ED1931-en-US-1/index.html 20 const: microchip,mpfs-ccc 22 reg: 24 - description: PLL0's control registers 25 - description: PLL1's control registers [all …]
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D | qcom,ipq9574-cmn-pll.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,ipq9574-cmn-pll.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bjorn Andersson <andersson@kernel.org> 11 - Luo Jie <quic_luoj@quicinc.com> 15 input clock. This reference clock is from the on-board Wi-Fi. 27 - qcom,ipq9574-cmn-pll 29 reg: 34 - description: The reference clock. The supported clock rates include [all …]
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/linux-6.15/arch/arm/boot/dts/marvell/ |
D | kirkwood-b3.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 8 * Note: This requires a new'ish version of u-boot, which disables the 9 * L2 cache. If your B3 silently fails to boot, u-boot is probably too 12 * https://lists.debian.org/debian-arm/2012/08/msg00128.html 15 /dts-v1/; 18 #include "kirkwood-6281.dtsi" 22 compatible = "excito,b3", "marvell,kirkwood-88f6281", "marvell,kirkwood"; 25 reg = <0x00000000 0x20000000>; 30 stdout-path = &uart0; 34 pinctrl: pin-controller@10000 { [all …]
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/linux-6.15/arch/arm/boot/dts/microchip/ |
D | at91-sama5d27_som1_ek.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * at91-sama5d27_som1_ek.dts - Device Tree file for SAMA5D27-SOM1-EK board 10 /dts-v1/; 11 #include "at91-sama5d27_som1.dtsi" 12 #include <dt-bindings/mfd/atmel-flexcom.h> 13 #include <dt-bindings/gpio/gpio.h> 14 #include <dt-bindings/input/input.h> 18 …compatible = "atmel,sama5d27-som1-ek", "atmel,sama5d27-som1", "atmel,sama5d27", "atmel,sama5d2", "… 29 stdout-path = "serial0:115200n8"; 34 atmel,vbus-gpio = <&pioA PIN_PD20 GPIO_ACTIVE_HIGH>; [all …]
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/linux-6.15/Documentation/devicetree/bindings/net/can/ |
D | ti_hecc.txt | 8 - compatible: "ti,am3517-hecc" 9 - reg: addresses and lengths of the register spaces for 'hecc', 'hecc-ram' 11 - reg-names :"hecc", "hecc-ram", "mbx" 12 - interrupts: interrupt mapping for the hecc interrupts sources 13 - clocks: clock phandles (see clock bindings for details) 16 - ti,use-hecc1int: if provided configures HECC to produce all interrupts 19 - xceiver-supply: regulator that powers the CAN transceiver 25 compatible = "ti,am3517-hecc"; 26 reg = <0x5c050000 0x80>, 29 reg-names = "hecc", "hecc-ram", "mbx";
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/linux-6.15/Documentation/devicetree/bindings/media/i2c/ |
D | ti,ds90ub960.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Texas Instruments DS90UB9XX Family FPD-Link Deserializer Hubs 10 - Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> 13 The TI DS90UB9XX devices are FPD-Link video deserializers with I2C and GPIO 17 - $ref: /schemas/i2c/i2c-atr.yaml# 22 - ti,ds90ub960-q1 23 - ti,ds90ub9702-q1 25 reg: [all …]
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/linux-6.15/Documentation/devicetree/bindings/media/ |
D | allwinner,sun4i-a10-video-engine.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/media/allwinner,sun4i-a10-video-engine.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 16 - allwinner,sun4i-a10-video-engine 17 - allwinner,sun5i-a13-video-engine 18 - allwinner,sun7i-a20-video-engine 19 - allwinner,sun8i-a33-video-engine [all …]
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/linux-6.15/Documentation/devicetree/bindings/pwm/ |
D | pwm-rockchip.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/pwm/pwm-rockchip.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Heiko Stuebner <heiko@sntech.de> 15 - const: rockchip,rk2928-pwm 16 - const: rockchip,rk3288-pwm 17 - const: rockchip,rk3328-pwm 18 - const: rockchip,vop-pwm 19 - items: [all …]
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D | mediatek,mt2712-pwm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pwm/mediatek,mt2712-pwm.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - John Crispin <john@phrozen.org> 13 - $ref: pwm.yaml# 18 - enum: 19 - mediatek,mt2712-pwm 20 - mediatek,mt6795-pwm 21 - mediatek,mt7622-pwm [all …]
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/linux-6.15/Documentation/devicetree/bindings/sound/ |
D | nvidia,tegra210-dmic.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/sound/nvidia,tegra210-dmic.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 16 - Jon Hunter <jonathanh@nvidia.com> 17 - Sameer Pujar <spujar@nvidia.com> 20 - $ref: dai-common.yaml# 24 pattern: "^dmic@[0-9a-f]*$" 28 - const: nvidia,tegra210-dmic 29 - items: [all …]
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/linux-6.15/Documentation/devicetree/bindings/iio/adc/ |
D | nxp,imx93-adc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/iio/adc/nxp,imx93-adc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Haibo Chen <haibo.chen@nxp.com> 13 The ADC on iMX93 is a 8-channel 12-bit 1MS/s ADC with 4 channels 15 One-Shot and Scan (continuous) conversions. Programmable DMA 18 also has Self-test logic and Software-initiated calibration. 23 - enum: 24 - nxp,imx93-adc [all …]
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/linux-6.15/arch/arm/boot/dts/intel/pxa/ |
D | pxa300-raumfeld-tuneable-clock.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #include <dt-bindings/clock/maxim,max9485.h> 6 xo_27mhz: oscillator-27mhz { 7 compatible = "fixed-clock"; 8 #clock-cells = <0>; 9 clock-frequency = <27000000>; 10 clock-accuracy = <100>; 14 compatible = "simple-audio-card"; 15 simple-audio-card,name = "Raumfeld Speaker"; 16 #address-cells = <1>; [all …]
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/linux-6.15/Documentation/devicetree/bindings/watchdog/ |
D | realtek,otto-wdt.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/watchdog/realtek,otto-wdt.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Sander Vanheule <sander@svanheule.net> 17 - Phase 1: During this phase, the WDT can be pinged to reset the timeout. 18 - Phase 2: Starts after phase 1 has timed out, and only serves to give the 24 - $ref: watchdog.yaml# 29 - realtek,rtl8380-wdt 30 - realtek,rtl8390-wdt [all …]
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/linux-6.15/arch/arm64/boot/dts/rockchip/ |
D | rk3399-gru-bob.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Google Gru-Bob Rev 4+ board device tree source 8 /dts-v1/; 9 #include "rk3399-gru-chromebook.dtsi" 13 compatible = "google,bob-rev13", "google,bob-rev12", 14 "google,bob-rev11", "google,bob-rev10", 15 "google,bob-rev9", "google,bob-rev8", 16 "google,bob-rev7", "google,bob-rev6", 17 "google,bob-rev5", "google,bob-rev4", 19 chassis-type = "convertible"; [all …]
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