| /linux-5.10/arch/arm/boot/dts/ |
| D | rk3066a-marsboard.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
11 compatible = "haoyu,marsboard-rk3066", "rockchip,rk3066a";
15 reg = <0x60000000 0x40000000>;
18 vdd_log: vdd-log {
19 compatible = "pwm-regulator";
21 regulator-name = "vdd_log";
22 regulator-min-microvolt = <1200000>;
23 regulator-max-microvolt = <1200000>;
24 regulator-always-on;
[all …]
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| D | am3517-evm.dts | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
5 /dts-v1/;
8 #include "am3517-som.dtsi"
9 #include "am3517-evm-ui.dtsi"
10 #include <dt-bindings/input/input.h>
14 compatible = "ti,am3517-evm", "ti,am3517", "ti,omap3";
21 stdout-path = &uart3;
26 reg = <0x80000000 0x10000000>; /* 256 MB */
30 compatible = "regulator-fixed";
[all …]
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| D | bcm2835-rpi-zero.dts | 1 // SPDX-License-Identifier: GPL-2.0+
6 /dts-v1/;
8 #include "bcm2835-rpi.dtsi"
9 #include "bcm283x-rpi-usb-otg.dtsi"
12 compatible = "raspberrypi,model-zero", "brcm,bcm2835";
17 reg = <0 0x20000000>;
36 gpio-line-names = "ID_SDA",
93 pinctrl-0 = <&gpioout &alt0 &i2s_alt0>;
103 hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
104 power-domains = <&power RPI_POWER_DOMAIN_HDMI>;
[all …]
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| D | aspeed-bmc-facebook-minipack.dts | 1 // SPDX-License-Identifier: GPL-2.0+
3 /dts-v1/;
5 #include "ast2500-facebook-netbmc-common.dtsi"
9 compatible = "facebook,minipack-bmc", "aspeed,ast2500";
23 * i2c switch 2-0070, pca9548, 8 child channels assigned
24 * with bus number 16-23.
36 * i2c switch 8-0070, pca9548, 8 child channels assigned
37 * with bus number 24-31.
49 * i2c switch 9-0070, pca9548, 8 child channels assigned
50 * with bus number 32-39.
[all …]
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| D | at91-ariettag25.dts | 1 // SPDX-License-Identifier: GPL-2.0
7 /dts-v1/;
15 stdout-path = "serial0:115200n8";
19 reg = <0x20000000 0x8000000>;
24 clock-frequency = <32768>;
28 clock-frequency = <12000000>;
33 compatible = "gpio-leds";
38 linux,default-trigger = "heartbeat";
48 pinctrl-0 = <
51 pinctrl-names = "default";
[all …]
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| D | tny_a9263.dts | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * usb_a9263.dts - Device Tree file for Caloa USB A9293 board
5 * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
7 /dts-v1/;
12 compatible = "atmel,tny-a9263", "atmel,at91sam9263", "atmel,at91sam9";
19 reg = <0x20000000 0x4000000>;
24 clock-frequency = <32768>;
28 clock-frequency = <12000000>;
40 compatible = "atmel,tcb-timer";
41 reg = <0>, <1>;
[all …]
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| D | exynos4412-origen.dts | 1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
12 /dts-v1/;
14 #include <dt-bindings/clock/samsung,s2mps11.h>
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/input/input.h>
17 #include "exynos-mfc-reserved-memory.dtsi"
25 reg = <0x40000000 0x40000000>;
29 stdout-path = "serial2:115200n8";
33 compatible = "samsung,secure-firmware";
[all …]
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| D | spear300.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later
12 #address-cells = <1>;
13 #size-cells = <1>;
14 compatible = "simple-bus";
19 compatible = "st,spear300-pinmux";
20 reg = <0x99000000 0x1000>;
25 reg = <0x60000000 0x1000>;
31 compatible = "st,spear600-fsmc-nand";
32 #address-cells = <1>;
33 #size-cells = <1>;
[all …]
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| D | rk3288-vyasa.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
10 model = "Amarula Vyasa-RK3288";
11 compatible = "amarula,vyasa-rk3288", "rockchip,rk3288";
14 stdout-path = &uart2;
18 reg = <0x0 0x0 0x0 0x80000000>;
22 dc12_vbat: dc12-vbat {
23 compatible = "regulator-fixed";
24 regulator-name = "dc12_vbat";
25 regulator-min-microvolt = <12000000>;
[all …]
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| D | rk3288-tinker.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/clock/rockchip,rk808.h>
12 stdout-path = "serial2:115200n8";
16 reg = <0x0 0x0 0x0 0x80000000>;
20 ext_gmac: external-gmac-clock {
21 compatible = "fixed-clock";
22 #clock-cells = <0>;
23 clock-frequency = <125000000>;
24 clock-output-names = "ext_gmac";
[all …]
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| /linux-5.10/drivers/clk/renesas/ |
| D | clk-r8a7778.c | 1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/clk-provider.h>
12 #include <linux/soc/renesas/rcar-rst.h>
17 void __iomem *reg; member
74 return ERR_PTR(-EINVAL); in r8a7778_cpg_register_clock()
97 num_clks = of_property_count_strings(np, "clock-output-names"); in r8a7778_cpg_clocks_init()
112 spin_lock_init(&cpg->lock); in r8a7778_cpg_clocks_init()
114 cpg->data.clks = clks; in r8a7778_cpg_clocks_init()
115 cpg->data.clk_num = num_clks; in r8a7778_cpg_clocks_init()
117 cpg->reg = of_iomap(np, 0); in r8a7778_cpg_clocks_init()
[all …]
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| D | clk-div6.c | 1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/clk-provider.h>
20 #include "clk-div6.h"
27 * struct div6_clock - CPG 6 bit divider clock
28 * @hw: handle between common and hardware-specific interfaces
29 * @reg: IO-remapped register
30 * @div: divisor value (1-64)
38 void __iomem *reg; member
53 val = (readl(clock->reg) & ~(CPG_DIV6_DIV_MASK | CPG_DIV6_CKSTP)) in cpg_div6_clock_enable()
54 | CPG_DIV6_DIV(clock->div - 1); in cpg_div6_clock_enable()
[all …]
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| /linux-5.10/Documentation/devicetree/bindings/sound/ |
| D | rt5616.txt | 7 - compatible : "realtek,rt5616".
9 - reg : The I2C address of the device.
13 - clocks: The phandle of the master clock to the CODEC.
15 - clock-names: Should be "mclk".
31 reg = <0x1b>;
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| /linux-5.10/Documentation/devicetree/bindings/usb/ |
| D | ehci-orion.txt | 4 - compatible: must be one of the following
5 "marvell,orion-ehci"
6 "marvell,armada-3700-ehci"
7 - reg: physical base address of the controller and length of memory mapped
9 - interrupts: The EHCI interrupt
12 - clocks: reference to the clock
13 - phys: reference to the USB PHY
14 - phy-names: name of the USB PHY, should be "usb"
19 compatible = "marvell,orion-ehci";
20 reg = <0x50000 0x1000>;
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| /linux-5.10/Documentation/devicetree/bindings/pinctrl/ |
| D | pinctrl-single.txt | 1 One-register-per-pin type device tree based pinctrl driver
4 - compatible : "pinctrl-single" or "pinconf-single".
5 "pinctrl-single" means that pinconf isn't supported.
6 "pinconf-single" means that generic pinconf is supported.
8 - reg : offset and length of the register set for the mux registers
10 - #pinctrl-cells : number of cells in addition to the index, set to 1
11 for pinctrl-single,pins and 2 for pinctrl-single,bits
13 - pinctrl-single,register-width : pinmux register access width in bits
15 - pinctrl-single,function-mask : mask of allowed pinmux function bits
19 - pinctrl-single,function-off : function off mode for disabled state if
[all …]
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| /linux-5.10/Documentation/devicetree/bindings/crypto/ |
| D | fsl-dcp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/crypto/fsl-dcp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale DCP (Data Co-Processor) found on i.MX23/i.MX28
10 - Marek Vasut <marex@denx.de>
15 - fsl,imx23-dcp
16 - fsl,imx28-dcp
18 reg:
26 - description: MXS DCP VMI interrupt
[all …]
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| /linux-5.10/Documentation/devicetree/bindings/nvmem/ |
| D | amlogic-efuse.txt | 4 - compatible: should be "amlogic,meson-gxbb-efuse"
5 - clocks: phandle to the efuse peripheral clock provided by the
7 - secure-monitor: phandle to the secure-monitor node
16 compatible = "amlogic,meson-gxbb-efuse";
18 #address-cells = <1>;
19 #size-cells = <1>;
20 secure-monitor = <&sm>;
23 reg = <0x14 0x10>;
27 reg = <0x34 0x10>;
31 reg = <0x46 0x30>;
[all …]
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| /linux-5.10/Documentation/devicetree/bindings/mmc/ |
| D | sdhci-atmel.txt | 5 sdhci-of-at91 driver.
8 - compatible: Must be "atmel,sama5d2-sdhci" or "microchip,sam9x60-sdhci".
9 - clocks: Phandlers to the clocks.
10 - clock-names: Must be "hclock", "multclk", "baseclk" for
11 "atmel,sama5d2-sdhci".
12 Must be "hclock", "multclk" for "microchip,sam9x60-sdhci".
15 - assigned-clocks: The same with "multclk".
16 - assigned-clock-rates The rate of "multclk" in order to not rely on the
18 - microchip,sdcal-inverted: when present, polarity on the SDCAL SoC pin is
25 mmc0: sdio-host@a0000000 {
[all …]
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| /linux-5.10/Documentation/devicetree/bindings/bus/ |
| D | allwinner,sun50i-a64-de2.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/bus/allwinner,sun50i-a64-de2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
15 pattern: "^bus(@[0-9a-f]+)?$"
17 "#address-cells":
20 "#size-cells":
25 - const: allwinner,sun50i-a64-de2
[all …]
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| /linux-5.10/Documentation/devicetree/bindings/mfd/ |
| D | fsl-imx25-tsadc.txt | 7 - compatible: Should be "fsl,imx25-tsadc".
8 - reg: Start address and size of the memory area of
10 - interrupts: Interrupt for this device
11 (See: ../interrupt-controller/interrupts.txt)
12 - clocks: An 'ipg' clock (See: ../clock/clock-bindings.txt)
13 - interrupt-controller: This device is an interrupt controller. It
16 - #interrupt-cells: Should be '<1>'.
17 - #address-cells: Should be '<1>'.
18 - #size-cells: Should be '<1>'.
25 compatible = "fsl,imx25-tsadc";
[all …]
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| /linux-5.10/arch/arm64/boot/dts/renesas/ |
| D | r8a77961-salvator-xs.dts | 1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the Salvator-X 2nd version board with R-Car M3-W+
8 /dts-v1/;
10 #include "salvator-xs.dtsi"
13 model = "Renesas Salvator-X 2nd version board based on r8a77961";
14 compatible = "renesas,salvator-xs", "renesas,r8a77961";
19 reg = <0x0 0x48000000 0x0 0x78000000>;
24 reg = <0x4 0x80000000 0x0 0x80000000>;
29 reg = <0x6 0x00000000 0x1 0x00000000>;
40 clock-names = "du.0", "du.1", "du.2",
[all …]
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| /linux-5.10/drivers/clk/sunxi/ |
| D | clk-sun4i-pll3.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Maxime Ripard <maxime.ripard@free-electrons.com>
8 #include <linux/clk-provider.h>
23 const char *clk_name = node->name, *parent; in sun4i_a10_pll3_setup()
27 void __iomem *reg; in sun4i_a10_pll3_setup() local
31 of_property_read_string(node, "clock-output-names", &clk_name); in sun4i_a10_pll3_setup()
34 reg = of_io_request_and_map(node, 0, of_node_full_name(node)); in sun4i_a10_pll3_setup()
35 if (IS_ERR(reg)) { in sun4i_a10_pll3_setup()
44 gate->reg = reg; in sun4i_a10_pll3_setup()
45 gate->bit_idx = SUN4I_A10_PLL3_GATE_BIT; in sun4i_a10_pll3_setup()
[all …]
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| /linux-5.10/Documentation/devicetree/bindings/rtc/ |
| D | pcf8563.txt | 6 - compatible: Should contain "nxp,pcf8563",
9 - reg: I2C address for chip.
12 - #clock-cells: Should be 0.
13 - clock-output-names:
14 overwrite the default clock name "pcf8563-clkout"
20 reg = <0x51>;
21 #clock-cells = <0>;
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| /linux-5.10/arch/arm64/boot/dts/amlogic/ |
| D | meson-sm1-odroid-c4.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "meson-sm1.dtsi"
9 #include <dt-bindings/gpio/meson-g12a-gpio.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/sound/meson-g12a-tohdmitx.h>
14 compatible = "hardkernel,odroid-c4", "amlogic,sm1";
15 model = "Hardkernel ODROID-C4";
23 stdout-path = "serial0:115200n8";
28 reg = <0x0 0x0 0x0 0x40000000>;
[all …]
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| /linux-5.10/Documentation/devicetree/bindings/clock/ |
| D | rockchip,rv1108-cru.txt | 9 - compatible: should be "rockchip,rv1108-cru"
10 - reg: physical base address of the controller and length of memory mapped
12 - #clock-cells: should be 1.
13 - #reset-cells: should be 1.
17 - rockchip,grf: phandle to the syscon managing the "general register files"
22 preprocessor macros in the dt-bindings/clock/rv1108-cru.h headers and can be
30 clock-output-names:
31 - "xin24m" - crystal input - required,
32 - "ext_vip" - external VIP clock - optional
33 - "ext_i2s" - external I2S clock - optional
[all …]
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