Searched +full:rcar +full:- +full:gen4 +full:- +full:pcie +full:- +full:ep (Results 1 – 8 of 8) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2 # Copyright (C) 2022-2023 Renesas Electronics Corp.4 ---5 $id: http://devicetree.org/schemas/pci/rcar-gen4-pci-ep.yaml#6 $schema: http://devicetree.org/meta-schemas/core.yaml#8 title: Renesas R-Car Gen4 PCIe Endpoint11 - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>14 - $ref: snps,dw-pcie-ep.yaml#19 - enum:20 - renesas,r8a779f0-pcie-ep # R-Car S4-8[all …]
1 // SPDX-License-Identifier: GPL-2.0-only3 * PCIe controller driver for Renesas R-Car Gen4 Series SoCs4 * Copyright (C) 2022-2023 Renesas Electronics Corporation6 * The r8a779g0 (R-Car V4H) controller requires a specific firmware to be7 * provided, to initialize the PHY. Otherwise, the PCIe controller will not24 #include "pcie-designware.h"26 /* Renesas-specific */27 /* PCIe Mode Setting Register 0 */34 /* PCIe Interrupt Status 0 */37 /* PCIe Interrupt Status 0 Enable */[all …]
1 # SPDX-License-Identifier: GPL-2.03 menu "DesignWare-based PCIe controllers"10 bool "DesignWare PCIe debugfs entries"14 Say Y here to enable debugfs entries for the PCIe controller. These28 bool "Amazon Annapurna Labs PCIe controller"34 Say Y here to enable support of the Amazon's Annapurna Labs PCIe35 controller IP on Amazon SoCs. The PCIe controller uses the DesignWare37 required only for DT-based platforms. ACPI platforms with the38 Annapurna Labs PCIe controller don't need to enable this.41 bool "AMD MDB Versal2 PCIe controller"[all …]
1 # SPDX-License-Identifier: GPL-2.02 obj-$(CONFIG_PCIE_DW) += pcie-designware.o3 obj-$(CONFIG_PCIE_DW_DEBUGFS) += pcie-designware-debugfs.o4 obj-$(CONFIG_PCIE_DW_HOST) += pcie-designware-host.o5 obj-$(CONFIG_PCIE_DW_EP) += pcie-designware-ep.o6 obj-$(CONFIG_PCIE_DW_PLAT) += pcie-designware-plat.o7 obj-$(CONFIG_PCIE_AMD_MDB) += pcie-amd-mdb.o8 obj-$(CONFIG_PCIE_BT1) += pcie-bt1.o9 obj-$(CONFIG_PCI_DRA7XX) += pci-dra7xx.o10 obj-$(CONFIG_PCI_EXYNOS) += pci-exynos.o[all …]
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)3 * Device Tree Source for the R-Car S4-8 (R8A779F0) SoC8 #include <dt-bindings/clock/r8a779f0-cpg-mssr.h>9 #include <dt-bindings/interrupt-controller/arm-gic.h>10 #include <dt-bindings/power/r8a779f0-sysc.h>14 #address-cells = <2>;15 #size-cells = <2>;17 cluster01_opp: opp-table-0 {18 compatible = "operating-points-v2";19 opp-shared;[all …]
1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 * Device Tree Source for the R-Car V4H (R8A779G0) SoC8 #include <dt-bindings/clock/r8a779g0-cpg-mssr.h>9 #include <dt-bindings/interrupt-controller/arm-gic.h>10 #include <dt-bindings/power/r8a779g0-sysc.h>14 #address-cells = <2>;15 #size-cells = <2>;17 /* External Audio clock - to be overridden by boards that provide it */19 compatible = "fixed-clock";20 #clock-cells = <0>;[all …]
1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 * Device Tree Source for the R-Car V4M (R8A779H0) SoC8 #include <dt-bindings/clock/renesas,r8a779h0-cpg-mssr.h>9 #include <dt-bindings/interrupt-controller/arm-gic.h>10 #include <dt-bindings/power/renesas,r8a779h0-sysc.h>14 #address-cells = <2>;15 #size-cells = <2>;17 /* External Audio clock - to be overridden by boards that provide it */19 compatible = "fixed-clock";20 #clock-cells = <0>;[all …]
5 ---------------------------------------------------21 W: *Web-page* with status/info23 B: URI for where to file *bugs*. A web-page with detailed bug28 patches to the given subsystem. This is either an in-tree file,29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst46 N: [^a-z]tegra all files whose path contains tegra64 ----------------83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)85 L: linux-scsi@vger.kernel.org88 F: drivers/scsi/3w-*[all …]