1// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2/* 3 * Device Tree Source for the R-Car V4M (R8A779H0) SoC 4 * 5 * Copyright (C) 2023 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/clock/renesas,r8a779h0-cpg-mssr.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/power/renesas,r8a779h0-sysc.h> 11 12/ { 13 compatible = "renesas,r8a779h0"; 14 #address-cells = <2>; 15 #size-cells = <2>; 16 17 /* External Audio clock - to be overridden by boards that provide it */ 18 audio_clkin: audio_clkin { 19 compatible = "fixed-clock"; 20 #clock-cells = <0>; 21 clock-frequency = <0>; 22 }; 23 24 /* External CAN clock - to be overridden by boards that provide it */ 25 can_clk: can-clk { 26 compatible = "fixed-clock"; 27 #clock-cells = <0>; 28 clock-frequency = <0>; 29 }; 30 31 cluster0_opp: opp-table-0 { 32 compatible = "operating-points-v2"; 33 34 opp-500000000 { 35 opp-hz = /bits/ 64 <500000000>; 36 opp-microvolt = <825000>; 37 clock-latency-ns = <500000>; 38 }; 39 opp-1000000000 { 40 opp-hz = /bits/ 64 <1000000000>; 41 opp-microvolt = <825000>; 42 clock-latency-ns = <500000>; 43 }; 44 }; 45 46 cpus { 47 #address-cells = <1>; 48 #size-cells = <0>; 49 50 cpu-map { 51 cluster0 { 52 core0 { 53 cpu = <&a76_0>; 54 }; 55 core1 { 56 cpu = <&a76_1>; 57 }; 58 core2 { 59 cpu = <&a76_2>; 60 }; 61 core3 { 62 cpu = <&a76_3>; 63 }; 64 }; 65 }; 66 67 a76_0: cpu@0 { 68 compatible = "arm,cortex-a76"; 69 reg = <0>; 70 device_type = "cpu"; 71 power-domains = <&sysc R8A779H0_PD_A1E0D0C0>; 72 next-level-cache = <&L3_CA76>; 73 enable-method = "psci"; 74 cpu-idle-states = <&CPU_SLEEP_0>; 75 clocks = <&cpg CPG_CORE R8A779H0_CLK_ZC0>; 76 operating-points-v2 = <&cluster0_opp>; 77 }; 78 79 a76_1: cpu@100 { 80 compatible = "arm,cortex-a76"; 81 reg = <0x100>; 82 device_type = "cpu"; 83 power-domains = <&sysc R8A779H0_PD_A1E0D0C1>; 84 next-level-cache = <&L3_CA76>; 85 enable-method = "psci"; 86 cpu-idle-states = <&CPU_SLEEP_0>; 87 clocks = <&cpg CPG_CORE R8A779H0_CLK_ZC1>; 88 operating-points-v2 = <&cluster0_opp>; 89 }; 90 91 a76_2: cpu@200 { 92 compatible = "arm,cortex-a76"; 93 reg = <0x200>; 94 device_type = "cpu"; 95 power-domains = <&sysc R8A779H0_PD_A1E0D0C2>; 96 next-level-cache = <&L3_CA76>; 97 enable-method = "psci"; 98 cpu-idle-states = <&CPU_SLEEP_0>; 99 clocks = <&cpg CPG_CORE R8A779H0_CLK_ZC2>; 100 operating-points-v2 = <&cluster0_opp>; 101 }; 102 103 a76_3: cpu@300 { 104 compatible = "arm,cortex-a76"; 105 reg = <0x300>; 106 device_type = "cpu"; 107 power-domains = <&sysc R8A779H0_PD_A1E0D0C3>; 108 next-level-cache = <&L3_CA76>; 109 enable-method = "psci"; 110 cpu-idle-states = <&CPU_SLEEP_0>; 111 clocks = <&cpg CPG_CORE R8A779H0_CLK_ZC3>; 112 operating-points-v2 = <&cluster0_opp>; 113 }; 114 115 idle-states { 116 entry-method = "psci"; 117 118 CPU_SLEEP_0: cpu-sleep-0 { 119 compatible = "arm,idle-state"; 120 arm,psci-suspend-param = <0x0010000>; 121 local-timer-stop; 122 entry-latency-us = <400>; 123 exit-latency-us = <500>; 124 min-residency-us = <4000>; 125 }; 126 }; 127 128 L3_CA76: cache-controller { 129 compatible = "cache"; 130 power-domains = <&sysc R8A779H0_PD_A2E0D0>; 131 cache-unified; 132 cache-level = <3>; 133 }; 134 }; 135 136 extal_clk: extal-clk { 137 compatible = "fixed-clock"; 138 #clock-cells = <0>; 139 /* This value must be overridden by the board */ 140 clock-frequency = <0>; 141 bootph-all; 142 }; 143 144 extalr_clk: extalr-clk { 145 compatible = "fixed-clock"; 146 #clock-cells = <0>; 147 /* This value must be overridden by the board */ 148 clock-frequency = <0>; 149 bootph-all; 150 }; 151 152 pcie0_clkref: pcie0-clkref { 153 compatible = "fixed-clock"; 154 #clock-cells = <0>; 155 /* This value must be overridden by the board */ 156 clock-frequency = <0>; 157 }; 158 159 pmu-a76 { 160 compatible = "arm,cortex-a76-pmu"; 161 interrupts-extended = <&gic GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>; 162 }; 163 164 psci { 165 compatible = "arm,psci-1.0", "arm,psci-0.2"; 166 method = "smc"; 167 }; 168 169 /* External SCIF clocks - to be overridden by boards that provide them */ 170 scif_clk: scif-clk { 171 compatible = "fixed-clock"; 172 #clock-cells = <0>; 173 clock-frequency = <0>; 174 }; 175 176 scif_clk2: scif-clk2 { 177 compatible = "fixed-clock"; 178 #clock-cells = <0>; 179 clock-frequency = <0>; 180 }; 181 182 soc: soc { 183 compatible = "simple-bus"; 184 interrupt-parent = <&gic>; 185 bootph-all; 186 187 #address-cells = <2>; 188 #size-cells = <2>; 189 ranges; 190 191 rwdt: watchdog@e6020000 { 192 compatible = "renesas,r8a779h0-wdt", 193 "renesas,rcar-gen4-wdt"; 194 reg = <0 0xe6020000 0 0x0c>; 195 interrupts = <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>; 196 clocks = <&cpg CPG_MOD 907>; 197 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 198 resets = <&cpg 907>; 199 status = "disabled"; 200 }; 201 202 pfc: pinctrl@e6050000 { 203 compatible = "renesas,pfc-r8a779h0"; 204 reg = <0 0xe6050000 0 0x16c>, <0 0xe6050800 0 0x16c>, 205 <0 0xe6058000 0 0x16c>, <0 0xe6058800 0 0x16c>, 206 <0 0xe6060000 0 0x16c>, <0 0xe6060800 0 0x16c>, 207 <0 0xe6061000 0 0x16c>, <0 0xe6061800 0 0x16c>; 208 bootph-all; 209 }; 210 211 gpio0: gpio@e6050180 { 212 compatible = "renesas,gpio-r8a779h0", 213 "renesas,rcar-gen4-gpio"; 214 reg = <0 0xe6050180 0 0x54>; 215 interrupts = <GIC_SPI 619 IRQ_TYPE_LEVEL_HIGH>; 216 #gpio-cells = <2>; 217 gpio-controller; 218 gpio-ranges = <&pfc 0 0 19>; 219 #interrupt-cells = <2>; 220 interrupt-controller; 221 clocks = <&cpg CPG_MOD 915>; 222 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 223 resets = <&cpg 915>; 224 }; 225 226 gpio1: gpio@e6050980 { 227 compatible = "renesas,gpio-r8a779h0", 228 "renesas,rcar-gen4-gpio"; 229 reg = <0 0xe6050980 0 0x54>; 230 interrupts = <GIC_SPI 623 IRQ_TYPE_LEVEL_HIGH>; 231 #gpio-cells = <2>; 232 gpio-controller; 233 gpio-ranges = <&pfc 0 32 30>; 234 #interrupt-cells = <2>; 235 interrupt-controller; 236 clocks = <&cpg CPG_MOD 915>; 237 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 238 resets = <&cpg 915>; 239 }; 240 241 gpio2: gpio@e6058180 { 242 compatible = "renesas,gpio-r8a779h0", 243 "renesas,rcar-gen4-gpio"; 244 reg = <0 0xe6058180 0 0x54>; 245 interrupts = <GIC_SPI 627 IRQ_TYPE_LEVEL_HIGH>; 246 #gpio-cells = <2>; 247 gpio-controller; 248 gpio-ranges = <&pfc 0 64 20>; 249 #interrupt-cells = <2>; 250 interrupt-controller; 251 clocks = <&cpg CPG_MOD 916>; 252 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 253 resets = <&cpg 916>; 254 }; 255 256 gpio3: gpio@e6058980 { 257 compatible = "renesas,gpio-r8a779h0", 258 "renesas,rcar-gen4-gpio"; 259 reg = <0 0xe6058980 0 0x54>; 260 interrupts = <GIC_SPI 631 IRQ_TYPE_LEVEL_HIGH>; 261 #gpio-cells = <2>; 262 gpio-controller; 263 gpio-ranges = <&pfc 0 96 32>; 264 #interrupt-cells = <2>; 265 interrupt-controller; 266 clocks = <&cpg CPG_MOD 916>; 267 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 268 resets = <&cpg 916>; 269 }; 270 271 gpio4: gpio@e6060180 { 272 compatible = "renesas,gpio-r8a779h0", 273 "renesas,rcar-gen4-gpio"; 274 reg = <0 0xe6060180 0 0x54>; 275 interrupts = <GIC_SPI 635 IRQ_TYPE_LEVEL_HIGH>; 276 #gpio-cells = <2>; 277 gpio-controller; 278 gpio-ranges = <&pfc 0 128 25>; 279 #interrupt-cells = <2>; 280 interrupt-controller; 281 clocks = <&cpg CPG_MOD 917>; 282 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 283 resets = <&cpg 917>; 284 }; 285 286 gpio5: gpio@e6060980 { 287 compatible = "renesas,gpio-r8a779h0", 288 "renesas,rcar-gen4-gpio"; 289 reg = <0 0xe6060980 0 0x54>; 290 interrupts = <GIC_SPI 639 IRQ_TYPE_LEVEL_HIGH>; 291 #gpio-cells = <2>; 292 gpio-controller; 293 gpio-ranges = <&pfc 0 160 21>; 294 #interrupt-cells = <2>; 295 interrupt-controller; 296 clocks = <&cpg CPG_MOD 917>; 297 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 298 resets = <&cpg 917>; 299 }; 300 301 gpio6: gpio@e6061180 { 302 compatible = "renesas,gpio-r8a779h0", 303 "renesas,rcar-gen4-gpio"; 304 reg = <0 0xe6061180 0 0x54>; 305 interrupts = <GIC_SPI 643 IRQ_TYPE_LEVEL_HIGH>; 306 #gpio-cells = <2>; 307 gpio-controller; 308 gpio-ranges = <&pfc 0 192 21>; 309 #interrupt-cells = <2>; 310 interrupt-controller; 311 clocks = <&cpg CPG_MOD 917>; 312 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 313 resets = <&cpg 917>; 314 }; 315 316 gpio7: gpio@e6061980 { 317 compatible = "renesas,gpio-r8a779h0", 318 "renesas,rcar-gen4-gpio"; 319 reg = <0 0xe6061980 0 0x54>; 320 interrupts = <GIC_SPI 647 IRQ_TYPE_LEVEL_HIGH>; 321 #gpio-cells = <2>; 322 gpio-controller; 323 gpio-ranges = <&pfc 0 224 21>; 324 #interrupt-cells = <2>; 325 interrupt-controller; 326 clocks = <&cpg CPG_MOD 917>; 327 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 328 resets = <&cpg 917>; 329 }; 330 331 cmt0: timer@e60f0000 { 332 compatible = "renesas,r8a779h0-cmt0", 333 "renesas,rcar-gen4-cmt0"; 334 reg = <0 0xe60f0000 0 0x1004>; 335 interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, 336 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>; 337 clocks = <&cpg CPG_MOD 910>; 338 clock-names = "fck"; 339 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 340 resets = <&cpg 910>; 341 status = "disabled"; 342 }; 343 344 cmt1: timer@e6130000 { 345 compatible = "renesas,r8a779h0-cmt1", 346 "renesas,rcar-gen4-cmt1"; 347 reg = <0 0xe6130000 0 0x1004>; 348 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>, 349 <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>, 350 <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>, 351 <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>, 352 <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>, 353 <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>, 354 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, 355 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>; 356 clocks = <&cpg CPG_MOD 911>; 357 clock-names = "fck"; 358 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 359 resets = <&cpg 911>; 360 status = "disabled"; 361 }; 362 363 cmt2: timer@e6140000 { 364 compatible = "renesas,r8a779h0-cmt1", 365 "renesas,rcar-gen4-cmt1"; 366 reg = <0 0xe6140000 0 0x1004>; 367 interrupts = <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>, 368 <GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>, 369 <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>, 370 <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>, 371 <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>, 372 <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>, 373 <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>, 374 <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>; 375 clocks = <&cpg CPG_MOD 912>; 376 clock-names = "fck"; 377 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 378 resets = <&cpg 912>; 379 status = "disabled"; 380 }; 381 382 cmt3: timer@e6148000 { 383 compatible = "renesas,r8a779h0-cmt1", 384 "renesas,rcar-gen4-cmt1"; 385 reg = <0 0xe6148000 0 0x1004>; 386 interrupts = <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>, 387 <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>, 388 <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>, 389 <GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>, 390 <GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>, 391 <GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>, 392 <GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>, 393 <GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>; 394 clocks = <&cpg CPG_MOD 913>; 395 clock-names = "fck"; 396 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 397 resets = <&cpg 913>; 398 status = "disabled"; 399 }; 400 401 cpg: clock-controller@e6150000 { 402 compatible = "renesas,r8a779h0-cpg-mssr"; 403 reg = <0 0xe6150000 0 0x4000>; 404 clocks = <&extal_clk>, <&extalr_clk>; 405 clock-names = "extal", "extalr"; 406 #clock-cells = <2>; 407 #power-domain-cells = <0>; 408 #reset-cells = <1>; 409 bootph-all; 410 }; 411 412 rst: reset-controller@e6160000 { 413 compatible = "renesas,r8a779h0-rst"; 414 reg = <0 0xe6160000 0 0x4000>; 415 bootph-all; 416 }; 417 418 sysc: system-controller@e6180000 { 419 compatible = "renesas,r8a779h0-sysc"; 420 reg = <0 0xe6180000 0 0x4000>; 421 #power-domain-cells = <1>; 422 }; 423 424 tsc: thermal@e6198000 { 425 compatible = "renesas,r8a779h0-thermal"; 426 reg = <0 0xe6198000 0 0x200>, 427 <0 0xe61a0000 0 0x200>; 428 clocks = <&cpg CPG_MOD 919>; 429 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 430 resets = <&cpg 919>; 431 #thermal-sensor-cells = <1>; 432 }; 433 434 otp: otp@e61be000 { 435 compatible = "renesas,r8a779h0-otp"; 436 reg = <0 0xe61be000 0 0x1000>, <0 0xe61bf000 0 0x1000>; 437 }; 438 439 intc_ex: interrupt-controller@e61c0000 { 440 compatible = "renesas,intc-ex-r8a779h0", "renesas,irqc"; 441 #interrupt-cells = <2>; 442 interrupt-controller; 443 reg = <0 0xe61c0000 0 0x200>; 444 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 445 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 446 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 447 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 448 <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, 449 <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 450 clocks = <&cpg CPG_MOD 611>; 451 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 452 resets = <&cpg 611>; 453 }; 454 455 tmu0: timer@e61e0000 { 456 compatible = "renesas,tmu-r8a779h0", "renesas,tmu"; 457 reg = <0 0xe61e0000 0 0x30>; 458 interrupts = <GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH>, 459 <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>, 460 <GIC_SPI 291 IRQ_TYPE_LEVEL_HIGH>; 461 interrupt-names = "tuni0", "tuni1", "tuni2"; 462 clocks = <&cpg CPG_MOD 713>; 463 clock-names = "fck"; 464 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 465 resets = <&cpg 713>; 466 status = "disabled"; 467 }; 468 469 tmu1: timer@e6fc0000 { 470 compatible = "renesas,tmu-r8a779h0", "renesas,tmu"; 471 reg = <0 0xe6fc0000 0 0x30>; 472 interrupts = <GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>, 473 <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>, 474 <GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH>, 475 <GIC_SPI 295 IRQ_TYPE_LEVEL_HIGH>; 476 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 477 clocks = <&cpg CPG_MOD 714>; 478 clock-names = "fck"; 479 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 480 resets = <&cpg 714>; 481 status = "disabled"; 482 }; 483 484 tmu2: timer@e6fd0000 { 485 compatible = "renesas,tmu-r8a779h0", "renesas,tmu"; 486 reg = <0 0xe6fd0000 0 0x30>; 487 interrupts = <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>, 488 <GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>, 489 <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>, 490 <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>; 491 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 492 clocks = <&cpg CPG_MOD 715>; 493 clock-names = "fck"; 494 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 495 resets = <&cpg 715>; 496 status = "disabled"; 497 }; 498 499 tmu3: timer@e6fe0000 { 500 compatible = "renesas,tmu-r8a779h0", "renesas,tmu"; 501 reg = <0 0xe6fe0000 0 0x30>; 502 interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>, 503 <GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH>, 504 <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>, 505 <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>; 506 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 507 clocks = <&cpg CPG_MOD 716>; 508 clock-names = "fck"; 509 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 510 resets = <&cpg 716>; 511 status = "disabled"; 512 }; 513 514 tmu4: timer@ffc00000 { 515 compatible = "renesas,tmu-r8a779h0", "renesas,tmu"; 516 reg = <0 0xffc00000 0 0x30>; 517 interrupts = <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 518 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>, 519 <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>, 520 <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>; 521 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 522 clocks = <&cpg CPG_MOD 717>; 523 clock-names = "fck"; 524 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 525 resets = <&cpg 717>; 526 status = "disabled"; 527 }; 528 529 i2c0: i2c@e6500000 { 530 compatible = "renesas,i2c-r8a779h0", 531 "renesas,rcar-gen4-i2c"; 532 reg = <0 0xe6500000 0 0x40>; 533 interrupts = <GIC_SPI 610 IRQ_TYPE_LEVEL_HIGH>; 534 clocks = <&cpg CPG_MOD 518>; 535 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 536 resets = <&cpg 518>; 537 dmas = <&dmac1 0x91>, <&dmac1 0x90>, 538 <&dmac2 0x91>, <&dmac2 0x90>; 539 dma-names = "tx", "rx", "tx", "rx"; 540 i2c-scl-internal-delay-ns = <110>; 541 #address-cells = <1>; 542 #size-cells = <0>; 543 status = "disabled"; 544 }; 545 546 i2c1: i2c@e6508000 { 547 compatible = "renesas,i2c-r8a779h0", 548 "renesas,rcar-gen4-i2c"; 549 reg = <0 0xe6508000 0 0x40>; 550 interrupts = <GIC_SPI 611 IRQ_TYPE_LEVEL_HIGH>; 551 clocks = <&cpg CPG_MOD 519>; 552 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 553 resets = <&cpg 519>; 554 dmas = <&dmac1 0x93>, <&dmac1 0x92>, 555 <&dmac2 0x93>, <&dmac2 0x92>; 556 dma-names = "tx", "rx", "tx", "rx"; 557 i2c-scl-internal-delay-ns = <110>; 558 #address-cells = <1>; 559 #size-cells = <0>; 560 status = "disabled"; 561 }; 562 563 i2c2: i2c@e6510000 { 564 compatible = "renesas,i2c-r8a779h0", 565 "renesas,rcar-gen4-i2c"; 566 reg = <0 0xe6510000 0 0x40>; 567 interrupts = <GIC_SPI 612 IRQ_TYPE_LEVEL_HIGH>; 568 clocks = <&cpg CPG_MOD 520>; 569 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 570 resets = <&cpg 520>; 571 dmas = <&dmac1 0x95>, <&dmac1 0x94>, 572 <&dmac2 0x95>, <&dmac2 0x94>; 573 dma-names = "tx", "rx", "tx", "rx"; 574 i2c-scl-internal-delay-ns = <110>; 575 #address-cells = <1>; 576 #size-cells = <0>; 577 status = "disabled"; 578 }; 579 580 i2c3: i2c@e66d0000 { 581 compatible = "renesas,i2c-r8a779h0", 582 "renesas,rcar-gen4-i2c"; 583 reg = <0 0xe66d0000 0 0x40>; 584 interrupts = <GIC_SPI 613 IRQ_TYPE_LEVEL_HIGH>; 585 clocks = <&cpg CPG_MOD 521>; 586 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 587 resets = <&cpg 521>; 588 dmas = <&dmac1 0x97>, <&dmac1 0x96>, 589 <&dmac2 0x97>, <&dmac2 0x96>; 590 dma-names = "tx", "rx", "tx", "rx"; 591 i2c-scl-internal-delay-ns = <110>; 592 #address-cells = <1>; 593 #size-cells = <0>; 594 status = "disabled"; 595 }; 596 597 hscif0: serial@e6540000 { 598 compatible = "renesas,hscif-r8a779h0", 599 "renesas,rcar-gen4-hscif", "renesas,hscif"; 600 reg = <0 0xe6540000 0 0x60>; 601 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 602 clocks = <&cpg CPG_MOD 514>, 603 <&cpg CPG_CORE R8A779H0_CLK_SASYNCPERD1>, 604 <&scif_clk>; 605 clock-names = "fck", "brg_int", "scif_clk"; 606 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 607 resets = <&cpg 514>; 608 dmas = <&dmac1 0x31>, <&dmac1 0x30>, 609 <&dmac2 0x31>, <&dmac2 0x30>; 610 dma-names = "tx", "rx", "tx", "rx"; 611 status = "disabled"; 612 }; 613 614 hscif1: serial@e6550000 { 615 compatible = "renesas,hscif-r8a779h0", 616 "renesas,rcar-gen4-hscif", "renesas,hscif"; 617 reg = <0 0xe6550000 0 0x60>; 618 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>; 619 clocks = <&cpg CPG_MOD 515>, 620 <&cpg CPG_CORE R8A779H0_CLK_SASYNCPERD1>, 621 <&scif_clk>; 622 clock-names = "fck", "brg_int", "scif_clk"; 623 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 624 resets = <&cpg 515>; 625 dmas = <&dmac1 0x33>, <&dmac1 0x32>, 626 <&dmac2 0x33>, <&dmac2 0x32>; 627 dma-names = "tx", "rx", "tx", "rx"; 628 status = "disabled"; 629 }; 630 631 hscif2: serial@e6560000 { 632 compatible = "renesas,hscif-r8a779h0", 633 "renesas,rcar-gen4-hscif", "renesas,hscif"; 634 reg = <0 0xe6560000 0 0x60>; 635 interrupts = <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>; 636 clocks = <&cpg CPG_MOD 516>, 637 <&cpg CPG_CORE R8A779H0_CLK_SASYNCPERD1>, 638 <&scif_clk2>; 639 clock-names = "fck", "brg_int", "scif_clk"; 640 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 641 resets = <&cpg 516>; 642 dmas = <&dmac1 0x35>, <&dmac1 0x34>, 643 <&dmac2 0x35>, <&dmac2 0x34>; 644 dma-names = "tx", "rx", "tx", "rx"; 645 status = "disabled"; 646 }; 647 648 hscif3: serial@e66a0000 { 649 compatible = "renesas,hscif-r8a779h0", 650 "renesas,rcar-gen4-hscif", "renesas,hscif"; 651 reg = <0 0xe66a0000 0 0x60>; 652 interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>; 653 clocks = <&cpg CPG_MOD 517>, 654 <&cpg CPG_CORE R8A779H0_CLK_SASYNCPERD1>, 655 <&scif_clk>; 656 clock-names = "fck", "brg_int", "scif_clk"; 657 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 658 resets = <&cpg 517>; 659 dmas = <&dmac1 0x37>, <&dmac1 0x36>, 660 <&dmac2 0x37>, <&dmac2 0x36>; 661 dma-names = "tx", "rx", "tx", "rx"; 662 status = "disabled"; 663 }; 664 665 pciec0: pcie@e65d0000 { 666 compatible = "renesas,r8a779h0-pcie", 667 "renesas,rcar-gen4-pcie"; 668 reg = <0 0xe65d0000 0 0x1000>, <0 0xe65d2000 0 0x0800>, 669 <0 0xe65d3000 0 0x2000>, <0 0xe65d5000 0 0x1200>, 670 <0 0xe65d6200 0 0x0e00>, <0 0xe65d7000 0 0x0400>, 671 <0 0xfe000000 0 0x400000>; 672 reg-names = "dbi", "dbi2", "atu", "dma", "app", "phy", "config"; 673 interrupts = <GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>, 674 <GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH>, 675 <GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH>, 676 <GIC_SPI 455 IRQ_TYPE_LEVEL_HIGH>; 677 interrupt-names = "msi", "dma", "sft_ce", "app"; 678 clocks = <&cpg CPG_MOD 624>, <&pcie0_clkref>; 679 clock-names = "core", "ref"; 680 power-domains = <&sysc R8A779H0_PD_A2PCIPHY>; 681 resets = <&cpg 624>; 682 reset-names = "pwr"; 683 max-link-speed = <4>; 684 num-lanes = <2>; 685 #address-cells = <3>; 686 #size-cells = <2>; 687 bus-range = <0x00 0xff>; 688 device_type = "pci"; 689 ranges = <0x01000000 0 0x00000000 0 0xfe000000 0 0x00400000>, 690 <0x02000000 0 0x30000000 0 0x30000000 0 0x10000000>; 691 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>; 692 #interrupt-cells = <1>; 693 interrupt-map-mask = <0 0 0 7>; 694 interrupt-map = <0 0 0 1 &gic GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>, 695 <0 0 0 2 &gic GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>, 696 <0 0 0 3 &gic GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>, 697 <0 0 0 4 &gic GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>; 698 snps,enable-cdm-check; 699 status = "disabled"; 700 }; 701 702 pciec0_ep: pcie-ep@e65d0000 { 703 compatible = "renesas,r8a779h0-pcie-ep", 704 "renesas,rcar-gen4-pcie-ep"; 705 reg = <0 0xe65d0000 0 0x2000>, <0 0xe65d2000 0 0x1000>, 706 <0 0xe65d3000 0 0x2000>, <0 0xe65d5000 0 0x1200>, 707 <0 0xe65d6200 0 0x0e00>, <0 0xe65d7000 0 0x0400>, 708 <0 0xfe000000 0 0x400000>; 709 reg-names = "dbi", "dbi2", "atu", "dma", "app", "phy", "addr_space"; 710 interrupts = <GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH>, 711 <GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH>, 712 <GIC_SPI 455 IRQ_TYPE_LEVEL_HIGH>; 713 interrupt-names = "dma", "sft_ce", "app"; 714 clocks = <&cpg CPG_MOD 624>, <&pcie0_clkref>; 715 clock-names = "core", "ref"; 716 power-domains = <&sysc R8A779H0_PD_A2PCIPHY>; 717 resets = <&cpg 624>; 718 reset-names = "pwr"; 719 max-link-speed = <4>; 720 num-lanes = <2>; 721 max-functions = /bits/ 8 <2>; 722 status = "disabled"; 723 }; 724 725 canfd: can@e6660000 { 726 compatible = "renesas,r8a779h0-canfd", 727 "renesas,rcar-gen4-canfd"; 728 reg = <0 0xe6660000 0 0x8500>; 729 interrupts = <GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>, 730 <GIC_SPI 413 IRQ_TYPE_LEVEL_HIGH>; 731 interrupt-names = "ch_int", "g_int"; 732 clocks = <&cpg CPG_MOD 328>, 733 <&cpg CPG_CORE R8A779H0_CLK_CANFD>, 734 <&can_clk>; 735 clock-names = "fck", "canfd", "can_clk"; 736 assigned-clocks = <&cpg CPG_CORE R8A779H0_CLK_CANFD>; 737 assigned-clock-rates = <80000000>; 738 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 739 resets = <&cpg 328>; 740 status = "disabled"; 741 742 channel0 { 743 status = "disabled"; 744 }; 745 746 channel1 { 747 status = "disabled"; 748 }; 749 750 channel2 { 751 status = "disabled"; 752 }; 753 754 channel3 { 755 status = "disabled"; 756 }; 757 }; 758 759 avb0: ethernet@e6800000 { 760 compatible = "renesas,etheravb-r8a779h0", 761 "renesas,etheravb-rcar-gen4"; 762 reg = <0 0xe6800000 0 0x1000>; 763 interrupts = <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, 764 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 765 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 766 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 767 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 768 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 769 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 770 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 771 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 772 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 773 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 774 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, 775 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, 776 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, 777 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, 778 <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, 779 <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, 780 <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>, 781 <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>, 782 <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>, 783 <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>, 784 <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>, 785 <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>, 786 <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>, 787 <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 788 interrupt-names = "ch0", "ch1", "ch2", "ch3", 789 "ch4", "ch5", "ch6", "ch7", 790 "ch8", "ch9", "ch10", "ch11", 791 "ch12", "ch13", "ch14", "ch15", 792 "ch16", "ch17", "ch18", "ch19", 793 "ch20", "ch21", "ch22", "ch23", 794 "ch24"; 795 clocks = <&cpg CPG_MOD 211>; 796 clock-names = "fck"; 797 power-domains = <&sysc R8A779H0_PD_C4>; 798 resets = <&cpg 211>; 799 phy-mode = "rgmii"; 800 rx-internal-delay-ps = <0>; 801 tx-internal-delay-ps = <0>; 802 iommus = <&ipmmu_hc 0>; 803 status = "disabled"; 804 }; 805 806 avb1: ethernet@e6810000 { 807 compatible = "renesas,etheravb-r8a779h0", 808 "renesas,etheravb-rcar-gen4"; 809 reg = <0 0xe6810000 0 0x1000>; 810 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>, 811 <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>, 812 <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>, 813 <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>, 814 <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>, 815 <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>, 816 <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>, 817 <GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH>, 818 <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>, 819 <GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH>, 820 <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>, 821 <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>, 822 <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>, 823 <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>, 824 <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>, 825 <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>, 826 <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>, 827 <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>, 828 <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>, 829 <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>, 830 <GIC_SPI 380 IRQ_TYPE_LEVEL_HIGH>, 831 <GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH>, 832 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, 833 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>, 834 <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>; 835 interrupt-names = "ch0", "ch1", "ch2", "ch3", 836 "ch4", "ch5", "ch6", "ch7", 837 "ch8", "ch9", "ch10", "ch11", 838 "ch12", "ch13", "ch14", "ch15", 839 "ch16", "ch17", "ch18", "ch19", 840 "ch20", "ch21", "ch22", "ch23", 841 "ch24"; 842 clocks = <&cpg CPG_MOD 212>; 843 clock-names = "fck"; 844 power-domains = <&sysc R8A779H0_PD_C4>; 845 resets = <&cpg 212>; 846 phy-mode = "rgmii"; 847 rx-internal-delay-ps = <0>; 848 tx-internal-delay-ps = <0>; 849 iommus = <&ipmmu_hc 1>; 850 status = "disabled"; 851 }; 852 853 avb2: ethernet@e6820000 { 854 compatible = "renesas,etheravb-r8a779h0", 855 "renesas,etheravb-rcar-gen4"; 856 reg = <0 0xe6820000 0 0x1000>; 857 interrupts = <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>, 858 <GIC_SPI 386 IRQ_TYPE_LEVEL_HIGH>, 859 <GIC_SPI 387 IRQ_TYPE_LEVEL_HIGH>, 860 <GIC_SPI 388 IRQ_TYPE_LEVEL_HIGH>, 861 <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>, 862 <GIC_SPI 390 IRQ_TYPE_LEVEL_HIGH>, 863 <GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH>, 864 <GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH>, 865 <GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH>, 866 <GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH>, 867 <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>, 868 <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>, 869 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>, 870 <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 871 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 872 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 873 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 874 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 875 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 876 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 877 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>, 878 <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 879 <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 880 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>, 881 <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>; 882 interrupt-names = "ch0", "ch1", "ch2", "ch3", 883 "ch4", "ch5", "ch6", "ch7", 884 "ch8", "ch9", "ch10", "ch11", 885 "ch12", "ch13", "ch14", "ch15", 886 "ch16", "ch17", "ch18", "ch19", 887 "ch20", "ch21", "ch22", "ch23", 888 "ch24"; 889 clocks = <&cpg CPG_MOD 213>; 890 clock-names = "fck"; 891 power-domains = <&sysc R8A779H0_PD_C4>; 892 resets = <&cpg 213>; 893 phy-mode = "rgmii"; 894 rx-internal-delay-ps = <0>; 895 tx-internal-delay-ps = <0>; 896 iommus = <&ipmmu_hc 2>; 897 status = "disabled"; 898 }; 899 900 pwm0: pwm@e6e30000 { 901 compatible = "renesas,pwm-r8a779h0", "renesas,pwm-rcar"; 902 reg = <0 0xe6e30000 0 0x10>; 903 #pwm-cells = <2>; 904 clocks = <&cpg CPG_MOD 628>; 905 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 906 resets = <&cpg 628>; 907 status = "disabled"; 908 }; 909 910 pwm1: pwm@e6e31000 { 911 compatible = "renesas,pwm-r8a779h0", "renesas,pwm-rcar"; 912 reg = <0 0xe6e31000 0 0x10>; 913 #pwm-cells = <2>; 914 clocks = <&cpg CPG_MOD 628>; 915 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 916 resets = <&cpg 628>; 917 status = "disabled"; 918 }; 919 920 pwm2: pwm@e6e32000 { 921 compatible = "renesas,pwm-r8a779h0", "renesas,pwm-rcar"; 922 reg = <0 0xe6e32000 0 0x10>; 923 #pwm-cells = <2>; 924 clocks = <&cpg CPG_MOD 628>; 925 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 926 resets = <&cpg 628>; 927 status = "disabled"; 928 }; 929 930 pwm3: pwm@e6e33000 { 931 compatible = "renesas,pwm-r8a779h0", "renesas,pwm-rcar"; 932 reg = <0 0xe6e33000 0 0x10>; 933 #pwm-cells = <2>; 934 clocks = <&cpg CPG_MOD 628>; 935 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 936 resets = <&cpg 628>; 937 status = "disabled"; 938 }; 939 940 pwm4: pwm@e6e34000 { 941 compatible = "renesas,pwm-r8a779h0", "renesas,pwm-rcar"; 942 reg = <0 0xe6e34000 0 0x10>; 943 #pwm-cells = <2>; 944 clocks = <&cpg CPG_MOD 628>; 945 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 946 resets = <&cpg 628>; 947 status = "disabled"; 948 }; 949 950 scif0: serial@e6e60000 { 951 compatible = "renesas,scif-r8a779h0", 952 "renesas,rcar-gen4-scif", "renesas,scif"; 953 reg = <0 0xe6e60000 0 64>; 954 interrupts = <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>; 955 clocks = <&cpg CPG_MOD 702>, 956 <&cpg CPG_CORE R8A779H0_CLK_SASYNCPERD1>, 957 <&scif_clk>; 958 clock-names = "fck", "brg_int", "scif_clk"; 959 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 960 resets = <&cpg 702>; 961 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 962 <&dmac2 0x51>, <&dmac2 0x50>; 963 dma-names = "tx", "rx", "tx", "rx"; 964 status = "disabled"; 965 }; 966 967 scif1: serial@e6e68000 { 968 compatible = "renesas,scif-r8a779h0", 969 "renesas,rcar-gen4-scif", "renesas,scif"; 970 reg = <0 0xe6e68000 0 64>; 971 interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>; 972 clocks = <&cpg CPG_MOD 703>, 973 <&cpg CPG_CORE R8A779H0_CLK_SASYNCPERD1>, 974 <&scif_clk>; 975 clock-names = "fck", "brg_int", "scif_clk"; 976 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 977 resets = <&cpg 703>; 978 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 979 <&dmac2 0x53>, <&dmac2 0x52>; 980 dma-names = "tx", "rx", "tx", "rx"; 981 status = "disabled"; 982 }; 983 984 scif3: serial@e6c50000 { 985 compatible = "renesas,scif-r8a779h0", 986 "renesas,rcar-gen4-scif", "renesas,scif"; 987 reg = <0 0xe6c50000 0 64>; 988 interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>; 989 clocks = <&cpg CPG_MOD 704>, 990 <&cpg CPG_CORE R8A779H0_CLK_SASYNCPERD1>, 991 <&scif_clk>; 992 clock-names = "fck", "brg_int", "scif_clk"; 993 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 994 resets = <&cpg 704>; 995 dmas = <&dmac1 0x57>, <&dmac1 0x56>, 996 <&dmac2 0x57>, <&dmac2 0x56>; 997 dma-names = "tx", "rx", "tx", "rx"; 998 status = "disabled"; 999 }; 1000 1001 scif4: serial@e6c40000 { 1002 compatible = "renesas,scif-r8a779h0", 1003 "renesas,rcar-gen4-scif", "renesas,scif"; 1004 reg = <0 0xe6c40000 0 64>; 1005 interrupts = <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>; 1006 clocks = <&cpg CPG_MOD 705>, 1007 <&cpg CPG_CORE R8A779H0_CLK_SASYNCPERD1>, 1008 <&scif_clk2>; 1009 clock-names = "fck", "brg_int", "scif_clk"; 1010 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 1011 resets = <&cpg 705>; 1012 dmas = <&dmac1 0x59>, <&dmac1 0x58>, 1013 <&dmac2 0x59>, <&dmac2 0x58>; 1014 dma-names = "tx", "rx", "tx", "rx"; 1015 status = "disabled"; 1016 }; 1017 1018 msiof0: spi@e6e90000 { 1019 compatible = "renesas,msiof-r8a779h0", 1020 "renesas,rcar-gen4-msiof"; 1021 reg = <0 0xe6e90000 0 0x0064>; 1022 interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>; 1023 clocks = <&cpg CPG_MOD 618>; 1024 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 1025 <&dmac2 0x41>, <&dmac2 0x40>; 1026 dma-names = "tx", "rx", "tx", "rx"; 1027 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 1028 resets = <&cpg 618>; 1029 #address-cells = <1>; 1030 #size-cells = <0>; 1031 status = "disabled"; 1032 }; 1033 1034 msiof1: spi@e6ea0000 { 1035 compatible = "renesas,msiof-r8a779h0", 1036 "renesas,rcar-gen4-msiof"; 1037 reg = <0 0xe6ea0000 0 0x0064>; 1038 interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>; 1039 clocks = <&cpg CPG_MOD 619>; 1040 dmas = <&dmac1 0x43>, <&dmac1 0x42>, 1041 <&dmac2 0x43>, <&dmac2 0x42>; 1042 dma-names = "tx", "rx", "tx", "rx"; 1043 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 1044 resets = <&cpg 619>; 1045 #address-cells = <1>; 1046 #size-cells = <0>; 1047 status = "disabled"; 1048 }; 1049 1050 msiof2: spi@e6c00000 { 1051 compatible = "renesas,msiof-r8a779h0", 1052 "renesas,rcar-gen4-msiof"; 1053 reg = <0 0xe6c00000 0 0x0064>; 1054 interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>; 1055 clocks = <&cpg CPG_MOD 620>; 1056 dmas = <&dmac1 0x45>, <&dmac1 0x44>, 1057 <&dmac2 0x45>, <&dmac2 0x44>; 1058 dma-names = "tx", "rx", "tx", "rx"; 1059 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 1060 resets = <&cpg 620>; 1061 #address-cells = <1>; 1062 #size-cells = <0>; 1063 status = "disabled"; 1064 }; 1065 1066 msiof3: spi@e6c10000 { 1067 compatible = "renesas,msiof-r8a779h0", 1068 "renesas,rcar-gen4-msiof"; 1069 reg = <0 0xe6c10000 0 0x0064>; 1070 interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>; 1071 clocks = <&cpg CPG_MOD 621>; 1072 dmas = <&dmac1 0x47>, <&dmac1 0x46>, 1073 <&dmac2 0x47>, <&dmac2 0x46>; 1074 dma-names = "tx", "rx", "tx", "rx"; 1075 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 1076 resets = <&cpg 621>; 1077 #address-cells = <1>; 1078 #size-cells = <0>; 1079 status = "disabled"; 1080 }; 1081 1082 msiof4: spi@e6c20000 { 1083 compatible = "renesas,msiof-r8a779h0", 1084 "renesas,rcar-gen4-msiof"; 1085 reg = <0 0xe6c20000 0 0x0064>; 1086 interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; 1087 clocks = <&cpg CPG_MOD 622>; 1088 dmas = <&dmac1 0x49>, <&dmac1 0x48>, 1089 <&dmac2 0x49>, <&dmac2 0x48>; 1090 dma-names = "tx", "rx", "tx", "rx"; 1091 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 1092 resets = <&cpg 622>; 1093 #address-cells = <1>; 1094 #size-cells = <0>; 1095 status = "disabled"; 1096 }; 1097 1098 msiof5: spi@e6c28000 { 1099 compatible = "renesas,msiof-r8a779h0", 1100 "renesas,rcar-gen4-msiof"; 1101 reg = <0 0xe6c28000 0 0x0064>; 1102 interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>; 1103 clocks = <&cpg CPG_MOD 623>; 1104 dmas = <&dmac1 0x4b>, <&dmac1 0x4a>, 1105 <&dmac2 0x4b>, <&dmac2 0x4a>; 1106 dma-names = "tx", "rx", "tx", "rx"; 1107 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 1108 resets = <&cpg 623>; 1109 #address-cells = <1>; 1110 #size-cells = <0>; 1111 status = "disabled"; 1112 }; 1113 1114 vin00: video@e6ef0000 { 1115 compatible = "renesas,vin-r8a779h0", 1116 "renesas,rcar-gen4-vin"; 1117 reg = <0 0xe6ef0000 0 0x1000>; 1118 interrupts = <GIC_SPI 529 IRQ_TYPE_LEVEL_HIGH>; 1119 clocks = <&cpg CPG_MOD 730>; 1120 power-domains = <&sysc R8A779H0_PD_C4>; 1121 resets = <&cpg 730>; 1122 renesas,id = <0>; 1123 status = "disabled"; 1124 1125 ports { 1126 #address-cells = <1>; 1127 #size-cells = <0>; 1128 1129 port@2 { 1130 #address-cells = <1>; 1131 #size-cells = <0>; 1132 1133 reg = <2>; 1134 1135 vin00isp0: endpoint@0 { 1136 reg = <0>; 1137 remote-endpoint = <&isp0vin00>; 1138 }; 1139 }; 1140 }; 1141 }; 1142 1143 vin01: video@e6ef1000 { 1144 compatible = "renesas,vin-r8a779h0", 1145 "renesas,rcar-gen4-vin"; 1146 reg = <0 0xe6ef1000 0 0x1000>; 1147 interrupts = <GIC_SPI 530 IRQ_TYPE_LEVEL_HIGH>; 1148 clocks = <&cpg CPG_MOD 731>; 1149 power-domains = <&sysc R8A779H0_PD_C4>; 1150 resets = <&cpg 731>; 1151 renesas,id = <1>; 1152 status = "disabled"; 1153 1154 ports { 1155 #address-cells = <1>; 1156 #size-cells = <0>; 1157 1158 port@2 { 1159 #address-cells = <1>; 1160 #size-cells = <0>; 1161 1162 reg = <2>; 1163 1164 vin01isp0: endpoint@0 { 1165 reg = <0>; 1166 remote-endpoint = <&isp0vin01>; 1167 }; 1168 }; 1169 }; 1170 }; 1171 1172 vin02: video@e6ef2000 { 1173 compatible = "renesas,vin-r8a779h0", 1174 "renesas,rcar-gen4-vin"; 1175 reg = <0 0xe6ef2000 0 0x1000>; 1176 interrupts = <GIC_SPI 531 IRQ_TYPE_LEVEL_HIGH>; 1177 clocks = <&cpg CPG_MOD 800>; 1178 power-domains = <&sysc R8A779H0_PD_C4>; 1179 resets = <&cpg 800>; 1180 renesas,id = <2>; 1181 status = "disabled"; 1182 1183 ports { 1184 #address-cells = <1>; 1185 #size-cells = <0>; 1186 1187 port@2 { 1188 #address-cells = <1>; 1189 #size-cells = <0>; 1190 1191 reg = <2>; 1192 1193 vin02isp0: endpoint@0 { 1194 reg = <0>; 1195 remote-endpoint = <&isp0vin02>; 1196 }; 1197 }; 1198 }; 1199 }; 1200 1201 vin03: video@e6ef3000 { 1202 compatible = "renesas,vin-r8a779h0", 1203 "renesas,rcar-gen4-vin"; 1204 reg = <0 0xe6ef3000 0 0x1000>; 1205 interrupts = <GIC_SPI 532 IRQ_TYPE_LEVEL_HIGH>; 1206 clocks = <&cpg CPG_MOD 801>; 1207 power-domains = <&sysc R8A779H0_PD_C4>; 1208 resets = <&cpg 801>; 1209 renesas,id = <3>; 1210 status = "disabled"; 1211 1212 ports { 1213 #address-cells = <1>; 1214 #size-cells = <0>; 1215 1216 port@2 { 1217 #address-cells = <1>; 1218 #size-cells = <0>; 1219 1220 reg = <2>; 1221 1222 vin03isp0: endpoint@0 { 1223 reg = <0>; 1224 remote-endpoint = <&isp0vin03>; 1225 }; 1226 }; 1227 }; 1228 }; 1229 1230 vin04: video@e6ef4000 { 1231 compatible = "renesas,vin-r8a779h0", 1232 "renesas,rcar-gen4-vin"; 1233 reg = <0 0xe6ef4000 0 0x1000>; 1234 interrupts = <GIC_SPI 533 IRQ_TYPE_LEVEL_HIGH>; 1235 clocks = <&cpg CPG_MOD 802>; 1236 power-domains = <&sysc R8A779H0_PD_C4>; 1237 resets = <&cpg 802>; 1238 renesas,id = <4>; 1239 status = "disabled"; 1240 1241 ports { 1242 #address-cells = <1>; 1243 #size-cells = <0>; 1244 1245 port@2 { 1246 #address-cells = <1>; 1247 #size-cells = <0>; 1248 1249 reg = <2>; 1250 1251 vin04isp0: endpoint@0 { 1252 reg = <0>; 1253 remote-endpoint = <&isp0vin04>; 1254 }; 1255 }; 1256 }; 1257 }; 1258 1259 vin05: video@e6ef5000 { 1260 compatible = "renesas,vin-r8a779h0", 1261 "renesas,rcar-gen4-vin"; 1262 reg = <0 0xe6ef5000 0 0x1000>; 1263 interrupts = <GIC_SPI 534 IRQ_TYPE_LEVEL_HIGH>; 1264 clocks = <&cpg CPG_MOD 803>; 1265 power-domains = <&sysc R8A779H0_PD_C4>; 1266 resets = <&cpg 803>; 1267 renesas,id = <5>; 1268 status = "disabled"; 1269 1270 ports { 1271 #address-cells = <1>; 1272 #size-cells = <0>; 1273 1274 port@2 { 1275 #address-cells = <1>; 1276 #size-cells = <0>; 1277 1278 reg = <2>; 1279 1280 vin05isp0: endpoint@0 { 1281 reg = <0>; 1282 remote-endpoint = <&isp0vin05>; 1283 }; 1284 }; 1285 }; 1286 }; 1287 1288 vin06: video@e6ef6000 { 1289 compatible = "renesas,vin-r8a779h0", 1290 "renesas,rcar-gen4-vin"; 1291 reg = <0 0xe6ef6000 0 0x1000>; 1292 interrupts = <GIC_SPI 535 IRQ_TYPE_LEVEL_HIGH>; 1293 clocks = <&cpg CPG_MOD 804>; 1294 power-domains = <&sysc R8A779H0_PD_C4>; 1295 resets = <&cpg 804>; 1296 renesas,id = <6>; 1297 status = "disabled"; 1298 1299 ports { 1300 #address-cells = <1>; 1301 #size-cells = <0>; 1302 1303 port@2 { 1304 #address-cells = <1>; 1305 #size-cells = <0>; 1306 1307 reg = <2>; 1308 1309 vin06isp0: endpoint@0 { 1310 reg = <0>; 1311 remote-endpoint = <&isp0vin06>; 1312 }; 1313 }; 1314 }; 1315 }; 1316 1317 vin07: video@e6ef7000 { 1318 compatible = "renesas,vin-r8a779h0", 1319 "renesas,rcar-gen4-vin"; 1320 reg = <0 0xe6ef7000 0 0x1000>; 1321 interrupts = <GIC_SPI 536 IRQ_TYPE_LEVEL_HIGH>; 1322 clocks = <&cpg CPG_MOD 805>; 1323 power-domains = <&sysc R8A779H0_PD_C4>; 1324 resets = <&cpg 805>; 1325 renesas,id = <7>; 1326 status = "disabled"; 1327 1328 ports { 1329 #address-cells = <1>; 1330 #size-cells = <0>; 1331 1332 port@2 { 1333 #address-cells = <1>; 1334 #size-cells = <0>; 1335 1336 reg = <2>; 1337 1338 vin07isp0: endpoint@0 { 1339 reg = <0>; 1340 remote-endpoint = <&isp0vin07>; 1341 }; 1342 }; 1343 }; 1344 }; 1345 1346 vin08: video@e6ef8000 { 1347 compatible = "renesas,vin-r8a779h0", 1348 "renesas,rcar-gen4-vin"; 1349 reg = <0 0xe6ef8000 0 0x1000>; 1350 interrupts = <GIC_SPI 537 IRQ_TYPE_LEVEL_HIGH>; 1351 clocks = <&cpg CPG_MOD 806>; 1352 power-domains = <&sysc R8A779H0_PD_C4>; 1353 resets = <&cpg 806>; 1354 renesas,id = <8>; 1355 status = "disabled"; 1356 1357 ports { 1358 #address-cells = <1>; 1359 #size-cells = <0>; 1360 1361 port@2 { 1362 #address-cells = <1>; 1363 #size-cells = <0>; 1364 1365 reg = <2>; 1366 1367 vin08isp1: endpoint@1 { 1368 reg = <1>; 1369 remote-endpoint = <&isp1vin08>; 1370 }; 1371 }; 1372 }; 1373 }; 1374 1375 vin09: video@e6ef9000 { 1376 compatible = "renesas,vin-r8a779h0", 1377 "renesas,rcar-gen4-vin"; 1378 reg = <0 0xe6ef9000 0 0x1000>; 1379 interrupts = <GIC_SPI 538 IRQ_TYPE_LEVEL_HIGH>; 1380 clocks = <&cpg CPG_MOD 807>; 1381 power-domains = <&sysc R8A779H0_PD_C4>; 1382 resets = <&cpg 807>; 1383 renesas,id = <9>; 1384 status = "disabled"; 1385 1386 ports { 1387 #address-cells = <1>; 1388 #size-cells = <0>; 1389 1390 port@2 { 1391 #address-cells = <1>; 1392 #size-cells = <0>; 1393 1394 reg = <2>; 1395 1396 vin09isp1: endpoint@1 { 1397 reg = <1>; 1398 remote-endpoint = <&isp1vin09>; 1399 }; 1400 }; 1401 }; 1402 }; 1403 1404 vin10: video@e6efa000 { 1405 compatible = "renesas,vin-r8a779h0", 1406 "renesas,rcar-gen4-vin"; 1407 reg = <0 0xe6efa000 0 0x1000>; 1408 interrupts = <GIC_SPI 539 IRQ_TYPE_LEVEL_HIGH>; 1409 clocks = <&cpg CPG_MOD 808>; 1410 power-domains = <&sysc R8A779H0_PD_C4>; 1411 resets = <&cpg 808>; 1412 renesas,id = <10>; 1413 status = "disabled"; 1414 1415 ports { 1416 #address-cells = <1>; 1417 #size-cells = <0>; 1418 1419 port@2 { 1420 #address-cells = <1>; 1421 #size-cells = <0>; 1422 1423 reg = <2>; 1424 1425 vin10isp1: endpoint@1 { 1426 reg = <1>; 1427 remote-endpoint = <&isp1vin10>; 1428 }; 1429 }; 1430 }; 1431 }; 1432 1433 vin11: video@e6efb000 { 1434 compatible = "renesas,vin-r8a779h0", 1435 "renesas,rcar-gen4-vin"; 1436 reg = <0 0xe6efb000 0 0x1000>; 1437 interrupts = <GIC_SPI 540 IRQ_TYPE_LEVEL_HIGH>; 1438 clocks = <&cpg CPG_MOD 809>; 1439 power-domains = <&sysc R8A779H0_PD_C4>; 1440 resets = <&cpg 809>; 1441 renesas,id = <11>; 1442 status = "disabled"; 1443 1444 ports { 1445 #address-cells = <1>; 1446 #size-cells = <0>; 1447 1448 port@2 { 1449 #address-cells = <1>; 1450 #size-cells = <0>; 1451 1452 reg = <2>; 1453 1454 vin11isp1: endpoint@1 { 1455 reg = <1>; 1456 remote-endpoint = <&isp1vin11>; 1457 }; 1458 }; 1459 }; 1460 }; 1461 1462 vin12: video@e6efc000 { 1463 compatible = "renesas,vin-r8a779h0", 1464 "renesas,rcar-gen4-vin"; 1465 reg = <0 0xe6efc000 0 0x1000>; 1466 interrupts = <GIC_SPI 541 IRQ_TYPE_LEVEL_HIGH>; 1467 clocks = <&cpg CPG_MOD 810>; 1468 power-domains = <&sysc R8A779H0_PD_C4>; 1469 resets = <&cpg 810>; 1470 renesas,id = <12>; 1471 status = "disabled"; 1472 1473 ports { 1474 #address-cells = <1>; 1475 #size-cells = <0>; 1476 1477 port@2 { 1478 #address-cells = <1>; 1479 #size-cells = <0>; 1480 1481 reg = <2>; 1482 1483 vin12isp1: endpoint@1 { 1484 reg = <1>; 1485 remote-endpoint = <&isp1vin12>; 1486 }; 1487 }; 1488 }; 1489 }; 1490 1491 vin13: video@e6efd000 { 1492 compatible = "renesas,vin-r8a779h0", 1493 "renesas,rcar-gen4-vin"; 1494 reg = <0 0xe6efd000 0 0x1000>; 1495 interrupts = <GIC_SPI 542 IRQ_TYPE_LEVEL_HIGH>; 1496 clocks = <&cpg CPG_MOD 811>; 1497 power-domains = <&sysc R8A779H0_PD_C4>; 1498 resets = <&cpg 811>; 1499 renesas,id = <13>; 1500 status = "disabled"; 1501 1502 ports { 1503 #address-cells = <1>; 1504 #size-cells = <0>; 1505 1506 port@2 { 1507 #address-cells = <1>; 1508 #size-cells = <0>; 1509 1510 reg = <2>; 1511 1512 vin13isp1: endpoint@1 { 1513 reg = <1>; 1514 remote-endpoint = <&isp1vin13>; 1515 }; 1516 }; 1517 }; 1518 }; 1519 1520 vin14: video@e6efe000 { 1521 compatible = "renesas,vin-r8a779h0", 1522 "renesas,rcar-gen4-vin"; 1523 reg = <0 0xe6efe000 0 0x1000>; 1524 interrupts = <GIC_SPI 543 IRQ_TYPE_LEVEL_HIGH>; 1525 clocks = <&cpg CPG_MOD 812>; 1526 power-domains = <&sysc R8A779H0_PD_C4>; 1527 resets = <&cpg 812>; 1528 renesas,id = <14>; 1529 status = "disabled"; 1530 1531 ports { 1532 #address-cells = <1>; 1533 #size-cells = <0>; 1534 1535 port@2 { 1536 #address-cells = <1>; 1537 #size-cells = <0>; 1538 1539 reg = <2>; 1540 1541 vin14isp1: endpoint@1 { 1542 reg = <1>; 1543 remote-endpoint = <&isp1vin14>; 1544 }; 1545 }; 1546 }; 1547 }; 1548 1549 vin15: video@e6eff000 { 1550 compatible = "renesas,vin-r8a779h0", 1551 "renesas,rcar-gen4-vin"; 1552 reg = <0 0xe6eff000 0 0x1000>; 1553 interrupts = <GIC_SPI 544 IRQ_TYPE_LEVEL_HIGH>; 1554 clocks = <&cpg CPG_MOD 813>; 1555 power-domains = <&sysc R8A779H0_PD_C4>; 1556 resets = <&cpg 813>; 1557 renesas,id = <15>; 1558 status = "disabled"; 1559 1560 ports { 1561 #address-cells = <1>; 1562 #size-cells = <0>; 1563 1564 port@2 { 1565 #address-cells = <1>; 1566 #size-cells = <0>; 1567 1568 reg = <2>; 1569 1570 vin15isp1: endpoint@1 { 1571 reg = <1>; 1572 remote-endpoint = <&isp1vin15>; 1573 }; 1574 }; 1575 }; 1576 }; 1577 1578 dmac1: dma-controller@e7350000 { 1579 compatible = "renesas,dmac-r8a779h0", 1580 "renesas,rcar-gen4-dmac"; 1581 reg = <0 0xe7350000 0 0x1000>, 1582 <0 0xe7300000 0 0x10000>; 1583 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>, 1584 <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>, 1585 <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>, 1586 <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 1587 <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, 1588 <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, 1589 <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, 1590 <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>, 1591 <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, 1592 <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>, 1593 <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>, 1594 <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, 1595 <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>, 1596 <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>, 1597 <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>, 1598 <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>, 1599 <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; 1600 interrupt-names = "error", 1601 "ch0", "ch1", "ch2", "ch3", "ch4", 1602 "ch5", "ch6", "ch7", "ch8", "ch9", 1603 "ch10", "ch11", "ch12", "ch13", 1604 "ch14", "ch15"; 1605 clocks = <&cpg CPG_MOD 709>; 1606 clock-names = "fck"; 1607 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 1608 resets = <&cpg 709>; 1609 #dma-cells = <1>; 1610 dma-channels = <16>; 1611 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 1612 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 1613 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 1614 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, 1615 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, 1616 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, 1617 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, 1618 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; 1619 }; 1620 1621 dmac2: dma-controller@e7351000 { 1622 compatible = "renesas,dmac-r8a779h0", 1623 "renesas,rcar-gen4-dmac"; 1624 reg = <0 0xe7351000 0 0x1000>, 1625 <0 0xe7310000 0 0x10000>; 1626 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, 1627 <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>, 1628 <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>, 1629 <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, 1630 <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, 1631 <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, 1632 <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, 1633 <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, 1634 <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 1635 interrupt-names = "error", 1636 "ch0", "ch1", "ch2", "ch3", "ch4", 1637 "ch5", "ch6", "ch7"; 1638 clocks = <&cpg CPG_MOD 710>; 1639 clock-names = "fck"; 1640 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 1641 resets = <&cpg 710>; 1642 #dma-cells = <1>; 1643 dma-channels = <8>; 1644 iommus = <&ipmmu_ds0 16>, <&ipmmu_ds0 17>, 1645 <&ipmmu_ds0 18>, <&ipmmu_ds0 19>, 1646 <&ipmmu_ds0 20>, <&ipmmu_ds0 21>, 1647 <&ipmmu_ds0 22>, <&ipmmu_ds0 23>; 1648 }; 1649 1650 rcar_sound: sound@ec400000 { 1651 compatible = "renesas,rcar_sound-r8a779h0", "renesas,rcar_sound-gen4"; 1652 reg = <0 0xec400000 0 0x40000>, 1653 <0 0xec540000 0 0x1000>, 1654 <0 0xec541000 0 0x050>, 1655 <0 0xec5a0000 0 0x020>; 1656 reg-names = "sdmc", "ssiu", "ssi", "adg"; 1657 clocks = <&cpg CPG_MOD 2926>, <&cpg CPG_MOD 2927>, <&audio_clkin>; 1658 clock-names = "ssiu.0", "ssi.0", "clkin"; 1659 /* #clock-cells is fixed */ 1660 #clock-cells = <0>; 1661 /* #sound-dai-cells is fixed */ 1662 #sound-dai-cells = <0>; 1663 1664 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 1665 resets = <&cpg 2926>, <&cpg 2927>; 1666 reset-names = "ssiu.0", "ssi.0"; 1667 status = "disabled"; 1668 1669 rcar_sound,ssiu { 1670 ssiu00: ssiu-0 { 1671 dmas = <&dmac1 0x6e>, <&dmac1 0x6f>; 1672 dma-names = "tx", "rx"; 1673 }; 1674 ssiu01: ssiu-1 { 1675 dmas = <&dmac1 0x6c>, <&dmac1 0x6d>; 1676 dma-names = "tx", "rx"; 1677 }; 1678 ssiu02: ssiu-2 { 1679 dmas = <&dmac1 0x6a>, <&dmac1 0x6b>; 1680 dma-names = "tx", "rx"; 1681 }; 1682 ssiu03: ssiu-3 { 1683 dmas = <&dmac1 0x68>, <&dmac1 0x69>; 1684 dma-names = "tx", "rx"; 1685 }; 1686 ssiu04: ssiu-4 { 1687 dmas = <&dmac1 0x66>, <&dmac1 0x67>; 1688 dma-names = "tx", "rx"; 1689 }; 1690 ssiu05: ssiu-5 { 1691 dmas = <&dmac1 0x64>, <&dmac1 0x65>; 1692 dma-names = "tx", "rx"; 1693 }; 1694 ssiu06: ssiu-6 { 1695 dmas = <&dmac1 0x62>, <&dmac1 0x63>; 1696 dma-names = "tx", "rx"; 1697 }; 1698 ssiu07: ssiu-7 { 1699 dmas = <&dmac1 0x60>, <&dmac1 0x61>; 1700 dma-names = "tx", "rx"; 1701 }; 1702 }; 1703 1704 rcar_sound,ssi { 1705 ssi0: ssi-0 { 1706 interrupts = <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>; 1707 }; 1708 }; 1709 }; 1710 1711 mmc0: mmc@ee140000 { 1712 compatible = "renesas,sdhi-r8a779h0", 1713 "renesas,rcar-gen4-sdhi"; 1714 reg = <0 0xee140000 0 0x2000>; 1715 interrupts = <GIC_SPI 440 IRQ_TYPE_LEVEL_HIGH>; 1716 clocks = <&cpg CPG_MOD 706>, 1717 <&cpg CPG_CORE R8A779H0_CLK_SD0H>; 1718 clock-names = "core", "clkh"; 1719 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 1720 resets = <&cpg 706>; 1721 max-frequency = <200000000>; 1722 iommus = <&ipmmu_ds0 32>; 1723 status = "disabled"; 1724 }; 1725 1726 rpc: spi@ee200000 { 1727 compatible = "renesas,r8a779h0-rpc-if", 1728 "renesas,rcar-gen4-rpc-if"; 1729 reg = <0 0xee200000 0 0x200>, 1730 <0 0x08000000 0 0x04000000>, 1731 <0 0xee208000 0 0x100>; 1732 reg-names = "regs", "dirmap", "wbuf"; 1733 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; 1734 clocks = <&cpg CPG_MOD 629>; 1735 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 1736 resets = <&cpg 629>; 1737 #address-cells = <1>; 1738 #size-cells = <0>; 1739 status = "disabled"; 1740 }; 1741 1742 ipmmu_rt0: iommu@ee480000 { 1743 compatible = "renesas,ipmmu-r8a779h0", 1744 "renesas,rcar-gen4-ipmmu-vmsa"; 1745 reg = <0 0xee480000 0 0x20000>; 1746 renesas,ipmmu-main = <&ipmmu_mm>; 1747 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 1748 #iommu-cells = <1>; 1749 }; 1750 1751 ipmmu_rt1: iommu@ee4c0000 { 1752 compatible = "renesas,ipmmu-r8a779h0", 1753 "renesas,rcar-gen4-ipmmu-vmsa"; 1754 reg = <0 0xee4c0000 0 0x20000>; 1755 renesas,ipmmu-main = <&ipmmu_mm>; 1756 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 1757 #iommu-cells = <1>; 1758 }; 1759 1760 ipmmu_ds0: iommu@eed00000 { 1761 compatible = "renesas,ipmmu-r8a779h0", 1762 "renesas,rcar-gen4-ipmmu-vmsa"; 1763 reg = <0 0xeed00000 0 0x20000>; 1764 renesas,ipmmu-main = <&ipmmu_mm>; 1765 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 1766 #iommu-cells = <1>; 1767 }; 1768 1769 ipmmu_hc: iommu@eed40000 { 1770 compatible = "renesas,ipmmu-r8a779h0", 1771 "renesas,rcar-gen4-ipmmu-vmsa"; 1772 reg = <0 0xeed40000 0 0x20000>; 1773 renesas,ipmmu-main = <&ipmmu_mm>; 1774 power-domains = <&sysc R8A779H0_PD_C4>; 1775 #iommu-cells = <1>; 1776 }; 1777 1778 ipmmu_ir: iommu@eed80000 { 1779 compatible = "renesas,ipmmu-r8a779h0", 1780 "renesas,rcar-gen4-ipmmu-vmsa"; 1781 reg = <0 0xeed80000 0 0x20000>; 1782 renesas,ipmmu-main = <&ipmmu_mm>; 1783 power-domains = <&sysc R8A779H0_PD_C4>; 1784 #iommu-cells = <1>; 1785 }; 1786 1787 ipmmu_vc: iommu@eedc0000 { 1788 compatible = "renesas,ipmmu-r8a779h0", 1789 "renesas,rcar-gen4-ipmmu-vmsa"; 1790 reg = <0 0xeedc0000 0 0x20000>; 1791 renesas,ipmmu-main = <&ipmmu_mm>; 1792 power-domains = <&sysc R8A779H0_PD_C4>; 1793 #iommu-cells = <1>; 1794 }; 1795 1796 ipmmu_3dg: iommu@eee00000 { 1797 compatible = "renesas,ipmmu-r8a779h0", 1798 "renesas,rcar-gen4-ipmmu-vmsa"; 1799 reg = <0 0xeee00000 0 0x20000>; 1800 renesas,ipmmu-main = <&ipmmu_mm>; 1801 power-domains = <&sysc R8A779H0_PD_C4>; 1802 #iommu-cells = <1>; 1803 }; 1804 1805 ipmmu_vi0: iommu@eee80000 { 1806 compatible = "renesas,ipmmu-r8a779h0", 1807 "renesas,rcar-gen4-ipmmu-vmsa"; 1808 reg = <0 0xeee80000 0 0x20000>; 1809 renesas,ipmmu-main = <&ipmmu_mm>; 1810 power-domains = <&sysc R8A779H0_PD_C4>; 1811 #iommu-cells = <1>; 1812 }; 1813 1814 ipmmu_vi1: iommu@eeec0000 { 1815 compatible = "renesas,ipmmu-r8a779h0", 1816 "renesas,rcar-gen4-ipmmu-vmsa"; 1817 reg = <0 0xeeec0000 0 0x20000>; 1818 renesas,ipmmu-main = <&ipmmu_mm>; 1819 power-domains = <&sysc R8A779H0_PD_C4>; 1820 #iommu-cells = <1>; 1821 }; 1822 1823 ipmmu_vip0: iommu@eef00000 { 1824 compatible = "renesas,ipmmu-r8a779h0", 1825 "renesas,rcar-gen4-ipmmu-vmsa"; 1826 reg = <0 0xeef00000 0 0x20000>; 1827 renesas,ipmmu-main = <&ipmmu_mm>; 1828 power-domains = <&sysc R8A779H0_PD_C4>; 1829 #iommu-cells = <1>; 1830 }; 1831 1832 ipmmu_mm: iommu@eefc0000 { 1833 compatible = "renesas,ipmmu-r8a779h0", 1834 "renesas,rcar-gen4-ipmmu-vmsa"; 1835 reg = <0 0xeefc0000 0 0x20000>; 1836 interrupts = <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 1837 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>; 1838 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 1839 #iommu-cells = <1>; 1840 }; 1841 1842 gic: interrupt-controller@f1000000 { 1843 compatible = "arm,gic-v3"; 1844 #interrupt-cells = <3>; 1845 #address-cells = <0>; 1846 interrupt-controller; 1847 reg = <0x0 0xf1000000 0 0x20000>, 1848 <0x0 0xf1060000 0 0x110000>; 1849 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; 1850 }; 1851 1852 csi40: csi2@fe500000 { 1853 compatible = "renesas,r8a779h0-csi2"; 1854 reg = <0 0xfe500000 0 0x40000>; 1855 interrupts = <GIC_SPI 499 IRQ_TYPE_LEVEL_HIGH>; 1856 clocks = <&cpg CPG_MOD 331>; 1857 power-domains = <&sysc R8A779H0_PD_C4>; 1858 resets = <&cpg 331>; 1859 status = "disabled"; 1860 1861 ports { 1862 #address-cells = <1>; 1863 #size-cells = <0>; 1864 1865 port@0 { 1866 reg = <0>; 1867 }; 1868 1869 port@1 { 1870 reg = <1>; 1871 csi40isp0: endpoint { 1872 remote-endpoint = <&isp0csi40>; 1873 }; 1874 }; 1875 }; 1876 }; 1877 1878 csi41: csi2@fe540000 { 1879 compatible = "renesas,r8a779h0-csi2"; 1880 reg = <0 0xfe540000 0 0x40000>; 1881 interrupts = <GIC_SPI 500 IRQ_TYPE_LEVEL_HIGH>; 1882 clocks = <&cpg CPG_MOD 400>; 1883 power-domains = <&sysc R8A779H0_PD_C4>; 1884 resets = <&cpg 400>; 1885 status = "disabled"; 1886 1887 ports { 1888 #address-cells = <1>; 1889 #size-cells = <0>; 1890 1891 port@0 { 1892 reg = <0>; 1893 }; 1894 1895 port@1 { 1896 reg = <1>; 1897 csi41isp1: endpoint { 1898 remote-endpoint = <&isp1csi41>; 1899 }; 1900 }; 1901 }; 1902 }; 1903 1904 fcpvd0: fcp@fea10000 { 1905 compatible = "renesas,fcpv"; 1906 reg = <0 0xfea10000 0 0x200>; 1907 clocks = <&cpg CPG_MOD 508>; 1908 power-domains = <&sysc R8A779H0_PD_C4>; 1909 resets = <&cpg 508>; 1910 }; 1911 1912 fcpvx0: fcp@fedb0000 { 1913 compatible = "renesas,fcpv"; 1914 reg = <0 0xfedb0000 0 0x200>; 1915 clocks = <&cpg CPG_MOD 1100>; 1916 power-domains = <&sysc R8A779H0_PD_A3ISP0>; 1917 resets = <&cpg 1100>; 1918 iommus = <&ipmmu_vi1 24>; 1919 }; 1920 1921 vspd0: vsp@fea20000 { 1922 compatible = "renesas,vsp2"; 1923 reg = <0 0xfea20000 0 0x8000>; 1924 interrupts = <GIC_SPI 546 IRQ_TYPE_LEVEL_HIGH>; 1925 clocks = <&cpg CPG_MOD 830>; 1926 power-domains = <&sysc R8A779H0_PD_C4>; 1927 resets = <&cpg 830>; 1928 renesas,fcp = <&fcpvd0>; 1929 }; 1930 1931 vspx0: vsp@fedd0000 { 1932 compatible = "renesas,vsp2"; 1933 reg = <0 0xfedd0000 0 0x8000>; 1934 interrupts = <GIC_SPI 556 IRQ_TYPE_LEVEL_HIGH>; 1935 clocks = <&cpg CPG_MOD 1028>; 1936 power-domains = <&sysc R8A779H0_PD_A3ISP0>; 1937 resets = <&cpg 1028>; 1938 1939 renesas,fcp = <&fcpvx0>; 1940 }; 1941 1942 du: display@feb00000 { 1943 compatible = "renesas,du-r8a779h0"; 1944 reg = <0 0xfeb00000 0 0x40000>; 1945 interrupts = <GIC_SPI 523 IRQ_TYPE_LEVEL_HIGH>; 1946 clocks = <&cpg CPG_MOD 411>; 1947 clock-names = "du.0"; 1948 power-domains = <&sysc R8A779H0_PD_C4>; 1949 resets = <&cpg 411>; 1950 reset-names = "du.0"; 1951 renesas,vsps = <&vspd0 0>; 1952 1953 status = "disabled"; 1954 1955 ports { 1956 #address-cells = <1>; 1957 #size-cells = <0>; 1958 1959 port@0 { 1960 reg = <0>; 1961 du_out_dsi0: endpoint { 1962 remote-endpoint = <&dsi0_in>; 1963 }; 1964 }; 1965 }; 1966 }; 1967 1968 isp0: isp@fed00000 { 1969 compatible = "renesas,r8a779h0-isp", 1970 "renesas,rcar-gen4-isp"; 1971 reg = <0 0xfed00000 0 0x10000>; 1972 interrupts = <GIC_SPI 473 IRQ_TYPE_LEVEL_LOW>; 1973 clocks = <&cpg CPG_MOD 612>; 1974 power-domains = <&sysc R8A779H0_PD_A3ISP0>; 1975 resets = <&cpg 612>; 1976 status = "disabled"; 1977 1978 ports { 1979 #address-cells = <1>; 1980 #size-cells = <0>; 1981 1982 port@0 { 1983 #address-cells = <1>; 1984 #size-cells = <0>; 1985 1986 reg = <0>; 1987 1988 isp0csi40: endpoint@0 { 1989 reg = <0>; 1990 remote-endpoint = <&csi40isp0>; 1991 }; 1992 }; 1993 1994 port@1 { 1995 reg = <1>; 1996 isp0vin00: endpoint { 1997 remote-endpoint = <&vin00isp0>; 1998 }; 1999 }; 2000 2001 port@2 { 2002 reg = <2>; 2003 isp0vin01: endpoint { 2004 remote-endpoint = <&vin01isp0>; 2005 }; 2006 }; 2007 2008 port@3 { 2009 reg = <3>; 2010 isp0vin02: endpoint { 2011 remote-endpoint = <&vin02isp0>; 2012 }; 2013 }; 2014 2015 port@4 { 2016 reg = <4>; 2017 isp0vin03: endpoint { 2018 remote-endpoint = <&vin03isp0>; 2019 }; 2020 }; 2021 2022 port@5 { 2023 reg = <5>; 2024 isp0vin04: endpoint { 2025 remote-endpoint = <&vin04isp0>; 2026 }; 2027 }; 2028 2029 port@6 { 2030 reg = <6>; 2031 isp0vin05: endpoint { 2032 remote-endpoint = <&vin05isp0>; 2033 }; 2034 }; 2035 2036 port@7 { 2037 reg = <7>; 2038 isp0vin06: endpoint { 2039 remote-endpoint = <&vin06isp0>; 2040 }; 2041 }; 2042 2043 port@8 { 2044 reg = <8>; 2045 isp0vin07: endpoint { 2046 remote-endpoint = <&vin07isp0>; 2047 }; 2048 }; 2049 }; 2050 }; 2051 2052 isp1: isp@fed20000 { 2053 compatible = "renesas,r8a779h0-isp", 2054 "renesas,rcar-gen4-isp"; 2055 reg = <0 0xfed20000 0 0x10000>; 2056 interrupts = <GIC_SPI 474 IRQ_TYPE_LEVEL_LOW>; 2057 clocks = <&cpg CPG_MOD 613>; 2058 power-domains = <&sysc R8A779H0_PD_A3ISP0>; 2059 resets = <&cpg 613>; 2060 status = "disabled"; 2061 2062 ports { 2063 #address-cells = <1>; 2064 #size-cells = <0>; 2065 2066 port@0 { 2067 #address-cells = <1>; 2068 #size-cells = <0>; 2069 2070 reg = <0>; 2071 2072 isp1csi41: endpoint@1 { 2073 reg = <1>; 2074 remote-endpoint = <&csi41isp1>; 2075 }; 2076 }; 2077 2078 port@1 { 2079 reg = <1>; 2080 isp1vin08: endpoint { 2081 remote-endpoint = <&vin08isp1>; 2082 }; 2083 }; 2084 2085 port@2 { 2086 reg = <2>; 2087 isp1vin09: endpoint { 2088 remote-endpoint = <&vin09isp1>; 2089 }; 2090 }; 2091 2092 port@3 { 2093 reg = <3>; 2094 isp1vin10: endpoint { 2095 remote-endpoint = <&vin10isp1>; 2096 }; 2097 }; 2098 2099 port@4 { 2100 reg = <4>; 2101 isp1vin11: endpoint { 2102 remote-endpoint = <&vin11isp1>; 2103 }; 2104 }; 2105 2106 port@5 { 2107 reg = <5>; 2108 isp1vin12: endpoint { 2109 remote-endpoint = <&vin12isp1>; 2110 }; 2111 }; 2112 2113 port@6 { 2114 reg = <6>; 2115 isp1vin13: endpoint { 2116 remote-endpoint = <&vin13isp1>; 2117 }; 2118 }; 2119 2120 port@7 { 2121 reg = <7>; 2122 isp1vin14: endpoint { 2123 remote-endpoint = <&vin14isp1>; 2124 }; 2125 }; 2126 2127 port@8 { 2128 reg = <8>; 2129 isp1vin15: endpoint { 2130 remote-endpoint = <&vin15isp1>; 2131 }; 2132 }; 2133 }; 2134 }; 2135 2136 dsi0: dsi-encoder@fed80000 { 2137 compatible = "renesas,r8a779h0-dsi-csi2-tx"; 2138 reg = <0 0xfed80000 0 0x10000>; 2139 clocks = <&cpg CPG_MOD 415>, 2140 <&cpg CPG_CORE R8A779H0_CLK_DSIEXT>, 2141 <&cpg CPG_CORE R8A779H0_CLK_DSIREF>; 2142 clock-names = "fck", "dsi", "pll"; 2143 power-domains = <&sysc R8A779H0_PD_C4>; 2144 resets = <&cpg 415>; 2145 2146 status = "disabled"; 2147 2148 ports { 2149 #address-cells = <1>; 2150 #size-cells = <0>; 2151 2152 port@0 { 2153 reg = <0>; 2154 dsi0_in: endpoint { 2155 remote-endpoint = <&du_out_dsi0>; 2156 }; 2157 }; 2158 2159 port@1 { 2160 reg = <1>; 2161 }; 2162 }; 2163 }; 2164 2165 prr: chipid@fff00044 { 2166 compatible = "renesas,prr"; 2167 reg = <0 0xfff00044 0 4>; 2168 bootph-all; 2169 }; 2170 }; 2171 2172 thermal-zones { 2173 sensor_thermal_cr52: sensor1-thermal { 2174 polling-delay-passive = <250>; 2175 polling-delay = <1000>; 2176 thermal-sensors = <&tsc 0>; 2177 2178 trips { 2179 sensor1_crit: sensor1-crit { 2180 temperature = <120000>; 2181 hysteresis = <1000>; 2182 type = "critical"; 2183 }; 2184 }; 2185 }; 2186 2187 sensor_thermal_ca76: sensor2-thermal { 2188 polling-delay-passive = <250>; 2189 polling-delay = <1000>; 2190 thermal-sensors = <&tsc 1>; 2191 2192 trips { 2193 sensor2_crit: sensor2-crit { 2194 temperature = <120000>; 2195 hysteresis = <1000>; 2196 type = "critical"; 2197 }; 2198 }; 2199 }; 2200 }; 2201 2202 timer { 2203 compatible = "arm,armv8-timer"; 2204 interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, 2205 <&gic GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, 2206 <&gic GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, 2207 <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>, 2208 <&gic GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>; 2209 interrupt-names = "sec-phys", "phys", "virt", "hyp-phys", 2210 "hyp-virt"; 2211 }; 2212}; 2213