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/qemu/target/sparc/
H A Dvis_helper.c90 uint64_t ll; member
108 d.ll = 0; in helper_fpmerge()
119 return d.ll; in helper_fpmerge()
133 d.ll = src2; in helper_fmul8x16()
140 return d.ll; in helper_fmul8x16()
149 d.ll = 0; in helper_fmul8x16a()
156 return d.ll; in helper_fmul8x16a()
163 s.ll = src1; in helper_fmul8sux16()
164 d.ll = src2; in helper_fmul8sux16()
171 return d.ll; in helper_fmul8sux16()
[all …]
/qemu/tests/qtest/
H A Drtc-test.c135 * It's also possible that we'll cross an edge reading the host clock so in check_time()
375 clock_step(1000000000LL); in basic_12h_bcd()
377 clock_step(59000000000LL); in basic_12h_bcd()
382 clock_step(60000000000LL); in basic_12h_bcd()
387 clock_step(1000000000LL); in basic_12h_bcd()
392 clock_step(1000000000LL); in basic_12h_bcd()
397 clock_step(1000000000LL); in basic_12h_bcd()
403 clock_step(1000000000LL); in basic_12h_bcd()
412 clock_step(1000000000LL); in basic_12h_dec()
414 clock_step(59000000000LL); in basic_12h_dec()
[all …]
/qemu/target/mips/tcg/
H A Dop_helper.c69 if (tmp0 & (1LL << (i + 16))) { in helper_rotx()
70 tmp1 |= 1LL << i; in helper_rotx()
72 tmp1 &= ~(1LL << i); in helper_rotx()
87 if (tmp1 & (1LL << (i + 8))) { in helper_rotx()
88 tmp2 |= 1LL << i; in helper_rotx()
90 tmp2 &= ~(1LL << i); in helper_rotx()
104 if (tmp2 & (1LL << (i + 4))) { in helper_rotx()
105 tmp3 |= 1LL << i; in helper_rotx()
107 tmp3 &= ~(1LL << i); in helper_rotx()
121 if (tmp3 & (1LL << (i + 2))) { in helper_rotx()
[all …]
/qemu/tests/tcg/hexagon/
H A Dmem_noshuf.c227 n.d[0] = ~0LL; in main()
281 n.d[0] = ~0LL; in main()
288 n.d[0] = ~0LL; in main()
292 n.d[0] = ~0LL; in main()
296 n.d[0] = ~0LL; in main()
300 n.d[0] = ~0LL; in main()
304 n.d[0] = ~0LL; in main()
308 n.d[0] = ~0LL; in main()
326 n.d[0] = ~0LL; in main()
330 n.d[0] = ~0LL; in main()
[all …]
H A Dload_align.c65 int64_t result = ~0LL; \
100 uint64_t result = ~0LL; \
134 int64_t result = ~0LL; \
176 int64_t result = ~0LL; \
219 int64_t result = ~0LL; \
254 int64_t result = ~0LL; \
298 int64_t result = ~0LL; \
343 int64_t result = ~0LL; \
/qemu/util/
H A Dhost-utils.c35 uint64_t ll; in mul64() member
43 } LL; in mul64() typedef
44 LL rl, rm, rn, rh, a0, b0; in mul64()
47 a0.ll = a; in mul64()
48 b0.ll = b; in mul64()
50 rl.ll = (uint64_t)a0.l.low * b0.l.low; in mul64()
51 rm.ll = (uint64_t)a0.l.low * b0.l.high; in mul64()
52 rn.ll = (uint64_t)a0.l.high * b0.l.low; in mul64()
53 rh.ll = (uint64_t)a0.l.high * b0.l.high; in mul64()
62 *plow = rl.ll; in mul64()
[all …]
/qemu/include/qemu/
H A Dcpu-float.h26 uint64_t ll; member
49 } ll; member
60 } ll; member
/qemu/migration/
H A Dyank_functions.c53 * For migration qemufiles, we'll always reach here. Though we'll skip in migration_ioc_unregister_yank_from_file()
/qemu/replay/
H A Dreplay-debugging.c108 int64_t icount = qdict_get_try_int(qdict, "icount", -1LL); in hmp_replay_break()
213 int64_t icount = qdict_get_try_int(qdict, "icount", -1LL); in hmp_replay_seek()
260 if (replay_last_breakpoint != -1LL) { in replay_continue_stop()
302 replay_last_breakpoint = -1LL; in replay_reverse_continue()
/qemu/target/alpha/
H A Dvax_helper.c166 sig = a.ll & 0x8000000000000000ull; in float64_to_g()
167 exp = (a.ll >> 52) & 0x7ff; in float64_to_g()
168 mant = a.ll & 0x000fffffffffffffull; in float64_to_g()
208 r.ll = 0; in g_to_float64()
210 r.ll = ((exp - 2) << 52) | mant_sig; in g_to_float64()
H A Dgdbstub.c36 val = d.ll; in alpha_cpu_gdb_read_register()
70 d.ll = tmp; in alpha_cpu_gdb_write_register()
/qemu/target/riscv/insn_trans/
H A Dtrans_rvi.c.inc707 TCGv ll = tcg_temp_new();
718 tcg_gen_shl_tl(ll, src1l, ls);
724 tcg_gen_movcond_tl(TCG_COND_NE, destl, hs, zero, zero, ll);
725 tcg_gen_movcond_tl(TCG_COND_NE, desth, hs, zero, ll, h1);
749 TCGv ll = tcg_temp_new();
762 tcg_gen_shl_tl(ll, src1h, ls);
763 tcg_gen_movcond_tl(TCG_COND_NE, ll, shamt, zero, ll, zero);
764 tcg_gen_or_tl(h0, ll, lr);
781 TCGv ll = tcg_temp_new();
794 tcg_gen_shl_tl(ll, src1h, ls);
[all …]
/qemu/crypto/
H A Dpbkdf.c52 *val_ms = thread_time.QuadPart / 10000ll; in qcrypto_pbkdf2_get_thread_cpu()
69 *val_ms = ((info.user_time.seconds * 1000ll) + in qcrypto_pbkdf2_get_thread_cpu()
79 *val_ms = ((ru.ru_utime.tv_sec * 1000ll) + in qcrypto_pbkdf2_get_thread_cpu()
/qemu/target/ppc/
H A Dfpu_helper.c586 return farg.ll; \
797 fa.ll = a;
880 farg1.ll = arg1; in helper_fcmpu()
881 farg2.ll = arg2; in helper_fcmpu()
911 farg1.ll = arg1; in helper_fcmpo()
912 farg2.ll = arg2; in helper_fcmpo()
1283 return u.ll; in helper_efdcfsi()
1292 return u.ll; in helper_efdcfsid()
1301 return u.ll; in helper_efdcfui()
1310 return u.ll; in helper_efdcfuid()
[all …]
/qemu/target/hexagon/
H A Dmacros.h203 ((WIDTH) ? extract64((INREG), (OFFSET), (WIDTH)) : 0LL)
209 0LL)
256 (((int64_t)(VAL)) < 0) ? 0 : ((1LL << (N)) - 1); \
261 ((VAL) < 0) ? 0 : ((1LL << (N)) - 1); \
266 ((VAL) < 0) ? (-(1LL << ((N) - 1))) : ((1LL << ((N) - 1)) - 1); \
270 ((VAL) < 0) ? (-(1LL << ((N) - 1))) : ((1LL << ((N) - 1)) - 1); \
272 #define fZXTN(N, M, VAL) (((N) != 0) ? extract64((VAL), 0, (N)) : 0LL)
273 #define fSXTN(N, M, VAL) (((N) != 0) ? sextract64((VAL), 0, (N)) : 0LL)
631 #define fCONSTLL(A) A##LL
/qemu/hw/acpi/
H A Dich9_timer.c30 expire_time = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + 1500000LL; in ich9_pm_update_swsmi_timer()
33 8 * (1 << swsmi_rate_sel) * 1000000LL; in ich9_pm_update_swsmi_timer()
/qemu/tests/tcg/sh4/
H A Dtest-macl.c7 #define MACL_S_MIN (-(1ll << 47))
8 #define MACL_S_MAX ((1ll << 47) - 1)
/qemu/.gitlab-ci.d/cirrus/
H A DREADME.rst44 general you'll want to be able to trigger Cirrus CI builds from non-protected
48 repository as usual and you'll automatically get the additional CI coverage.
/qemu/tests/tcg/xtensa/
H A Dtest_mac16.S33 \mulop\().ll \s, \t
75 \mulop\().ll \s, \t
171 \mulop\().ll.\ldop \w, \x, \s, \t
/qemu/hw/scsi/
H A Dmptconfig.c40 uint64_t ll; member
61 val.ll = va_arg(ap, int); in vfill()
64 val.ll = va_arg(ap, int64_t); in vfill()
73 stb_p(data + ofs, val.ll); in vfill()
79 stw_le_p(data + ofs, val.ll); in vfill()
85 stl_le_p(data + ofs, val.ll); in vfill()
91 stq_le_p(data + ofs, val.ll); in vfill()
/qemu/
H A Dcpu-common.c257 * After taking the lock we'll see cpu->has_waiter == true and run---not in cpu_exec_start()
263 * Then we'll see cpu->has_waiter == false and wait for the item to in cpu_exec_start()
298 * we'll see cpu->has_waiter == true. in cpu_exec_end()
302 * cpu->running to false and before we read pending_cpus. Then we'll see in cpu_exec_end()
/qemu/pc-bios/s390-ccw/
H A Dmain.c133 * In this case we'll just use the first potentially bootable device we find.
188 * we'll use to determine exactly how we'll boot.
/qemu/tests/unit/
H A Dio-channel-helpers.c74 /* We'll send 1 MB of data */ in qio_channel_test_new()
87 /* We'll split the data across a bunch of IO vecs */ in qio_channel_test_new()
/qemu/target/riscv/
H A Dbitmanip_helper.c110 target_ulong sz = 1LL << sz_log2; in do_xperm()
111 target_ulong mask = (1LL << sz) - 1; in do_xperm()
/qemu/target/hexagon/imported/
H A Dmacros.def181 ({ ((VAL) < 0) ? 0 : ((1LL<<(N))-1);}),
187 ({fSET_OVERFLOW(); ((VAL) < 0) ? 0 : ((1LL<<(N))-1);}),
193 ({fSET_OVERFLOW(); ((VAL) < 0) ? (-(1LL<<((N)-1))) : ((1LL<<((N)-1))-1);}),
199 ({((VAL) < 0) ? (-(1LL<<((N)-1))) : ((1LL<<((N)-1))-1);}),
205 ((VAL) & ((1LL<<(N))-1)),
211 ((fZXTN(N,M,VAL) ^ (1LL<<((N)-1))) - (1LL<<((N)-1))),
1521 A##LL,

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