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/qemu/docs/devel/migration/
H A Dqpl-compression.rst4 The Intel Query Processing Library (Intel ``QPL``) is an open-source library to
8 The ``QPL`` compression relies on Intel In-Memory Analytics Accelerator(``IAA``)
10 from Intel 4th Gen Intel Xeon Scalable processors, codenamed Sapphire Rapids
14 <https://intel.github.io/qpl/documentation/introduction_docs/introduction.html>`_
49 $git clone --recursive https://github.com/intel/qpl.git qpl
56 <https://intel.github.io/qpl/documentation/get_started_docs/installation.html>`_
73 6a:02.0 System peripheral: Intel Corporation Device 0cfe
74 6f:02.0 System peripheral: Intel Corporation Device 0cfe
75 74:02.0 System peripheral: Intel Corporation Device 0cfe
76 79:02.0 System peripheral: Intel Corporation Device 0cfe
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H A Dqatzip-compression.rst6 decompression through the Intel QuickAssist Technology(``QAT``) hardware.
36 ``QATzip`` is a user space library which builds on top of the Intel QuickAssist
41 <https://github.com/intel/QATzip?tab=readme-ov-file#introductionl>`_
80 Intel QuickAssist user space library development files
83 Intel QuickAssist user space library
86 Compression user-space tool for Intel QuickAssist Technology
92 <https://github.com/intel/QATzip?tab=readme-ov-file#build-intel-quickassist-technology-driver>`_
100 `Intel QuickAssist Technology Documentation
101 <https://intel.github.io/quickassist/index.html>`_
103 For more ``QAT`` hardware introduction, please refer to `intel-quick-assist-technology-overview
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/qemu/docs/system/
H A Dcpu-models-x86.rst.inc26 Intel and AMD. These allow the guest VMs to have a degree of
64 Preferred CPU models for Intel x86 hosts
67 The following CPU models are preferred for use on Intel hosts.
75 Intel Xeon Processor (ClearwaterForest, 2025)
78 Intel Xeon Processor (SierraForest, 2024), SierraForest-v2 mitigates
82 Intel Xeon Processor (GraniteRapids, 2024)
85 Intel Xeon Processor (Cascade Lake, 2019), with "stepping" levels 6
90 Intel Xeon Processor (Skylake, 2016)
93 Intel Core Processor (Skylake, 2015)
96 Intel Core Processor (Broadwell, 2014)
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/qemu/tests/qtest/
H A Dintel-hda-test.c2 * QTest testcase for Intel HDA
23 qtest_start(AUDIODEV "-machine pc -device intel-hda,id=" HDA_ID CODEC_DEVICES); in ich6_test()
31 "-device ich9-intel-hda,bus=pcie.0,addr=1b.0,id=" in ich9_test()
47 "-device intel-hda,id=" HDA_ID CODEC_DEVICES); in test_issue542_ich6()
74 qtest_add_func("/intel-hda/ich6", ich6_test); in main()
77 qtest_add_func("/intel-hda/ich9", ich9_test); in main()
78 qtest_add_func("/intel-hda/fuzz/issue542", test_issue542_ich6); in main()
H A Dintel-iommu-test.c2 * QTest testcase for intel-iommu
4 * Copyright (c) 2024 Intel, Inc.
6 * Author: Zhenzhong Duan <zhenzhong.duan@intel.com>
32 s = qtest_init("-M q35 -device intel-iommu,x-scalable-mode=on,x-flts=on"); in test_intel_iommu_stage_1()
61 qtest_add_func("/q35/intel-iommu/stage-1", test_intel_iommu_stage_1); in main()
/qemu/docs/
H A Digd-assign.txt1 Intel Graphics Device (IGD) assignment with vfio-pci
4 Using vfio-pci, we can passthrough Intel Graphics Device (IGD) to guest, either
45 Intel document [1] shows how to dump VBIOS to file. For UEFI Option ROM, see
144 PCI class VGA device with Intel vendor ID. Multiple of such devices
158 class VGA device with Intel vendor ID, appearing at PCI bus address 00:02.0.
171 * IntelGopDriver: Closed-source Intel GOP driver
176 The original IgdAssignmentDxe can be found at [3]. A Intel maintained version
181 For the IntelGopDriver, Intel never released it to public. You may contact
182 Intel support to get one as [4] said, if you are an Intel Premier Support
205 echo $(( ((0x$(cat /sys/devices/virtual/iommu/dmar0/intel-iommu/cap) & 0x3F0000) >> 16) + 1 ))
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/qemu/docs/system/i386/
H A Dtdx.rst1 Intel Trusted Domain eXtension (TDX)
4 Intel Trusted Domain eXtensions (TDX) refers to an Intel technology that extends
90 "warning: host doesn't support requested feature: CPUID.07H:EBX.intel-pt [bit 25]"
159 - `TDX Homepage <https://www.intel.com/content/www/us/en/developer/articles/technical/intel-trust-d…
161 - `SGX QE <https://github.com/intel/SGXDataCenterAttestationPrimitives/tree/master/QuoteGeneration>…
H A Dhyperv.rst163 hypervisors making L2 exits to the hypervisor faster. The feature is Intel-only.
232 supported for both VMX (Intel) and SVM (AMD), the VMX implementation requires
235 Recommended: ``hv-evmcs`` (Intel)
252 supported for both VMX (Intel) and SVM (AMD), the VMX implementation requires
257 Recommended: ``hv-evmcs`` (Intel)
297 - ``hv-evmcs`` can (and should) be enabled on Intel CPUs only. While the feature
315 support APIC virtualization (Intel APICv, AMD AVIC).
H A Dsgx.rst7 Intel Software Guard eXtensions (SGX) is a set of instructions and mechanisms
121 the LC configuration to a non-Intel value is left to guest firmware. Unlike
184 - `SGX Homepage <https://software.intel.com/sgx>`__
186 - `SGX SDK <https://github.com/intel/linux-sgx.git>`__
188 - SGX specification: Intel SDM Volume 3
/qemu/hw/acpi/
H A Dhmat.h4 * Copyright(C) 2019 Intel Corporation.
7 * Liu jingqi <jingqi.liu@linux.intel.com>
8 * Tao Xu <tao3.xu@intel.com>
/qemu/include/standard-headers/drm/
H A Ddrm_fourcc.h2 * Copyright 2011 Intel Corporation
501 /* Intel framebuffer modifiers */
504 * Intel X-tiling layout
511 * Note that this layout is only accurate on intel gen 8+ or valleyview chipsets.
518 #define I915_FORMAT_MOD_X_TILED fourcc_mod_code(INTEL, 1)
521 * Intel Y-tiling layout
529 * Note that this layout is only accurate on intel gen 8+ or valleyview chipsets.
536 #define I915_FORMAT_MOD_Y_TILED fourcc_mod_code(INTEL, 2)
539 * Intel Yf-tiling layout
551 #define I915_FORMAT_MOD_Yf_TILED fourcc_mod_code(INTEL, 3)
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/qemu/include/qemu/
H A Dchardev_open.h4 * Copyright (C) 2023 Intel Corporation.
6 * Authors: Yi Liu <yi.l.liu@intel.com>
/qemu/rust/hw/timer/hpet/src/
H A Dlib.rs1 // Copyright (C) 2024 Intel Corporation.
2 // Author(s): Zhao Liu <zhao1.liu@intel.com>
/qemu/include/hw/i386/
H A Dhostmem-epc.h4 * Copyright (C) 2019 Intel Corporation
7 * Sean Christopherson <sean.j.christopherson@intel.com>
H A Dtdvf.h2 * Copyright (c) 2025 Intel Corporation
4 * <isaku.yamahata at intel.com>
/qemu/backends/
H A Dhost_iommu_device.c4 * Copyright (C) 2024 Intel Corporation.
6 * Authors: Zhenzhong Duan <zhenzhong.duan@intel.com>
/qemu/target/i386/hvf/
H A Dhvf-i386.h7 * Copyright (c) 2011 Intel Corporation
9 * Jiang Yunhong<yunhong.jiang@intel.com>
/qemu/include/system/
H A Diommufd.h4 * Copyright (C) 2024 Intel Corporation.
7 * Authors: Yi Liu <yi.l.liu@intel.com>
9 * Zhenzhong Duan <zhenzhong.duan@intel.com>
/qemu/tests/functional/
H A Dtest_intel_iommu.py128 self.vm.add_args('-device', 'intel-iommu,intremap=on')
135 self.vm.add_args('-device', 'intel-iommu,intremap=on')
142 self.vm.add_args('-device', 'intel-iommu,intremap=on,caching-mode=on')
149 self.vm.add_args('-device', 'intel-iommu,intremap=on')
/qemu/include/hw/xen/
H A Dxen_igd.h3 * Copyright (c) 2007, Intel Corporation.
8 * Allen Kay <allen.m.kay@intel.com>
/qemu/hw/i386/
H A Dtdvf-hob.c2 * Copyright (c) 2025 Intel Corporation
4 * <isaku.yamahata at intel.com>
5 * Xiaoyao Li <xiaoyao.li@intel.com>
/qemu/include/standard-headers/uefi/
H A Duefi.h2 * Copyright (C) 2025 Intel Corporation
5 * <isaku.yamahata at intel.com>
6 * Xiaoyao Li <xiaoyao.li@intel.com>
/qemu/hw/audio/
H A Dintel-hda.c30 #include "intel-hda.h"
32 #include "intel-hda-defs.h"
115 /* intel hda emulation */
202 #define TYPE_INTEL_HDA_GENERIC "intel-hda-generic"
931 qemu_log_mask(LOG_GUEST_ERROR, "intel-hda: write to r/o reg %s\n", in intel_hda_reg_write()
1122 "intel-hda-container", 0x4000); in intel_hda_realize()
1124 "intel-hda", 0x2000); in intel_hda_realize()
1126 memory_region_init_alias(&d->alias, OBJECT(d), "intel-hda-alias", in intel_hda_realize()
1158 .name = "intel-hda-stream",
1173 .name = "intel-hda",
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/qemu/contrib/gitdm/
H A Ddomain-map30 intel.com Intel
/qemu/include/hw/virtio/
H A Dvhost-user-blk.h3 * Copyright(C) 2017 Intel Corporation.
6 * Changpeng Liu <changpeng.liu@intel.com>

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