xref: /qemu/docs/devel/migration/qpl-compression.rst (revision b23acd3e1fd35a9a8452e793d7a0b0e8cc39714a)
1*0d40b3d7SYuan Liu===============
2*0d40b3d7SYuan LiuQPL Compression
3*0d40b3d7SYuan Liu===============
4*0d40b3d7SYuan LiuThe Intel Query Processing Library (Intel ``QPL``) is an open-source library to
5*0d40b3d7SYuan Liuprovide compression and decompression features and it is based on deflate
6*0d40b3d7SYuan Liucompression algorithm (RFC 1951).
7*0d40b3d7SYuan Liu
8*0d40b3d7SYuan LiuThe ``QPL`` compression relies on Intel In-Memory Analytics Accelerator(``IAA``)
9*0d40b3d7SYuan Liuand Shared Virtual Memory(``SVM``) technology, they are new features supported
10*0d40b3d7SYuan Liufrom Intel 4th Gen Intel Xeon Scalable processors, codenamed Sapphire Rapids
11*0d40b3d7SYuan Liuprocessor(``SPR``).
12*0d40b3d7SYuan Liu
13*0d40b3d7SYuan LiuFor more ``QPL`` introduction, please refer to `QPL Introduction
14*0d40b3d7SYuan Liu<https://intel.github.io/qpl/documentation/introduction_docs/introduction.html>`_
15*0d40b3d7SYuan Liu
16*0d40b3d7SYuan LiuQPL Compression Framework
17*0d40b3d7SYuan Liu=========================
18*0d40b3d7SYuan Liu
19*0d40b3d7SYuan Liu::
20*0d40b3d7SYuan Liu
21*0d40b3d7SYuan Liu  +----------------+       +------------------+
22*0d40b3d7SYuan Liu  | MultiFD Thread |       |accel-config tool |
23*0d40b3d7SYuan Liu  +-------+--------+       +--------+---------+
24*0d40b3d7SYuan Liu          |                         |
25*0d40b3d7SYuan Liu          |                         |
26*0d40b3d7SYuan Liu          |compress/decompress      |
27*0d40b3d7SYuan Liu  +-------+--------+                | Setup IAA
28*0d40b3d7SYuan Liu  |  QPL library   |                | Resources
29*0d40b3d7SYuan Liu  +-------+---+----+                |
30*0d40b3d7SYuan Liu          |   |                     |
31*0d40b3d7SYuan Liu          |   +-------------+-------+
32*0d40b3d7SYuan Liu          |   Open IAA      |
33*0d40b3d7SYuan Liu          |   Devices +-----+-----+
34*0d40b3d7SYuan Liu          |           |idxd driver|
35*0d40b3d7SYuan Liu          |           +-----+-----+
36*0d40b3d7SYuan Liu          |                 |
37*0d40b3d7SYuan Liu          |                 |
38*0d40b3d7SYuan Liu          |           +-----+-----+
39*0d40b3d7SYuan Liu          +-----------+IAA Devices|
40*0d40b3d7SYuan Liu      Submit jobs     +-----------+
41*0d40b3d7SYuan Liu      via enqcmd
42*0d40b3d7SYuan Liu
43*0d40b3d7SYuan Liu
44*0d40b3d7SYuan LiuQPL Build And Installation
45*0d40b3d7SYuan Liu--------------------------
46*0d40b3d7SYuan Liu
47*0d40b3d7SYuan Liu.. code-block:: shell
48*0d40b3d7SYuan Liu
49*0d40b3d7SYuan Liu  $git clone --recursive https://github.com/intel/qpl.git qpl
50*0d40b3d7SYuan Liu  $mkdir qpl/build
51*0d40b3d7SYuan Liu  $cd qpl/build
52*0d40b3d7SYuan Liu  $cmake -DCMAKE_BUILD_TYPE=Release -DCMAKE_INSTALL_PREFIX=/usr -DQPL_LIBRARY_TYPE=SHARED ..
53*0d40b3d7SYuan Liu  $sudo cmake --build . --target install
54*0d40b3d7SYuan Liu
55*0d40b3d7SYuan LiuFor more details about ``QPL`` installation, please refer to `QPL Installation
56*0d40b3d7SYuan Liu<https://intel.github.io/qpl/documentation/get_started_docs/installation.html>`_
57*0d40b3d7SYuan Liu
58*0d40b3d7SYuan LiuIAA Device Management
59*0d40b3d7SYuan Liu---------------------
60*0d40b3d7SYuan Liu
61*0d40b3d7SYuan LiuThe number of ``IAA`` devices will vary depending on the Xeon product model.
62*0d40b3d7SYuan LiuOn a ``SPR`` server, there can be a maximum of 8 ``IAA`` devices, with up to
63*0d40b3d7SYuan Liu4 devices per socket.
64*0d40b3d7SYuan Liu
65*0d40b3d7SYuan LiuBy default, all ``IAA`` devices are disabled and need to be configured and
66*0d40b3d7SYuan Liuenabled by users manually.
67*0d40b3d7SYuan Liu
68*0d40b3d7SYuan LiuCheck the number of devices through the following command
69*0d40b3d7SYuan Liu
70*0d40b3d7SYuan Liu.. code-block:: shell
71*0d40b3d7SYuan Liu
72*0d40b3d7SYuan Liu  #lspci -d 8086:0cfe
73*0d40b3d7SYuan Liu  6a:02.0 System peripheral: Intel Corporation Device 0cfe
74*0d40b3d7SYuan Liu  6f:02.0 System peripheral: Intel Corporation Device 0cfe
75*0d40b3d7SYuan Liu  74:02.0 System peripheral: Intel Corporation Device 0cfe
76*0d40b3d7SYuan Liu  79:02.0 System peripheral: Intel Corporation Device 0cfe
77*0d40b3d7SYuan Liu  e7:02.0 System peripheral: Intel Corporation Device 0cfe
78*0d40b3d7SYuan Liu  ec:02.0 System peripheral: Intel Corporation Device 0cfe
79*0d40b3d7SYuan Liu  f1:02.0 System peripheral: Intel Corporation Device 0cfe
80*0d40b3d7SYuan Liu  f6:02.0 System peripheral: Intel Corporation Device 0cfe
81*0d40b3d7SYuan Liu
82*0d40b3d7SYuan LiuIAA Device Configuration And Enabling
83*0d40b3d7SYuan Liu^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
84*0d40b3d7SYuan Liu
85*0d40b3d7SYuan LiuThe ``accel-config`` tool is used to enable ``IAA`` devices and configure
86*0d40b3d7SYuan Liu``IAA`` hardware resources(work queues and engines). One ``IAA`` device
87*0d40b3d7SYuan Liuhas 8 work queues and 8 processing engines, multiple engines can be assigned
88*0d40b3d7SYuan Liuto a work queue via ``group`` attribute.
89*0d40b3d7SYuan Liu
90*0d40b3d7SYuan LiuFor ``accel-config`` installation, please refer to `accel-config installation
91*0d40b3d7SYuan Liu<https://github.com/intel/idxd-config>`_
92*0d40b3d7SYuan Liu
93*0d40b3d7SYuan LiuOne example of configuring and enabling an ``IAA`` device.
94*0d40b3d7SYuan Liu
95*0d40b3d7SYuan Liu.. code-block:: shell
96*0d40b3d7SYuan Liu
97*0d40b3d7SYuan Liu  #accel-config config-engine iax1/engine1.0 -g 0
98*0d40b3d7SYuan Liu  #accel-config config-engine iax1/engine1.1 -g 0
99*0d40b3d7SYuan Liu  #accel-config config-engine iax1/engine1.2 -g 0
100*0d40b3d7SYuan Liu  #accel-config config-engine iax1/engine1.3 -g 0
101*0d40b3d7SYuan Liu  #accel-config config-engine iax1/engine1.4 -g 0
102*0d40b3d7SYuan Liu  #accel-config config-engine iax1/engine1.5 -g 0
103*0d40b3d7SYuan Liu  #accel-config config-engine iax1/engine1.6 -g 0
104*0d40b3d7SYuan Liu  #accel-config config-engine iax1/engine1.7 -g 0
105*0d40b3d7SYuan Liu  #accel-config config-wq iax1/wq1.0 -g 0 -s 128 -p 10 -b 1 -t 128 -m shared -y user -n app1 -d user
106*0d40b3d7SYuan Liu  #accel-config enable-device iax1
107*0d40b3d7SYuan Liu  #accel-config enable-wq iax1/wq1.0
108*0d40b3d7SYuan Liu
109*0d40b3d7SYuan Liu.. note::
110*0d40b3d7SYuan Liu   IAX is an early name for IAA
111*0d40b3d7SYuan Liu
112*0d40b3d7SYuan Liu- The ``IAA`` device index is 1, use ``ls -lh /sys/bus/dsa/devices/iax*``
113*0d40b3d7SYuan Liu  command to query the ``IAA`` device index.
114*0d40b3d7SYuan Liu
115*0d40b3d7SYuan Liu- 8 engines and 1 work queue are configured in group 0, so all compression jobs
116*0d40b3d7SYuan Liu  submitted to this work queue can be processed by all engines at the same time.
117*0d40b3d7SYuan Liu
118*0d40b3d7SYuan Liu- Set work queue attributes including the work mode, work queue size and so on.
119*0d40b3d7SYuan Liu
120*0d40b3d7SYuan Liu- Enable the ``IAA1`` device and work queue 1.0
121*0d40b3d7SYuan Liu
122*0d40b3d7SYuan Liu.. note::
123*0d40b3d7SYuan Liu
124*0d40b3d7SYuan Liu  Set work queue mode to shared mode, since ``QPL`` library only supports
125*0d40b3d7SYuan Liu  shared mode
126*0d40b3d7SYuan Liu
127*0d40b3d7SYuan LiuFor more detailed configuration, please refer to `IAA Configuration Samples
128*0d40b3d7SYuan Liu<https://github.com/intel/idxd-config/tree/stable/Documentation/accfg>`_
129*0d40b3d7SYuan Liu
130*0d40b3d7SYuan LiuIAA Unit Test
131*0d40b3d7SYuan Liu^^^^^^^^^^^^^
132*0d40b3d7SYuan Liu
133*0d40b3d7SYuan Liu- Enabling ``IAA`` devices for Xeon platform, please refer to `IAA User Guide
134*0d40b3d7SYuan Liu  <https://www.intel.com/content/www/us/en/content-details/780887/intel-in-memory-analytics-accelerator-intel-iaa.html>`_
135*0d40b3d7SYuan Liu
136*0d40b3d7SYuan Liu- ``IAA`` device driver is Intel Data Accelerator Driver (idxd), it is
137*0d40b3d7SYuan Liu  recommended that the minimum version of Linux kernel is 5.18.
138*0d40b3d7SYuan Liu
139*0d40b3d7SYuan Liu- Add ``"intel_iommu=on,sm_on"`` parameter to kernel command line
140*0d40b3d7SYuan Liu  for ``SVM`` feature enabling.
141*0d40b3d7SYuan Liu
142*0d40b3d7SYuan LiuHere is an easy way to verify ``IAA`` device driver and ``SVM`` with `iaa_test
143*0d40b3d7SYuan Liu<https://github.com/intel/idxd-config/tree/stable/test>`_
144*0d40b3d7SYuan Liu
145*0d40b3d7SYuan Liu.. code-block:: shell
146*0d40b3d7SYuan Liu
147*0d40b3d7SYuan Liu  #./test/iaa_test
148*0d40b3d7SYuan Liu   [ info] alloc wq 0 shared size 128 addr 0x7f26cebe5000 batch sz 0xfffffffe xfer sz 0x80000000
149*0d40b3d7SYuan Liu   [ info] test noop: tflags 0x1 num_desc 1
150*0d40b3d7SYuan Liu   [ info] preparing descriptor for noop
151*0d40b3d7SYuan Liu   [ info] Submitted all noop jobs
152*0d40b3d7SYuan Liu   [ info] verifying task result for 0x16f7e20
153*0d40b3d7SYuan Liu   [ info] test with op 0 passed
154*0d40b3d7SYuan Liu
155*0d40b3d7SYuan Liu
156*0d40b3d7SYuan LiuIAA Resources Allocation For Migration
157*0d40b3d7SYuan Liu^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
158*0d40b3d7SYuan Liu
159*0d40b3d7SYuan LiuThere is no ``IAA`` resource configuration parameters for migration and
160*0d40b3d7SYuan Liu``accel-config`` tool configuration cannot directly specify the ``IAA``
161*0d40b3d7SYuan Liuresources used for migration.
162*0d40b3d7SYuan Liu
163*0d40b3d7SYuan LiuThe multifd migration with ``QPL`` compression method  will use all work
164*0d40b3d7SYuan Liuqueues that are enabled and shared mode.
165*0d40b3d7SYuan Liu
166*0d40b3d7SYuan Liu.. note::
167*0d40b3d7SYuan Liu
168*0d40b3d7SYuan Liu  Accessing IAA resources requires ``sudo`` command or ``root`` privileges
169*0d40b3d7SYuan Liu  by default. Administrators can modify the IAA device node ownership
170*0d40b3d7SYuan Liu  so that QEMU can use IAA with specified user permissions.
171*0d40b3d7SYuan Liu
172*0d40b3d7SYuan Liu  For example
173*0d40b3d7SYuan Liu
174*0d40b3d7SYuan Liu  #chown -R qemu /dev/iax
175*0d40b3d7SYuan Liu
176*0d40b3d7SYuan LiuShared Virtual Memory(SVM) Introduction
177*0d40b3d7SYuan Liu=======================================
178*0d40b3d7SYuan Liu
179*0d40b3d7SYuan LiuAn ability for an accelerator I/O device to operate in the same virtual
180*0d40b3d7SYuan Liumemory space of applications on host processors. It also implies the
181*0d40b3d7SYuan Liuability to operate from pageable memory, avoiding functional requirements
182*0d40b3d7SYuan Liuto pin memory for DMA operations.
183*0d40b3d7SYuan Liu
184*0d40b3d7SYuan LiuWhen using ``SVM`` technology, users do not need to reserve memory for the
185*0d40b3d7SYuan Liu``IAA`` device and perform pin memory operation. The ``IAA`` device can
186*0d40b3d7SYuan Liudirectly access data using the virtual address of the process.
187*0d40b3d7SYuan Liu
188*0d40b3d7SYuan LiuFor more ``SVM`` technology, please refer to
189*0d40b3d7SYuan Liu`Shared Virtual Addressing (SVA) with ENQCMD
190*0d40b3d7SYuan Liu<https://docs.kernel.org/next/x86/sva.html>`_
191*0d40b3d7SYuan Liu
192*0d40b3d7SYuan Liu
193*0d40b3d7SYuan LiuHow To Use QPL Compression In Migration
194*0d40b3d7SYuan Liu=======================================
195*0d40b3d7SYuan Liu
196*0d40b3d7SYuan Liu1 - Installation of ``QPL`` library and ``accel-config`` library if using IAA
197*0d40b3d7SYuan Liu
198*0d40b3d7SYuan Liu2 - Configure and enable ``IAA`` devices and work queues via ``accel-config``
199*0d40b3d7SYuan Liu
200*0d40b3d7SYuan Liu3 - Build ``QEMU`` with ``--enable-qpl`` parameter
201*0d40b3d7SYuan Liu
202*0d40b3d7SYuan Liu  E.g. configure --target-list=x86_64-softmmu --enable-kvm ``--enable-qpl``
203*0d40b3d7SYuan Liu
204*0d40b3d7SYuan Liu4 - Enable ``QPL`` compression during migration
205*0d40b3d7SYuan Liu
206*0d40b3d7SYuan Liu  Set ``migrate_set_parameter multifd-compression qpl`` when migrating, the
207*0d40b3d7SYuan Liu  ``QPL`` compression does not support configuring the compression level, it
208*0d40b3d7SYuan Liu  only supports one compression level.
209*0d40b3d7SYuan Liu
210*0d40b3d7SYuan LiuThe Difference Between QPL And ZLIB
211*0d40b3d7SYuan Liu===================================
212*0d40b3d7SYuan Liu
213*0d40b3d7SYuan LiuAlthough both ``QPL`` and ``ZLIB`` are based on the deflate compression
214*0d40b3d7SYuan Liualgorithm, and ``QPL`` can support the header and tail of ``ZLIB``, ``QPL``
215*0d40b3d7SYuan Liuis still not fully compatible with the ``ZLIB`` compression in the migration.
216*0d40b3d7SYuan Liu
217*0d40b3d7SYuan Liu``QPL`` only supports 4K history buffer, and ``ZLIB`` is 32K by default.
218*0d40b3d7SYuan Liu``ZLIB`` compresses data that ``QPL`` may not decompress correctly and
219*0d40b3d7SYuan Liuvice versa.
220*0d40b3d7SYuan Liu
221*0d40b3d7SYuan Liu``QPL`` does not support the ``Z_SYNC_FLUSH`` operation in ``ZLIB`` streaming
222*0d40b3d7SYuan Liucompression, current ``ZLIB`` implementation uses ``Z_SYNC_FLUSH``, so each
223*0d40b3d7SYuan Liu``multifd`` thread has a ``ZLIB`` streaming context, and all page compression
224*0d40b3d7SYuan Liuand decompression are based on this stream. ``QPL`` cannot decompress such data
225*0d40b3d7SYuan Liuand vice versa.
226*0d40b3d7SYuan Liu
227*0d40b3d7SYuan LiuThe introduction for ``Z_SYNC_FLUSH``, please refer to `Zlib Manual
228*0d40b3d7SYuan Liu<https://www.zlib.net/manual.html>`_
229*0d40b3d7SYuan Liu
230*0d40b3d7SYuan LiuThe Best Practices
231*0d40b3d7SYuan Liu==================
232*0d40b3d7SYuan LiuWhen user enables the IAA device for ``QPL`` compression, it is recommended
233*0d40b3d7SYuan Liuto add ``-mem-prealloc`` parameter to the destination boot parameters. This
234*0d40b3d7SYuan Liuparameter can avoid the occurrence of I/O page fault and reduce the overhead
235*0d40b3d7SYuan Liuof IAA compression and decompression.
236*0d40b3d7SYuan Liu
237*0d40b3d7SYuan LiuThe example of booting with ``-mem-prealloc`` parameter
238*0d40b3d7SYuan Liu
239*0d40b3d7SYuan Liu.. code-block:: shell
240*0d40b3d7SYuan Liu
241*0d40b3d7SYuan Liu   $qemu-system-x86_64 --enable-kvm -cpu host --mem-prealloc ...
242*0d40b3d7SYuan Liu
243*0d40b3d7SYuan Liu
244*0d40b3d7SYuan LiuAn example about I/O page fault measurement of destination without
245*0d40b3d7SYuan Liu``-mem-prealloc``, the ``svm_prq`` indicates the number of I/O page fault
246*0d40b3d7SYuan Liuoccurrences and processing time.
247*0d40b3d7SYuan Liu
248*0d40b3d7SYuan Liu.. code-block:: shell
249*0d40b3d7SYuan Liu
250*0d40b3d7SYuan Liu  #echo 1 > /sys/kernel/debug/iommu/intel/dmar_perf_latency
251*0d40b3d7SYuan Liu  #echo 2 > /sys/kernel/debug/iommu/intel/dmar_perf_latency
252*0d40b3d7SYuan Liu  #echo 3 > /sys/kernel/debug/iommu/intel/dmar_perf_latency
253*0d40b3d7SYuan Liu  #echo 4 > /sys/kernel/debug/iommu/intel/dmar_perf_latency
254*0d40b3d7SYuan Liu  #cat /sys/kernel/debug/iommu/intel/dmar_perf_latency
255*0d40b3d7SYuan Liu  IOMMU: dmar18 Register Base Address: c87fc000
256*0d40b3d7SYuan Liu                  <0.1us   0.1us-1us    1us-10us  10us-100us   100us-1ms    1ms-10ms      >=10ms     min(us)     max(us) average(us)
257*0d40b3d7SYuan Liu   inv_iotlb           0         286         123           0           0           0           0           0           1           0
258*0d40b3d7SYuan Liu  inv_devtlb           0         276         133           0           0           0           0           0           2           0
259*0d40b3d7SYuan Liu     inv_iec           0           0           0           0           0           0           0           0           0           0
260*0d40b3d7SYuan Liu     svm_prq           0           0       25206         364         395           0           0           1         556           9
261