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/qemu/include/hw/misc/
H A Diotkit-secctl.h28 * + named GPIO inputs apb_ppc{0,1}_irq_status
35 * + named GPIO inputs apb_ppcexp{0,1,2,3}_irq_status
42 * + named GPIO inputs ahb_ppcexp{0,1,2,3}_irq_status
44 * + named GPIO inputs mpc_status[0..3]
47 * + named GPIO inputs mpcexp_status[0..15]
50 * + named GPIO inputs mscexp_status[0..15]
H A Dtz-ppc.h50 * + Named GPIO inputs "cfg_nonsec[0..15]": set to 1 if the port should be
52 * + Named GPIO inputs "cfg_ap[0..15]": set to 1 if the port should be
H A Dnpcm_clk.h33 /* Maximum amount of clock inputs in a SEL module. */
110 * @input_size: The size of inputs of this module.
/qemu/hw/gpio/
H A Domap_gpio.c35 uint16_t inputs; member
58 uint16_t prev = s->inputs; in omap_gpio_set()
61 s->inputs |= 1 << line; in omap_gpio_set()
63 s->inputs &= ~(1 << line); in omap_gpio_set()
65 if (((s->edge & s->inputs & ~prev) | (~s->edge & ~s->inputs & prev)) & in omap_gpio_set()
84 return s->inputs & s->pins; in omap_gpio_read()
184 s->inputs = 0; in omap_gpio_reset()
H A Dpl061.c13 * + unnamed GPIO inputs 0..7: inputs to connect to the emulated GPIO lines
17 * configured as inputs should be pulled up to logical 1 (ie whether in
23 * configured as inputs should be pulled down to logical 0 (ie whether in
119 * Return mask of bits which correspond to pins configured as inputs in pl061_floating()
139 * Return mask of bits which correspond to pins configured as inputs in pl061_pullups()
189 /* Inputs */ in pl061_update()
/qemu/include/crypto/
H A Dclmul.h25 * The odd bytes of the inputs are ignored.
33 * The even bytes of the inputs are ignored.
48 * The odd words of the inputs are ignored.
56 * The even words of the inputs are ignored.
/qemu/docs/devel/testing/
H A Dfuzzing.rst11 Fuzzing operates by passing inputs to an entry point/target function. The
58 time you run libFuzzer, it will read all of the inputs from the corpus, and
60 libFuzzer loads existing inputs from all specified directories, but will only
63 * ``-max_len=4096`` : specify the maximum byte-length of the inputs libFuzzer
74 fuzzers to share information about the interesting inputs they find.
97 1. Configure libFuzzer to store a corpus of all interesting inputs (see
105 to execute all of the inputs in $CORPUS_DIR and exit. Once the process
130 modify the qtest commands and/or qtest command arguments based on inputs
170 inputs for individual devices. As such, it is usually a good idea to limit the
/qemu/include/hw/arm/
H A Darmsse.h62 * + Named GPIO inputs "EXP_IRQ" 0..n are the expansion interrupts for CPU 0,
64 * + Named GPIO inputs "EXP_CPU1_IRQ" 0..n are the expansion interrupts for
75 * + named GPIO inputs apb_ppcexp{0,1,2,3}_irq_status
82 * + named GPIO inputs ahb_ppcexp{0,1,2,3}_irq_status
85 * + named GPIO inputs mpcexp_status[0..15]
88 * + named GPIO inputs mscexp_status[0..15]
/qemu/tests/qtest/
H A Dpnv-host-i2c-test.c155 /* All pins are inputs */ in pnv_i2c_pca9554_default_cfg()
218 /* Check that setting pin values and polarity changes inputs as expected */
256 /* configure all pins as inputs */ in pnv_i2c_pca9552_default_cfg()
294 uint16_t inputs; in pnv_i2c_pca9552_read_pins() local
298 inputs = recv_buf[0]; in pnv_i2c_pca9552_read_pins()
302 inputs |= recv_buf[0] << 8; in pnv_i2c_pca9552_read_pins()
303 return inputs; in pnv_i2c_pca9552_read_pins()
445 /* Set all pca9552 pins as inputs */ in test_host_i2c()
459 /* Set all pca9554 pins as inputs */ in test_host_i2c()
/qemu/tcg/i386/
H A Dtcg-target-con-set.h8 * C_On_Im(...) defines a constraint set with <n> outputs and <m> inputs.
12 * C_N1_Im(...) defines a constraint set with 1 output and <m> inputs,
16 * inputs, except that the first <n> outputs must use new registers.
/qemu/hw/intc/
H A Domap_intc.c33 uint32_t inputs; member
119 rise &= ~bank->inputs; in omap_set_intr()
121 bank->inputs |= (1 << n); in omap_set_intr()
130 bank->inputs &= ~(1 << n); in omap_set_intr()
225 bank->irqs &= value | (bank->inputs & bank->sens_edge); in omap_inth_write()
325 s->bank[i].inputs = 0x00000000; in omap_inth_reset()
/qemu/tcg/s390x/
H A Dtcg-target-con-set.h8 * C_On_Im(...) defines a constraint set with <n> outputs and <m> inputs.
13 * inputs, except that the first <n> outputs must use new registers.
/qemu/docs/devel/
H A Dsecure-coding-practices.rst40 Inputs from the guest or external sources (e.g. network, files) cannot be
41 trusted and may be invalid. Inputs must be checked before using them in a way
94 Live migration code must validate inputs when loading device state so an
H A Dreplay.rst53 designed to allow deterministic execution in absence of external inputs
85 non-determinism. These are inputs from clock and peripheral devices,
233 It includes all non-deterministic inputs of VM, synchronization marks and
234 instruction counts used to correctly inject inputs at replay.
H A Dclocks.rst17 Clocks are typically used with devices where they are used to model inputs
18 and outputs. They are created in a similar way to GPIOs. Inputs and outputs
62 All clocks contain this state: outputs as well as inputs. This allows
96 Note that it is possible to create a static array describing clock inputs and
202 get the clock inputs or outputs of a device. For example:
403 (i.e. it has period zero). If the inputs imply a tick count that
/qemu/ui/
H A Dinput-linux.c69 static QTAILQ_HEAD(, InputLinux) inputs = QTAILQ_HEAD_INITIALIZER(inputs);
86 QTAILQ_FOREACH(item, &inputs, next) { in input_linux_toggle_grab()
406 QTAILQ_INSERT_TAIL(&inputs, il, next); in input_linux_complete()
422 QTAILQ_REMOVE(&inputs, il, next); in input_linux_instance_finalize()
/qemu/tests/qtest/fuzz/
H A Dfuzz.h81 * inputs from the corpus. This function is sometimes called by libfuzzer
82 * when mutating inputs.
/qemu/target/sparc/
H A Dfop_helper.c366 * NaN inputs or result do not get a sign change. in helper_fnadds()
380 /* NaN inputs or result do not get a sign change. */ in helper_fnmuls()
393 * NaN inputs or result do not get a sign change. in helper_fnaddd()
407 /* NaN inputs or result do not get a sign change. */ in helper_fnmuld()
421 /* NaN inputs or result do not get a sign change. */ in helper_fnsmuld()
/qemu/tests/qapi-schema/
H A Denum-int-member.json2 # FIXME: once the parser understands integer inputs, improve the error message
H A Dbad-type-int.json2 # FIXME: once the parser understands integer inputs, improve the error message
/qemu/include/hw/gpio/
H A Dpca9554_regs.h17 #define PCA9554_CONFIG 3 /* Set pins as inputs our ouputs */
/qemu/hw/arm/
H A Dallwinner-r40.c356 * maintenance interrupt signal to the appropriate GIC PPI inputs, in allwinner_r40_realize()
357 * and the GIC's IRQ/FIQ/VIRQ/VFIQ interrupt outputs to the CPU's inputs. in allwinner_r40_realize()
365 * GIC PPI inputs used for this board. in allwinner_r40_realize()
374 /* Connect CPU timer outputs to GIC PPI inputs */ in allwinner_r40_realize()
381 /* Connect GIC outputs to CPU interrupt inputs */ in allwinner_r40_realize()
H A Dallwinner-h3.c282 * maintenance interrupt signal to the appropriate GIC PPI inputs, in allwinner_h3_realize()
283 * and the GIC's IRQ/FIQ/VIRQ/VFIQ interrupt outputs to the CPU's inputs. in allwinner_h3_realize()
291 * GIC PPI inputs used for this board. in allwinner_h3_realize()
300 /* Connect CPU timer outputs to GIC PPI inputs */ in allwinner_h3_realize()
307 /* Connect GIC outputs to CPU interrupt inputs */ in allwinner_h3_realize()
/qemu/tcg/sparc64/
H A Dtcg-target-con-set.h8 * C_On_Im(...) defines a constraint set with <n> outputs and <m> inputs.
/qemu/tcg/tci/
H A Dtcg-target-con-set.h8 * C_On_Im(...) defines a constraint set with <n> outputs and <m> inputs.

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