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/qemu/include/hw/watchdog/
H A Dwdt_imx2.h34 /* Control Register definitions */
47 /* Service Register definitions */
51 /* Reset Status Register definitions */
55 /* Interrupt Control Register definitions */
63 /* Misc Control Register definitions */
/qemu/linux-headers/asm-mips/
H A Dkvm.h18 * KVM MIPS specific structures and definitions.
55 * Register set = 0: GP registers from kvm_regs (see definitions below).
67 * Register set = 2: KVM specific registers (see definitions below).
69 * Register set = 3: FPU / MSA registers (see definitions below).
170 * bits[15..8] - Register subset (see definitions below).
200 * KVM MIPS specific structures and definitions
H A Dsgidefs.h15 * Definitions for the ISA levels
17 * With the introduction of MIPS32 / MIPS64 instruction sets definitions
/qemu/linux-headers/asm-loongarch/
H A Dkvm.h14 * KVM LoongArch specific structures and definitions.
52 * Register set = 0: GP registers from kvm_regs (see definitions below).
56 * Register set = 2: KVM specific registers (see definitions below).
58 * Register set = 3: FPU / SIMD registers (see definitions below).
/qemu/linux-user/mips64/
H A Dtarget_errno_defs.h5 * The mips64 target uses errno definitions taken from asm-mips/errno.h
6 * so directly use the mips target errno definitions.
/qemu/scripts/
H A Dcocci-macro-file.h60 * Singly-linked List definitions.
76 * Simple queue definitions.
93 * Tail queue definitions.
/qemu/target/ppc/
H A Dmmu-hash32.h13 * Segment register definitions
23 * Block Address Translation (BAT) definitions
39 * Hash page table definitions
H A Dmmu-book3s-v3.h2 * PowerPC ISAV3 BookS emulation generic mmu definitions for qemu.
26 * Partition table definitions
H A Dmmu-hash64.h25 * SLB definitions
58 * Hash page table definitions
/qemu/target/hexagon/
H A Dgen_semantics.c42 * Process the instruction definitions in main()
86 * Process the macro definitions in main()
87 * Macros definitions have the following form in main()
H A DREADME28 iclass.def Instruction class definitions used to determine
31 Parser that, given the high-level definitions of an instruction,
130 Instructions with multiple definitions are examples. These require special
216 purposes. You will also notice there are sometimes two definitions of a macro.
234 fGEN_TCG_<tag> definitions followed by including tcg_funcs_generated.c.inc.
/qemu/qapi/
H A Dcxl.json43 # Record Format, Event Record Flags for subfield definitions.
51 # Record, Memory Event Descriptor for bit definitions.
94 # Record Format, Event Record Flags for subfield definitions.
102 # Event Descriptor for bit definitions.
155 # Record Format, Event Record Flags for subfield definitions.
158 # Event Record for bit definitions for bit definiions.
162 # definitions.
166 # definitions.
169 # Payload, Additional Status for subfield definitions.
/qemu/linux-headers/asm-generic/
H A Dhugetlb_encode.h12 * The following definitions are associated with this huge page size
15 * provide definitions based on these with their own specific prefix.
/qemu/include/standard-headers/linux/
H A Dvirtio_types.h3 /* Type definitions for virtio implementations.
5 * This header is BSD licensed so anyone can use the definitions to implement
H A Dvirtio_rng.h3 /* This header is BSD licensed so anyone can use the definitions to implement
/qemu/target/i386/kvm/
H A Dhyperv-proto.h2 * Definitions for Hyper-V guest/hypervisor interaction - x86-specific part
180 * Synthetic interrupt controller definitions
193 * Synthetic debugger control definitions
/qemu/hw/scsi/
H A Dviosrp.h2 /* srp.h -- SCSI RDMA Protocol definitions */
22 /* This file contains structures and definitions for IBM RPA (RS/6000 */
28 /* between partitions. The definitions in this file are architected, */
/qemu/scripts/codeconverter/codeconverter/
H A Dqom_macros.py113 # This doesn't parse the struct definitions completely, it just assumes
244 """OBJECT_CHECK/OBJECT_CLASS_CHECK/OBJECT_GET_CLASS macro definitions
777 definitions: List[FileMatch]
796 # first we scan for all symbol definitions and usage:
802 index.setdefault(i, SymbolUserList([], [])).definitions.append(d)
817 if len(ul.definitions) == 0:
827 if len(ul.definitions) > 1:
828 ul.definitions[1].warn("%s defined twice", i.name)
829 ul.definitions[0].warn("previously defined here")
833 assert len(ul.definitions) == 1
[all …]
/qemu/include/hw/ppc/
H A Dspapr_ovec.h2 * QEMU SPAPR Option/Architecture Vector Definitions
21 * These definitions/helpers attempt to abstract away this internal
H A Dspapr_vio.h5 * QEMU sPAPR VIO bus definitions
8 * Based on the s390 virtio bus definitions:
/qemu/scripts/coccinelle/
H A Derrp-guard.cocci101 // Warn when several Error * definitions are in the control flow.
106 // control flow we may have several (in total) Error * definitions in
129 print('Warning: function {} has several definitions of '
176 // path. Functions with multiple definitions or propagates we want to
/qemu/include/hw/i2c/
H A Dpnv_i2c_regs.h2 * PowerNV I2C Controller Register Definitions
51 * The bit definitions are the same for all the interrupt registers.
/qemu/tests/decode/
H A Derr_field7.decode4 # Diagnose fields whose definitions form a loop
/qemu/include/exec/
H A Dmmu-access-type.h2 * QEMU MMU Access type definitions
/qemu/include/hw/pci-host/
H A Dppc4xx.h2 * QEMU PowerPC 4xx PCI-host definitions

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