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/qemu/include/qom/
H A Dobject.h10 * See the COPYING file in the top-level directory.
17 #include "qapi/qapi-builtin-types.h"
35 * @obj: the object that owns the property
36 * @v: the visitor that contains the property data
37 * @name: the name of the property
38 * @opaque: the object property opaque
41 * Called when trying to get/set a property.
51 * @obj: the object that owns the property
52 * @opaque: the opaque registered with the property
53 * @part: the name of the property
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H A Dqom-qobject.h2 * QEMU Object Model - QObject wrappers
9 * See the COPYING file in the top-level directory.
19 * @name: the name of the property
22 * Returns: the value of the property, converted to QObject, or NULL if
31 * @name: the name of the property
32 * @value: The value that will be written to the property.
35 * Writes a property to a object.
39 bool object_property_set_qobject(Object *obj,
/qemu/hw/core/
H A Dqdev-properties.c2 #include "hw/qdev-properties.h"
4 #include "qapi/qapi-types-misc.h"
7 #include "qemu/error-report.h"
11 #include "qdev-prop-internal.h"
12 #include "qom/qom-qobject.h"
17 if (dev->id) { in qdev_prop_set_after_realize()
18 error_setg(errp, "Attempt to set property '%s' on device '%s' " in qdev_prop_set_after_realize()
19 "(type '%s') after it was realized", name, dev->id, in qdev_prop_set_after_realize()
22 error_setg(errp, "Attempt to set property '%s' on anonymous device " in qdev_prop_set_after_realize()
28 /* returns: true if property is allowed to be set, false otherwise */
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H A Dcpu-system.c4 * Copyright (c) 2012-2014 SUSE LINUX Products GmbH
18 * <http://www.gnu.org/licenses/gpl-2.0.html>
23 #include "system/address-spaces.h"
26 #include "exec/tb-flush.h"
28 #include "hw/qdev-core.h"
29 #include "hw/qdev-properties.h"
30 #include "hw/core/sysemu-cpu-ops.h"
34 bool cpu_has_work(CPUState *cpu) in cpu_has_work()
36 return cpu->cc->sysemu_ops->has_work(cpu); in cpu_has_work()
39 bool cpu_paging_enabled(const CPUState *cpu) in cpu_paging_enabled()
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H A Dqdev-properties-system.c2 * qdev property parsing
3 * (parts specific for qemu-system-*)
5 * This file is based on code from hw/qdev-properties.c from
10 * See the COPYING file in the top-level directory.
14 #include "hw/qdev-properties.h"
15 #include "hw/qdev-properties-system.h"
18 #include "qapi/qapi-types-block.h"
19 #include "qapi/qapi-types-machine.h"
20 #include "qapi/qapi-types-migration.h"
21 #include "qapi/qapi-visit-virtio.h"
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/qemu/include/hw/arm/
H A Darmv7m.h20 #define TYPE_BITBAND "ARM-bitband-memory"
44 * + Property "cpu-type": CPU type to instantiate
45 * + Property "num-irq": number of external IRQ lines
46 * + Property "num-prio-bits": number of priority bits in the NVIC
47 * + Property "memory": MemoryRegion defining the physical address space
48 * that CPU accesses see. (The NVIC, bitbanding and other CPU-internal
50 * + Property "idau": IDAU interface (forwarded to CPU object)
51 * + Property "init-svtor": secure VTOR reset value (forwarded to CPU object)
52 * + Property "init-nsvtor": non-secure VTOR reset value (forwarded to CPU object)
53 * + Property "vfp": enable VFP (forwarded to CPU object)
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/qemu/include/hw/
H A Dqdev-properties.h4 #include "hw/qdev-core.h"
7 * Property:
9 * in which case @info->set_default_value must not be NULL
10 * (if false then no default value is set by the property system
12 * @defval: default value for the property. This is used only if @set_default
15 struct Property { struct
29 bool set_default;
36 bool realized_set_allowed; /* allow setting property on realized device */
37 int (*print)(Object *obj, const Property *prop, char *dest, size_t len); argument
38 void (*set_default_value)(ObjectProperty *op, const Property *prop);
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H A Dqdev-core.h22 * -----------
27 * 2) device realization via the #DeviceState.realized property
31 * information to the caller and must be re-entrant.
36 * As an interim step, the #DeviceState.realized property can also be
57 * ---------------
62 * DeviceListener can save the QOpts passed to it for re-using it
73 DEV_NVECTORS_UNSPECIFIED = -1,
101 * struct DeviceClass - The base class for all devices.
104 * property is changed to %true.
106 * property is changed to %false.
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/qemu/backends/
H A Dhostmem-file.c4 * Copyright (C) 2013-2014 Red Hat Inc
10 * See the COPYING file in the top-level directory.
15 #include "qemu/error-report.h"
22 #include "qapi/qapi-visit-common.h"
33 bool discard_data;
34 bool is_pmem;
35 bool readonly;
39 static bool
51 if (!backend->size) { in file_backend_memory_alloc()
55 if (!fb->mem_path) { in file_backend_memory_alloc()
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H A Dhostmem.c4 * Copyright (C) 2013-2014 Red Hat Inc
10 * See the COPYING file in the top-level directory.
17 #include "qapi/qapi-builtin-visit.h"
19 #include "qemu/config-file.h"
21 #include "qemu/mmap-alloc.h"
24 #include "hw/qdev-core.h"
42 if (!backend->use_canonical_path) { in host_memory_backend_get_name()
54 uint64_t value = backend->size; in host_memory_backend_get_size()
67 error_setg(errp, "cannot change property %s of %s ", name, in host_memory_backend_set_size()
77 "property '%s' of %s doesn't take value '%" PRIu64 "'", in host_memory_backend_set_size()
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H A Dhostmem-memfd.c7 * Marc-André Lureau <marcandre.lureau@redhat.com>
10 * See the COPYING file in the top-level directory.
28 bool hugetlb;
30 bool seal;
33 static bool
41 if (!backend->size) { in memfd_backend_memory_alloc()
50 fd = qemu_memfd_create(TYPE_MEMORY_BACKEND_MEMFD, backend->size, in memfd_backend_memory_alloc()
51 m->hugetlb, m->hugetlbsize, m->seal ? in memfd_backend_memory_alloc()
54 if (fd == -1) { in memfd_backend_memory_alloc()
60 backend->aligned = true; in memfd_backend_memory_alloc()
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/qemu/trace/
H A Dcontrol.h4 * Copyright (C) 2011-2016 Lluís Vilanova <vilanova@ac.upc.edu>
7 * See the COPYING file in the top-level directory.
13 #include "event-internal.h"
41 * with non-matching names.
82 static bool trace_event_is_pattern(const char *str);
105 * If the event has the disabled property, the check will have no performance
116 * compiled-in backends.
118 * If the event has the disabled property, the check will have no performance
122 * does not have the disabled property.
133 * Use the define 'TRACE_${EVENT_NAME}_ENABLED' for compile-time checks (it will
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H A Dcontrol-target.c4 * Copyright (C) 2014-2017 Lluís Vilanova <vilanova@ac.upc.edu>
7 * See the COPYING file in the top-level directory.
14 void trace_event_set_state_dynamic_init(TraceEvent *ev, bool state) in trace_event_set_state_dynamic_init()
16 bool state_pre; in trace_event_set_state_dynamic_init()
19 * We ignore the "vcpu" property here, since no vCPUs have been created in trace_event_set_state_dynamic_init()
22 state_pre = *ev->dstate; in trace_event_set_state_dynamic_init()
26 *ev->dstate = 1; in trace_event_set_state_dynamic_init()
28 trace_events_enabled_count--; in trace_event_set_state_dynamic_init()
29 *ev->dstate = 0; in trace_event_set_state_dynamic_init()
34 void trace_event_set_state_dynamic(TraceEvent *ev, bool state) in trace_event_set_state_dynamic()
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/qemu/hw/display/
H A Dapple-gfx-mmio.m6 * SPDX-License-Identifier: GPL-2.0-or-later
11 * implements support to drive that library from within QEMU as an MMIO-based
17 #include "block/aio-wait.h"
20 #include "apple-gfx.h"
32 typedef bool(^IOSFCRaiseInterrupt)(uint32_t vector);
33 typedef bool(^IOSFCUnmapMemory)(void *, void *, void *, void *, void *, void *);
34 typedef bool(^IOSFCMapMemory)(uint64_t phys, uint64_t len, bool ro, void **va,
38 @property (readwrite, nonatomic) bool usingIOSurfaceMapper;
42 -(PGIOSurfaceHostDeviceDescriptor *)init;
43 @property (readwrite, nonatomic, copy, nullable) IOSFCMapMemory mapMemory;
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/qemu/scripts/
H A Dcompare-machine-types.py8 # during the comparison, some machine type doesn't have a property (it is in
11 # property via qmp command (e.g. query-cpu-model-expansion for x86_64-cpu).
42 print("Try export PYTHONPATH=top-qemu-dir/python or run from top-qemu-dir")
46 default_qemu_args = '-enable-kvm -machine none'
47 default_qemu_binary = 'build/qemu-system-x86_64'
58 # 'x86_64-cpu', method of 'x86_64-cpu' will be used for '486-x86_64-cpu')
61 def __init__(self, vm: QEMUMachine, name: str, abstract: bool) -> None: argument
68 def get_prop(self, driver: str, prop: str) -> str:
74 def is_child_of(self, parent: 'Driver') -> bool:
84 def set_implementations(self, implementations: List['Driver']) -> None:
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/qemu/qapi/
H A Dqom.json1 # -*- Mode: Python -*-
5 # See the COPYING file in the top-level directory.
8 { 'include': 'block-core.json' }
19 # @name: the name of the property
21 # @type: the type of the property. This will typically come in one of
24 # 1) A primitive type such as 'u8', 'u16', 'bool', 'str', or
36 # @description: if specified, the description of the property.
38 # @default-value: the default value, if any (since 5.0)
46 '*default-value': 'any' } }
49 # @qom-list:
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/qemu/python/qemu/utils/
H A Dqom_common.py13 # See the COPYING file in the top-level directory.
15 # Based on ./scripts/qmp/qom-[set|get|tree|list]
36 Represents the return type from e.g. qom-list.
47 def make(cls, value: Dict[str, Any]) -> 'ObjectPropertyInfo':
52 assert value.keys() <= {'name', 'type', 'description', 'default-value'}
55 value.get('default-value'))
57 @property
58 def child(self) -> bool:
59 """Is this property a child property?"""
62 @property
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H A Dqom_fuse.py10 usage: qom-fuse [-h] [--socket SOCKET] <mount>
18 -h, --help show this help message and exit
19 --socket SOCKET, -s SOCKET
32 # See the COPYING file in the top-level directory.
70 def configure_parser(cls, parser: argparse.ArgumentParser) -> None:
85 def run(self) -> int:
90 def get_ino(self, path: str) -> int:
98 def is_object(self, path: str) -> bool:
106 def is_property(self, path: str) -> bool:
107 """Is the given QOM path a property?"""
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/qemu/qom/
H A Dqom-hmp-cmds.c5 * later. See the COPYING file in the top-level directory.
9 #include "hw/qdev-core.h"
13 #include "qapi/qapi-commands-qom.h"
35 ObjectPropertyInfo *value = list->value; in hmp_qom_list()
38 value->name, value->type); in hmp_qom_list()
39 list = list->next; in hmp_qom_list()
48 const bool json = qdict_get_try_bool(qdict, "json", false); in hmp_qom_set()
50 const char *property = qdict_get_str(qdict, "property"); in hmp_qom_set() local
61 object_property_parse(obj, property, value, &err); in hmp_qom_set()
67 qmp_qom_set(path, property, obj, &err); in hmp_qom_set()
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H A Dqom-qmp-cmds.c10 * the COPYING file in the top-level directory.
12 * Contributions after 2012-01-13 are licensed under the terms of the
18 #include "hw/qdev-core.h"
20 #include "qapi/qapi-commands-qdev.h"
21 #include "qapi/qapi-commands-qom.h"
22 #include "qapi/qapi-visit-qom.h"
25 #include "qapi/qobject-input-visitor.h"
26 #include "qapi/qobject-output-visitor.h"
29 #include "qom/qom-qobject.h"
33 bool ambiguous = false; in qom_resolve_path()
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H A Dobject.c10 * See the COPYING file in the top-level directory.
14 #include "hw/qdev-core.h"
21 #include "qapi/string-input-visitor.h"
22 #include "qapi/string-output-visitor.h"
23 #include "qapi/qobject-input-visitor.h"
24 #include "qapi/forward-visitor.h"
25 #include "qapi/qapi-builtin-visit.h"
31 #include "qom/qom-qobject.h"
36 #include "qemu/error-report.h"
66 bool abstract;
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/qemu/target/arm/
H A Dcpu64.c18 * <http://www.gnu.org/licenses/gpl-2.0.html>
34 #include "hw/qdev-properties.h"
36 #include "cpu-features.h"
43 * then all other lengths are implicitly disabled. If sve-max-vq is in arm_cpu_sve_finalize()
47 * are enabled and sve-max-vq is not specified, then all lengths not in arm_cpu_sve_finalize()
48 * explicitly disabled will be enabled. Additionally, all power-of-two in arm_cpu_sve_finalize()
51 * disabled power-of-two vector length will be automatically disabled. in arm_cpu_sve_finalize()
56 uint32_t vq_map = cpu->sve_vq.map; in arm_cpu_sve_finalize()
57 uint32_t vq_init = cpu->sve_vq.init; in arm_cpu_sve_finalize()
70 cpu->sve_vq.supported = kvm_arm_sve_get_vls(cpu); in arm_cpu_sve_finalize()
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/qemu/include/hw/ssi/
H A Dxlnx-versal-ospi.h34 * https://www.xilinx.com/support/documentation/architecture-manuals/am011-versal-acap-trm.pdf
37 * https://docs.xilinx.com/r/en-US/am012-versal-register-reference/OSPI-Module
45 * + Named GPIO input "ospi-mux-sel": 0: enables indirect access mode
47 * + Property "dac-with-indac": Allow both direct accesses and indirect
49 * + Property "indac-write-disabled": Disable indirect access writes.
60 #define TYPE_XILINX_VERSAL_OSPI "xlnx.versal-ospi"
73 bool completed;
96 bool ind_write_disabled;
97 bool dac_with_indac;
98 bool dac_enable;
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/qemu/include/hw/misc/
H A Dtz-msc.h14 * It is documented in the ARM CoreLink SIE-200 System IP for Embedded TRM
16 * https://developer.arm.com/products/architecture/m-profile/docs/ddi0571/g
24 * The MSC has no register interface -- it is configured purely by a
26 * they are either hardwired or exposed in an ad-hoc register interface by
39 * + Named GPIO output "irq": set for a transaction-failed interrupt
40 * + Property "downstream": MemoryRegion defining where bus master transactions
42 * + Property "idau": an object implementing IDAUInterface, which defines which
43 * addresses should be treated as secure and which as non-secure.
57 #define TYPE_TZ_MSC "tz-msc"
67 bool cfg_nonsec;
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/qemu/hw/virtio/
H A Dvhost-user-fs.c2 * Vhost-user filesystem virtio device
4 * Copyright 2018-2019 Red Hat, Inc.
11 * top-level directory.
16 #include "standard-headers/linux/virtio_fs.h"
18 #include "hw/qdev-properties.h"
19 #include "hw/qdev-properties-system.h"
20 #include "hw/virtio/virtio-bus.h"
21 #include "hw/virtio/virtio-access.h"
22 #include "qemu/error-report.h"
24 #include "hw/virtio/vhost-user-fs.h"
[all …]

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