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/qemu/docs/
H A Dxen-save-devices-state.txt11 The save operation is available as QMP command xen-save-devices-state.
17 -------------------------------------------
19 32 bit big endian: QEMU_VM_FILE_MAGIC
20 32 bit big endian: QEMU_VM_FILE_VERSION
25 32 bit big endian: section_id
28 32 bit big endian: instance_id
29 32 bit big endian: version_id
/qemu/docs/devel/
H A Dloads-stores.rst12 documentation of each API -- for that you should look at the
27 load: ``ld{sign}{size}_{endian}_p(ptr)``
29 store: ``st{size}_{endian}_p(ptr, val)``
32 - (empty) : for 32 or 64 bit sizes
33 - ``u`` : unsigned
34 - ``s`` : signed
37 - ``b`` : 8 bits
38 - ``w`` : 16 bits
39 - ``24`` : 24 bits
40 - ``l`` : 32 bits
[all …]
/qemu/tests/tcg/aarch64_be/
H A DMakefile.target1 # -*- Mode: makefile -*-
3 # A super basic AArch64 BE makefile. As we don't have any big-endian
13 # We need to specify big-endian cflags
14 CFLAGS +=-mbig-endian -ffreestanding
15 LDFLAGS +=-nostdlib
/qemu/docs/specs/
H A Dfw_cfg.rst5 Guest-side Hardware Interface
15 ---------------------------
19 * Width: 16-bit
20 * Endianness: little-endian (if IOport), or big-endian (if MMIO)
34 the selector value is between 0x4000-0x7fff or 0xc000-0xffff.
38 longer supported, and will be ignored (treated as no-ops)!
49 items are accessed with a selector value between 0x0000-0x7fff, and
51 value between 0x8000-0xffff.
54 -------------
58 * Width: 8-bit (if IOport), 8/16/32/64-bit (if MMIO)
[all …]
H A Dstandard-vga.rst9 ``-vga std``
10 picks isa for -M isapc, otherwise pci
11 ``-device VGA``
13 ``-device isa-vga``
15 ``-device secondary-vga``
16 legacy-free pci variant
20 --------
41 The legacy-free variant has no ROM and has ``PCI_CLASS_DISPLAY_OTHER``
46 -------------
48 Doesn't apply to the legacy-free pci variant, use the MMIO bar instead.
[all …]
H A Dvmgenid.rst9 See the COPYING file in the top-level directory.
12 exposes a 128-bit, cryptographically random, integer value identifier,
20 re-initializing its random number generator etc.
24 ------------
31 - **R1a** The generation ID shall live in an 8-byte aligned buffer.
33 - **R1b** The buffer holding the generation ID shall be in guest RAM,
36 - **R1c** The buffer holding the generation ID shall be kept separate from
39 - **R1d** The buffer shall not be covered by an AddressRangeMemory or
42 - **R1e** The generation ID shall not live in a page frame that could be
47 - **R2** to **R5** [These AML requirements are isolated well enough in the
[all …]
/qemu/crypto/
H A Dblock-luks-priv.h4 * Copyright (c) 2015-2016 Red Hat, Inc.
24 #include "block-luks.h"
38 * docs/on-disk-format.pdf
79 * This struct is written to disk in big-endian format,
80 * but operated upon in native-endian format.
91 /* number of anti-forensic stripes */
96 * This struct is written to disk in big-endian format,
97 * but operated upon in native-endian format.
109 /* cipher mode specification (cbc-plain, xts-essiv:sha256, etc) */
/qemu/docs/user/
H A Dmain.rst1 .. _user-mode:
7 ---------------------------
11 - Linux (referred as qemu-linux-user)
13 - BSD (referred as qemu-bsd-user)
16 --------
23 32/64-bit mismatches between hosts and targets. IOCTLs can be
34 normal and real-time signals.
47 .. _linux-user-mode:
50 -------------------------
57 …qemu-i386 [-h] [-d] [-L path] [-s size] [-cpu model] [-g endpoint] [-B offset] [-R size] program […
[all …]
/qemu/target/arm/tcg/
H A Darm_ldst.h2 * ARM load/store instructions for code (armeb-user support)
26 /* Load an instruction and return it in the standard little-endian order */
38 /* In big-endian (BE32) mode, adjacent Thumb instructions have been swapped in arm_lduw_code()
/qemu/tests/tcg/multiarch/
H A Dsha512.c7 * http://www.opensource.org/licenses/mit-license.php.
9 * SPDX-License-Identifier: MIT CC0-1.0
20 /* Required portions from endian.h */
23 * BSWAP_64 - reverse bytes in a constant uint64_t value.
26 * Designed to be usable in constant-requiring initializers.
49 * CPU_TO_BE64 - convert a constant uint64_t value to big-endian
54 * BE64_TO_CPU - convert a big-endian uint64_t constant
55 * @le_val: big-endian constant to convert
65 * cpu_to_be64 - convert a uint64_t value to big endian.
74 * be64_to_cpu - convert a big-endian uint64_t value
[all …]
/qemu/tests/functional/
H A Dtest_mips64_malta.py3 # Functional tests for the big-endian 64-bit MIPS Malta board
5 # SPDX-License-Identifier: GPL-2.0-or-later
15 'vmlinux-3.2.0-4-5kc-malta'),
30 dl_file='/boot/initrd.img-3.2.0-4-5kc-malta',
H A Dtest_mips_replay.py3 # Replay tests for the big-endian 32-bit MIPS Malta board
5 # SPDX-License-Identifier: GPL-2.0-or-later
15 '20130217T032700Z/pool/main/l/linux-2.6/'
16 'linux-image-2.6.32-5-4kc-malta_2.6.32-48_mips.deb'),
22 member='boot/vmlinux-2.6.32-5-4kc-malta')
30 'linux-image-4.5.0-2-4kc-malta_4.5.5-1_mips.deb'),
34 ('https://github.com/groeck/linux-build-test/raw/'
43 member='boot/vmlinux-4.5.0-2-4kc-malta')
51 args=('-initrd', initrd_path))
/qemu/hw/microblaze/
H A Dpetalogix_s3adsp1800_mmu.c2 * Model of Petalogix linux reference design targeting Xilinx Spartan 3ADSP-1800
36 #include "system/address-spaces.h"
44 #define BINARY_DEVICE_TREE_FILE "petalogix-s3adsp1800.dtb"
59 MACHINE_TYPE_NAME("petalogix-s3adsp1800")
75 ram_addr_t ram_size = machine->ram_size; in OBJECT_DECLARE_TYPE()
85 EndianMode endianness = psms->endianness; in OBJECT_DECLARE_TYPE()
89 object_property_set_bool(OBJECT(cpu), "little-endian", in OBJECT_DECLARE_TYPE()
109 dev = qdev_new("xlnx.xps-intc"); in OBJECT_DECLARE_TYPE()
111 qdev_prop_set_uint32(dev, "kind-of-intr", in OBJECT_DECLARE_TYPE()
129 dev = qdev_new("xlnx.xps-timer"); in OBJECT_DECLARE_TYPE()
[all …]
/qemu/system/
H A Dmemory-internal.h10 * later. See the COPYING file in the top-level directory.
20 return fv->dispatch; in flatview_to_dispatch()
41 /* returns true if end is big endian. */
/qemu/hw/mips/
H A Dcps.c25 #include "hw/qdev-clock.h"
26 #include "hw/qdev-properties.h"
32 assert(pin_number < s->num_irq); in get_cps_irq()
33 return s->gic.irq_state[pin_number].irq; in get_cps_irq()
41 s->clock = qdev_init_clock_in(DEVICE(obj), "clk-in", NULL, NULL, 0); in mips_cps_init()
46 memory_region_init(&s->container, obj, "mips-cps-container", UINT64_MAX); in mips_cps_init()
47 sysbus_init_mmio(sbd, &s->container); in mips_cps_init()
60 bool is_mt = (env->CP0_Config5 & (1 << CP0C5_VP)) || ase_mt_available(env); in cpu_mips_itu_supported()
71 if (!clock_get(s->clock)) { in mips_cps_realize()
76 for (int i = 0; i < s->num_vp; i++) { in mips_cps_realize()
[all …]
/qemu/tests/qtest/
H A Dmax34451-test.c6 * SPDX-License-Identifier: GPL-2.0-or-later
11 #include "libqtest-single.h"
18 #define TEST_ID "max34451-test"
47 response = qmp("{ 'execute': 'qom-get', 'arguments': { 'path': %s, " in qmp_max34451_get()
61 response = qmp("{ 'execute': 'qom-set', 'arguments': { 'path': %s, " in qmp_max34451_set()
68 /* PMBus commands are little endian vs i2c_set16 in i2c.h which is big endian */
76 /* PMBus commands are little endian vs i2c_set16 in i2c.h which is big endian */
349 qos_node_consumes("max34451", "i2c-bus", &opts); in max34451_register_nodes()
H A Dadm1272-test.c6 * SPDX-License-Identifier: GPL-2.0-or-later
12 #include "libqtest-single.h"
19 #define TEST_ID "adm1272-test"
52 #define ADM1272_MODEL_DEFAULT "ADM1272-A1"
64 #define ADM1272_SHUNT 300 /* micro-ohms */
72 [0] = { 6770, 0, -2 }, /* voltage, vrange 60V */
73 [1] = { 4062, 0, -2 }, /* voltage, vrange 100V */
74 [2] = { 1326, 20480, -1 }, /* current, vsense range 15mV */
75 [3] = { 663, 20480, -1 }, /* current, vsense range 30mV */
76 [4] = { 3512, 0, -2 }, /* power, vrange 60V, irange 15mV */
[all …]
H A Disl_pmbus_vr-test.c21 #include "libqtest-single.h"
28 #define TEST_ID "isl_pmbus_vr-test"
36 response = qmp("{ 'execute': 'qom-get', 'arguments': { 'path': %s, " in qmp_isl_pmbus_vr_get()
50 response = qmp("{ 'execute': 'qom-set', 'arguments': { 'path': %s, " in qmp_isl_pmbus_vr_set()
56 /* PMBus commands are little endian vs i2c_set16 in i2c.h which is big endian */
64 /* PMBus commands are little endian vs i2c_set16 in i2c.h which is big endian */
360 /* test read-only registers */
449 qos_node_consumes("isl69260", "i2c-bus", &opts); in isl_pmbus_vr_register_nodes()
459 qos_node_consumes("raa229004", "i2c-bus", &opts); in isl_pmbus_vr_register_nodes()
467 qos_node_consumes("raa228000", "i2c-bus", &opts); in isl_pmbus_vr_register_nodes()
/qemu/tests/tcg/multiarch/system/
H A Dmemory.c4 * This is intended to test the system-mode code and ensure we properly
10 * - unaligned at various sizes (if -DCHECK_UNALIGNED set)
11 * - spanning a (system) page
12 * - sign extension when loading
51 * Helper macros for endian handling.
57 #define BYTE_SHIFT(b, pos) (b << ((sizeof(b) - 1 - (pos)) * 8))
58 #define BYTE_NEXT(b) (--(b))
64 * Fill the data with ascending (for little-endian) or descending (for
65 * big-endian) value bytes.
138 const int max = (TEST_SIZE - offset) / sizeof(word); in init_test_data_u16()
[all …]
/qemu/include/hw/nvram/
H A Dchrp_nvram.h27 uint16_t len; /* Big endian, length divided by 16 */
41 header->len = cpu_to_be16(size >> 4); in chrp_nvram_finish_partition()
50 header->checksum = sum & 0xff; in chrp_nvram_finish_partition()
/qemu/target/s390x/tcg/
H A Dvec.h2 * QEMU TCG support -- s390x vector utilitites
10 * See the COPYING file in the top-level directory.
29 * Big Endian (target/possible host)
30 * B: [ 0][ 1][ 2][ 3][ 4][ 5][ 6][ 7] - [ 8][ 9][10][11][12][13][14][15]
31 * HW: [ 0][ 1][ 2][ 3] - [ 4][ 5][ 6][ 7]
32 * W: [ 0][ 1] - [ 2][ 3]
33 * DW: [ 0] - [ 1]
35 * Little Endian (possible host)
36 * B: [ 7][ 6][ 5][ 4][ 3][ 2][ 1][ 0] - [15][14][13][12][11][10][ 9][ 8]
37 * HW: [ 3][ 2][ 1][ 0] - [ 7][ 6][ 5][ 4]
[all …]
/qemu/include/qemu/
H A Dbswap.h90 * Do an in-place conversion of the value pointed to by @v from the
100 * Do an in-place conversion of the value pointed to by @v from the
114 #define CPU_CONVERT(endian, size, type)\ argument
115 static inline type endian ## size ## _to_cpu(type v)\
117 return glue(endian, _bswap)(v, size);\
120 static inline type cpu_to_ ## endian ## size(type v)\
122 return glue(endian, _bswap)(v, size);\
125 static inline void endian ## size ## _to_cpus(type *p)\
127 glue(endian, _bswaps)(p, size);\
130 static inline void cpu_to_ ## endian ## size ## s(type *p)\
[all …]
/qemu/target/s390x/
H A Dcpu_features.c10 * your option) any later version. See the COPYING file in the top-level
77 set_be_bit(138, data); /* Configuration-z-architectural-mode */ in s390_fill_feat_block()
107 /* big endian on uint8_t array */ in s390_fill_feat_block()
120 * - All SIE facilities because SIE is not available in s390_fill_feat_block()
121 * - DIAG318 in s390_fill_feat_block()
129 clear_be_bit(s390_feat_def(S390_FEAT_SIE_F2)->bit, data); in s390_fill_feat_block()
130 clear_be_bit(s390_feat_def(S390_FEAT_SIE_SKEY)->bit, data); in s390_fill_feat_block()
131 clear_be_bit(s390_feat_def(S390_FEAT_SIE_GPERE)->bit, data); in s390_fill_feat_block()
132 clear_be_bit(s390_feat_def(S390_FEAT_SIE_SIIF)->bit, data); in s390_fill_feat_block()
133 clear_be_bit(s390_feat_def(S390_FEAT_SIE_SIGPIF)->bit, data); in s390_fill_feat_block()
[all …]
/qemu/docs/system/
H A Dgeneric-loader.rst5 the COPYING file in the top-level directory.
8 --------------
18 -device loader,addr=<addr>,data=<data>,data-len=<data-len> \
19 [,data-be=<data-be>][,cpu-num=<cpu-num>]
28 ``<data-len>``
32 ``<data-be>``
34 as big endian data. The default is to write little endian data.
36 ``<cpu-num>``
47 -device loader,addr=0xfd1a0104,data=0x8000000e,data-len=4
55 -device loader,addr=<addr>,cpu-num=<cpu-num>
[all …]
/qemu/hw/display/
H A Dvga-pci.c4 * see docs/specs/standard-vga.rst for virtual hardware specs.
29 #include "hw/qdev-properties.h"
57 #define TYPE_PCI_VGA "pci-vga"
100 * Update bytes in little endian order. Allows to update in pci_vga_ioport_write()
158 return s->big_endian_fb ? in pci_vga_qext_read()
173 s->big_endian_fb = true; in pci_vga_qext_write()
176 s->big_endian_fb = false; in pci_vga_qext_write()
186 return d->vga.big_endian_fb; in vga_get_big_endian_fb()
193 d->vga.big_endian_fb = value; in vga_set_big_endian_fb()
230 qemu_edid_generate(d->edid, sizeof(d->edid), &d->edid_info); in pci_std_vga_mmio_region_init()
[all …]

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