1 /*
2 * Model of Petalogix linux reference design targeting Xilinx Spartan 3ADSP-1800
3 * boards.
4 *
5 * Copyright (c) 2009 Edgar E. Iglesias.
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 */
25
26 #include "qemu/osdep.h"
27 #include "qemu/units.h"
28 #include "qapi/error.h"
29 #include "cpu.h"
30 #include "hw/sysbus.h"
31 #include "net/net.h"
32 #include "hw/block/flash.h"
33 #include "system/system.h"
34 #include "hw/boards.h"
35 #include "hw/misc/unimp.h"
36 #include "system/address-spaces.h"
37 #include "hw/char/xilinx_uartlite.h"
38
39 #include "boot.h"
40
41 #define LMB_BRAM_SIZE (128 * KiB)
42 #define FLASH_SIZE (16 * MiB)
43
44 #define BINARY_DEVICE_TREE_FILE "petalogix-s3adsp1800.dtb"
45
46 #define MEMORY_BASEADDR 0x90000000
47 #define FLASH_BASEADDR 0xa0000000
48 #define GPIO_BASEADDR 0x81400000
49 #define INTC_BASEADDR 0x81800000
50 #define TIMER_BASEADDR 0x83c00000
51 #define UARTLITE_BASEADDR 0x84000000
52 #define ETHLITE_BASEADDR 0x81000000
53
54 #define TIMER_IRQ 0
55 #define ETHLITE_IRQ 1
56 #define UARTLITE_IRQ 3
57
58 #define TYPE_PETALOGIX_S3ADSP1800_MACHINE \
59 MACHINE_TYPE_NAME("petalogix-s3adsp1800")
60
61 struct S3Adsp1800MachineState {
62 MachineState parent_class;
63
64 EndianMode endianness;
65 };
66
OBJECT_DECLARE_TYPE(S3Adsp1800MachineState,MachineClass,PETALOGIX_S3ADSP1800_MACHINE)67 OBJECT_DECLARE_TYPE(S3Adsp1800MachineState, MachineClass,
68 PETALOGIX_S3ADSP1800_MACHINE)
69
70
71 static void
72 petalogix_s3adsp1800_init(MachineState *machine)
73 {
74 S3Adsp1800MachineState *psms = PETALOGIX_S3ADSP1800_MACHINE(machine);
75 ram_addr_t ram_size = machine->ram_size;
76 DeviceState *dev;
77 MicroBlazeCPU *cpu;
78 DriveInfo *dinfo;
79 int i;
80 hwaddr ddr_base = MEMORY_BASEADDR;
81 MemoryRegion *phys_lmb_bram = g_new(MemoryRegion, 1);
82 MemoryRegion *phys_ram = g_new(MemoryRegion, 1);
83 qemu_irq irq[32];
84 MemoryRegion *sysmem = get_system_memory();
85 EndianMode endianness = psms->endianness;
86
87 cpu = MICROBLAZE_CPU(object_new(TYPE_MICROBLAZE_CPU));
88 object_property_set_str(OBJECT(cpu), "version", "7.10.d", &error_abort);
89 object_property_set_bool(OBJECT(cpu), "little-endian",
90 endianness == ENDIAN_MODE_LITTLE, &error_abort);
91 qdev_realize(DEVICE(cpu), NULL, &error_abort);
92
93 /* Attach emulated BRAM through the LMB. */
94 memory_region_init_ram(phys_lmb_bram, NULL,
95 "petalogix_s3adsp1800.lmb_bram", LMB_BRAM_SIZE,
96 &error_fatal);
97 memory_region_add_subregion(sysmem, 0x00000000, phys_lmb_bram);
98
99 memory_region_init_ram(phys_ram, NULL, "petalogix_s3adsp1800.ram",
100 ram_size, &error_fatal);
101 memory_region_add_subregion(sysmem, ddr_base, phys_ram);
102
103 dinfo = drive_get(IF_PFLASH, 0, 0);
104 pflash_cfi01_register(FLASH_BASEADDR,
105 "petalogix_s3adsp1800.flash", FLASH_SIZE,
106 dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
107 64 * KiB, 1, 0x89, 0x18, 0x0000, 0x0, 1);
108
109 dev = qdev_new("xlnx.xps-intc");
110 qdev_prop_set_enum(dev, "endianness", endianness);
111 qdev_prop_set_uint32(dev, "kind-of-intr",
112 1 << ETHLITE_IRQ | 1 << UARTLITE_IRQ);
113 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
114 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, INTC_BASEADDR);
115 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0,
116 qdev_get_gpio_in(DEVICE(cpu), MB_CPU_IRQ));
117 for (i = 0; i < 32; i++) {
118 irq[i] = qdev_get_gpio_in(dev, i);
119 }
120
121 dev = qdev_new(TYPE_XILINX_UARTLITE);
122 qdev_prop_set_enum(dev, "endianness", endianness);
123 qdev_prop_set_chr(dev, "chardev", serial_hd(0));
124 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
125 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, UARTLITE_BASEADDR);
126 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq[UARTLITE_IRQ]);
127
128 /* 2 timers at irq 2 @ 62 Mhz. */
129 dev = qdev_new("xlnx.xps-timer");
130 qdev_prop_set_enum(dev, "endianness", endianness);
131 qdev_prop_set_uint32(dev, "one-timer-only", 0);
132 qdev_prop_set_uint32(dev, "clock-frequency", 62 * 1000000);
133 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
134 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, TIMER_BASEADDR);
135 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq[TIMER_IRQ]);
136
137 dev = qdev_new("xlnx.xps-ethernetlite");
138 qdev_prop_set_enum(dev, "endianness", endianness);
139 qemu_configure_nic_device(dev, true, NULL);
140 qdev_prop_set_uint32(dev, "tx-ping-pong", 0);
141 qdev_prop_set_uint32(dev, "rx-ping-pong", 0);
142 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
143 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, ETHLITE_BASEADDR);
144 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq[ETHLITE_IRQ]);
145
146 create_unimplemented_device("xps_gpio", GPIO_BASEADDR, 0x10000);
147
148 microblaze_load_kernel(cpu, endianness == ENDIAN_MODE_LITTLE, ddr_base,
149 ram_size, machine->initrd_filename,
150 BINARY_DEVICE_TREE_FILE,
151 NULL);
152 }
153
machine_get_endianness(Object * obj,Error ** errp G_GNUC_UNUSED)154 static int machine_get_endianness(Object *obj, Error **errp G_GNUC_UNUSED)
155 {
156 S3Adsp1800MachineState *ms = PETALOGIX_S3ADSP1800_MACHINE(obj);
157 return ms->endianness;
158 }
159
machine_set_endianness(Object * obj,int endianness,Error ** errp)160 static void machine_set_endianness(Object *obj, int endianness, Error **errp)
161 {
162 S3Adsp1800MachineState *ms = PETALOGIX_S3ADSP1800_MACHINE(obj);
163 ms->endianness = endianness;
164 }
165
petalogix_s3adsp1800_machine_class_init(ObjectClass * oc,const void * data)166 static void petalogix_s3adsp1800_machine_class_init(ObjectClass *oc,
167 const void *data)
168 {
169 MachineClass *mc = MACHINE_CLASS(oc);
170 ObjectProperty *prop;
171
172 mc->desc = "PetaLogix linux refdesign for xilinx Spartan 3ADSP1800";
173 mc->init = petalogix_s3adsp1800_init;
174 mc->is_default = true;
175
176 prop = object_class_property_add_enum(oc, "endianness", "EndianMode",
177 &EndianMode_lookup,
178 machine_get_endianness,
179 machine_set_endianness);
180 object_property_set_default_str(prop, TARGET_BIG_ENDIAN ? "big" : "little");
181 object_class_property_set_description(oc, "endianness",
182 "Defines whether the machine runs in big or little endian mode");
183 }
184
185 static const TypeInfo petalogix_s3adsp1800_machine_types[] = {
186 {
187 .name = TYPE_PETALOGIX_S3ADSP1800_MACHINE,
188 .parent = TYPE_MACHINE,
189 .class_init = petalogix_s3adsp1800_machine_class_init,
190 .instance_size = sizeof(S3Adsp1800MachineState),
191 },
192 };
193
194 DEFINE_TYPES(petalogix_s3adsp1800_machine_types)
195