25 #include "hw/qdev-clock.h"
26 #include "hw/qdev-properties.h"
32     assert(pin_number < s->num_irq);  in get_cps_irq()
33     return s->gic.irq_state[pin_number].irq;  in get_cps_irq()
41     s->clock = qdev_init_clock_in(DEVICE(obj), "clk-in", NULL, NULL, 0);  in mips_cps_init()
46     memory_region_init(&s->container, obj, "mips-cps-container", UINT64_MAX);  in mips_cps_init()
47     sysbus_init_mmio(sbd, &s->container);  in mips_cps_init()
60     bool is_mt = (env->CP0_Config5 & (1 << CP0C5_VP)) || ase_mt_available(env);  in cpu_mips_itu_supported()
71     if (!clock_get(s->clock)) {  in mips_cps_realize()
76     for (int i = 0; i < s->num_vp; i++) {  in mips_cps_realize()
77         MIPSCPU *cpu = MIPS_CPU(object_new(s->cpu_type));  in mips_cps_realize()
78         CPUMIPSState *env = &cpu->env;  in mips_cps_realize()
80         object_property_set_bool(OBJECT(cpu), "big-endian", s->cpu_is_bigendian,  in mips_cps_realize()
84         object_property_set_bool(OBJECT(cpu), "start-powered-off", true,  in mips_cps_realize()
88         qdev_connect_clock_in(DEVICE(cpu), "clk-in", s->clock);  in mips_cps_realize()
101             env->itc_tag = mips_itu_get_tag_region(&s->itu);  in mips_cps_realize()
106     /* Inter-Thread Communication Unit */  in mips_cps_realize()
108         object_initialize_child(OBJECT(dev), "itu", &s->itu, TYPE_MIPS_ITU);  in mips_cps_realize()
109         object_property_set_uint(OBJECT(&s->itu), "num-fifo", 16,  in mips_cps_realize()
111         object_property_set_uint(OBJECT(&s->itu), "num-semaphores", 16,  in mips_cps_realize()
113         if (!sysbus_realize(SYS_BUS_DEVICE(&s->itu), errp)) {  in mips_cps_realize()
117         memory_region_add_subregion(&s->container, 0,  in mips_cps_realize()
118                            sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->itu), 0));  in mips_cps_realize()
122     object_initialize_child(OBJECT(dev), "cpc", &s->cpc, TYPE_MIPS_CPC);  in mips_cps_realize()
123     object_property_set_uint(OBJECT(&s->cpc), "num-vp", s->num_vp,  in mips_cps_realize()
125     object_property_set_int(OBJECT(&s->cpc), "vp-start-running", 1,  in mips_cps_realize()
127     if (!sysbus_realize(SYS_BUS_DEVICE(&s->cpc), errp)) {  in mips_cps_realize()
131     memory_region_add_subregion(&s->container, 0,  in mips_cps_realize()
132                             sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->cpc), 0));  in mips_cps_realize()
135     object_initialize_child(OBJECT(dev), "gic", &s->gic, TYPE_MIPS_GIC);  in mips_cps_realize()
136     object_property_set_uint(OBJECT(&s->gic), "num-vp", s->num_vp,  in mips_cps_realize()
138     object_property_set_uint(OBJECT(&s->gic), "num-irq", 128,  in mips_cps_realize()
140     if (!sysbus_realize(SYS_BUS_DEVICE(&s->gic), errp)) {  in mips_cps_realize()
144     memory_region_add_subregion(&s->container, 0,  in mips_cps_realize()
145                             sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->gic), 0));  in mips_cps_realize()
148     gcr_base = MIPS_CPU(first_cpu)->env.CP0_CMGCRBase << 4;  in mips_cps_realize()
150     object_initialize_child(OBJECT(dev), "gcr", &s->gcr, TYPE_MIPS_GCR);  in mips_cps_realize()
151     object_property_set_uint(OBJECT(&s->gcr), "num-vp", s->num_vp,  in mips_cps_realize()
153     object_property_set_int(OBJECT(&s->gcr), "gcr-rev", 0x800,  in mips_cps_realize()
155     object_property_set_int(OBJECT(&s->gcr), "gcr-base", gcr_base,  in mips_cps_realize()
157     object_property_set_link(OBJECT(&s->gcr), "gic", OBJECT(&s->gic.mr),  in mips_cps_realize()
159     object_property_set_link(OBJECT(&s->gcr), "cpc", OBJECT(&s->cpc.mr),  in mips_cps_realize()
161     if (!sysbus_realize(SYS_BUS_DEVICE(&s->gcr), errp)) {  in mips_cps_realize()
165     memory_region_add_subregion(&s->container, gcr_base,  in mips_cps_realize()
166                             sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->gcr), 0));  in mips_cps_realize()
170     DEFINE_PROP_UINT32("num-vp", MIPSCPSState, num_vp, 1),
171     DEFINE_PROP_UINT32("num-irq", MIPSCPSState, num_irq, 256),
172     DEFINE_PROP_STRING("cpu-type", MIPSCPSState, cpu_type),
173     DEFINE_PROP_BOOL("cpu-big-endian", MIPSCPSState, cpu_is_bigendian, false),
180     dc->realize = mips_cps_realize;  in mips_cps_class_init()