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/linux-5.10/Documentation/devicetree/bindings/reset/
Dqcom,pdc-global.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reset/qcom,pdc-global.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm PDC Global
10 - Sibi Sankar <sibis@codeaurora.org>
13 The bindings describes the reset-controller found on PDC-Global (Power Domain
19 - description: on SC7180 SoCs the following compatibles must be specified
21 - const: "qcom,sc7180-pdc-global"
22 - const: "qcom,sdm845-pdc-global"
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/linux-5.10/drivers/reset/
Dreset-qcom-pdc.c1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/reset-controller.h>
12 #include <dt-bindings/reset/qcom,sdm845-pdc.h>
26 .name = "pdc-reset",
58 return regmap_update_bits(data->regmap, RPMH_PDC_SYNC_RESET, in qcom_pdc_control_assert()
68 return regmap_update_bits(data->regmap, RPMH_PDC_SYNC_RESET, in qcom_pdc_control_deassert()
80 struct device *dev = &pdev->dev; in qcom_pdc_reset_probe()
86 return -ENOMEM; in qcom_pdc_reset_probe()
93 data->regmap = devm_regmap_init_mmio(dev, base, in qcom_pdc_reset_probe()
95 if (IS_ERR(data->regmap)) { in qcom_pdc_reset_probe()
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/linux-5.10/arch/parisc/kernel/
Dinventory.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Copyright (c) 2001 Matthew Wilcox for Hewlett-Packard
13 * Map before checking for a Snake -- this probably doesn't cause any
26 #include <asm/pdc.h>
30 #include <asm/parisc-device.h>
35 ** DEBUG_PAT Dump details which PDC PAT provides about ranges/devices.
58 /* Determine the pdc "type" used on this machine */ in setup_pdc()
60 printk(KERN_INFO "Determining PDC firmware type: "); in setup_pdc()
71 * is a pdc pat box, or it is an older box. All 64 bit capable in setup_pdc()
72 * machines are either pdc pat boxes or they support PDC_SYSTEM_MAP. in setup_pdc()
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Dprocessor.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Initial setup-routines for HP 9000 based hardware.
6 * Modifications for PA-RISC (C) 1999-2008 Helge Deller <deller@gmx.de>
12 * Initial PA-RISC Version: 04-23-1999 by Helge Deller
27 #include <asm/pdc.h>
30 #include <asm/parisc-device.h>
42 ** PARISC CPU driver - claim "device" and initialize CPU data structures.
48 ** The callback *should* do per-instance initialization of
55 ** The code path not shared is how PDC hands control of the CPU to the OS.
60 * init_cpu_profiler - enable/setup per cpu profiling hooks.
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Dhead.S5 * Copyright (C) 1999-2007 by Helge Deller <deller@gmx.de>
12 * Initial Version 04-23-1999 by Helge Deller <deller@gmx.de>
15 #include <asm/asm-offsets.h>
17 #include <asm/pdc.h>
42 .import $global$ /* forward declaration */
48 /* Make sure sr4-sr7 are set to zero for the kernel address space */
85 /* 2-level page table, so pmd == pgd */
99 addib,> -1,%r1,1b
110 load32 (1<<(KERNEL_INITIAL_ORDER-PAGE_SHIFT)),%r11 /* PFN count */
116 addib,> -1,%r11,$pgt_fill_loop
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Dsetup.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Initial setup-routines for HP 9000 based hardware.
6 * Modifications for PA-RISC (C) 1999 Helge Deller <deller@gmx.de>
12 * Initial PA-RISC Version: 04-23-1999 by Helge Deller
32 #include <asm/pdc.h>
54 /* boot_args[0] is free-mem start, boot_args[1] is ptr to command line */ in setup_cmdline()
84 panic( "PA-RISC Linux currently only supports machines that conform to\n" in dma_ops_init()
85 "the PA-RISC 1.1 or 2.0 architecture specification.\n"); in dma_ops_init()
108 printk(KERN_INFO "The 64-bit Kernel has started...\n"); in setup_arch()
110 printk(KERN_INFO "The 32-bit Kernel has started...\n"); in setup_arch()
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Dpdt.c1 // SPDX-License-Identifier: GPL-2.0
7 * The list contains both single-bit (correctable) and double-bit
13 * - add userspace interface via procfs or sysfs to clear PDT
24 #include <asm/pdc.h>
42 /* global PDT status information */
51 * A pdt_entry holds the physical address in bits 0-57, bits 58-61 are
57 * On non-PAT machines phys_addr is encoded in bits 0-59 and error_type in bit
132 pr_warn("PDT: BAD MEMORY at 0x%08lx, %s%s%s-bit error.\n", in report_mem_err()
163 /* non-PAT machines provide the standard PDC call */ in pdc_pdt_init()
276 return -EINVAL; in pdt_mainloop()
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Dentry.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Linux/PA-RISC Project (http://www.parisc-linux.org/)
8 * Copyright (C) 2000 Hewlett-Packard (John Marvin)
9 * Copyright (C) 1999 Hewlett-Packard (Frank Rowand)
12 #include <asm/asm-offsets.h>
15 * - handle in assembly and use shadowed registers only
16 * - save registers to kernel stack and handle in assembly or C */
41 addil L%(PAGE_SIZE << (PGD_ALLOC_ORDER - 1)),\reg
52 extrd,u \spc,(64 - (SPACEID_SHIFT)),32,\prot
98 * to use a non-shadowed register to carry the value over
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/linux-5.10/arch/parisc/boot/compressed/
Dhead.S9 #include <asm/asm-offsets.h>
12 #include <asm/pdc.h>
19 .import $global$ /* forward declaration */
35 extrw,u %r1, PSW_W_BIT-32, 1, %r1
38 /* Make sure sr4-sr7 are set to zero for the kernel address space */
56 /* Initialize the global data pointer */
61 copy %arg2, %r7 /* rd-start */
62 copy %arg3, %r8 /* rd-end */
67 ssm PSW_W_SM, %r0 /* set W-bit */
76 rsm PSW_W_SM, %r0 /* clear W-bit */
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/linux-5.10/drivers/mailbox/
Dbcm-pdc-mailbox.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * Broadcom PDC Mailbox Driver
8 * The PDC provides a ring based programming interface to one or more hardware
9 * offload engines. For example, the PDC driver works with both SPU-M and SPU2
10 * cryptographic offload hardware. In some chips the PDC is referred to as MDE,
11 * and in others the FA2/FA+ hardware is used with this PDC driver.
13 * The PDC driver registers with the Linux mailbox framework as a mailbox
14 * controller, once for each PDC instance. Ring 0 for each PDC is registered as
15 * a mailbox channel. The PDC driver uses interrupts to determine when data
16 * transfers to and from an offload engine are complete. The PDC driver uses
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/linux-5.10/arch/arm64/boot/dts/broadcom/northstar2/
Dns2.dtsi35 #include <dt-bindings/interrupt-controller/arm-gic.h>
36 #include <dt-bindings/clock/bcm-ns2.h>
40 interrupt-parent = <&gic>;
41 #address-cells = <2>;
42 #size-cells = <2>;
45 #address-cells = <2>;
46 #size-cells = <0>;
50 compatible = "arm,cortex-a57";
52 enable-method = "psci";
53 next-level-cache = <&CLUSTER0_L2>;
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/linux-5.10/arch/parisc/include/asm/
Dropes.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 #include <asm/parisc-device.h>
8 /* "low end" PA8800 machines use ZX1 chipset: PAT PDC and only run 64-bit */
33 unsigned long ibase; /* pdir IOV Space base - shared w/lba_pci */
34 unsigned long imask; /* pdir IOV Space mask - shared w/lba_pci */
38 unsigned long *res_hint; /* next avail IOVP - circular search */
85 unsigned int num_ioc; /* number of on-board IOC's */
96 return d->id.hversion == ASTRO_RUNWAY_PORT; in IS_ASTRO()
100 return d->id.hversion == IKE_MERCED_PORT; in IS_IKE()
104 return d->id.hversion == PLUTO_MCKINLEY_PORT; in IS_PLUTO()
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/linux-5.10/drivers/irqchip/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
216 bool "J-Core integrated AIC" if COMPILE_TEST
220 Support for the J-Core integrated AIC.
231 interrupt pins, as found on SH/R-Mobile and R-Car Gen1 SoCs.
234 bool "Renesas R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} IRQC support" if COMPILE_TEST
239 devices, as found on R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} SoCs.
274 tristate "TS-4800 IRQ controller"
279 Support for the TS-4800 FPGA IRQ controller
391 bool "NPS400 Global Interrupt Manager (GIM)"
395 Support the EZchip NPS400 global interrupt controller
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/linux-5.10/drivers/parisc/
Ddino.c1 // SPDX-License-Identifier: GPL-2.0-or-later
7 ** (c) Copyright 1999,2000 Hewlett-Packard Company
9 ** (c) Copyright 2006-2019 Helge Deller
21 ** The different between Built-in Dino and Card-Mode
24 ** Linux drivers can only use Card-Mode Dino if pci devices I/O port
32 ** 2001-06-14 : Clement Moyroud (moyroudc@esiee.fr)
33 ** - added support for the integrated RS232.
53 #include <asm/pdc.h>
70 ** Config accessor functions only pass in the 8-bit bus number
71 ** and not the 8-bit "PCI Segment" number. Each Dino will be
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Dsba_iommu.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 ** (c) Copyright 2000-2004 Grant Grundler <grundler @ parisc-linux x org>
7 ** (c) Copyright 2000-2004 Hewlett-Packard Company
14 ** J5000/J7000/N-class/L-class machines and their successors.
28 #include <linux/dma-map-ops.h>
30 #include <linux/iommu-helper.h>
46 #include <asm/pdc.h> /* for PDC_MODEL_* */
48 #include <asm/parisc-device.h>
55 ** The number of debug flags is a clue - this code is fragile.
101 /* global count of IOMMUs in the system */
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Dccio-dma.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 ** ccio-dma.c:
4 ** DMA management routines for first generation cache-coherent machines.
9 ** (c) Copyright 2000 Hewlett-Packard Company
15 ** the I/O MMU - basically what x86 does.
17 ** Philipp Rumpf has a "Real Mode" driver for PCX-W machines at:
18 ** CVSROOT=:pserver:anonymous@198.186.203.37:/cvsroot/linux-parisc
19 ** cvs -z3 co linux/arch/parisc/kernel/dma-rm.c
21 ** I've rewritten his code to work under TPG's tree. See ccio-rm-dma.c.
24 ** o outbound DMA is slower - U2 won't prefetch data (GSC+ XQL signal).
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/linux-5.10/drivers/ata/
Dsata_qstor.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * sata_qstor.c - Pacific Digital Corporation QStor SATA
11 * as Documentation/driver-api/libata.rst
38 /* global register offsets */
41 QS_HCT_CTRL = 0x00e4, /* global interrupt mask offset */
45 /* global control bits */
46 QS_HPHY_64BIT = (1 << 1), /* 64-bit bus detected */
47 QS_CNFG3_GSRST = 0x01, /* global chip reset */
50 /* per-channel register offsets */
57 QS_CCT_CTR0 = 0x0900, /* chan control-0 offset */
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Dpdc_adma.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * pdc_adma.c - Pacific Digital Corporation ADMA
10 * as Documentation/driver-api/libata.rst
12 * Supports ATA disks in single-packet ADMA mode.
41 ADMA_REGS((ap)->host->iomap[ADMA_MMIO_BAR], ap->port_no)
53 /* global register offsets */
56 /* per-channel register offsets */
104 board_1841_idx = 0, /* ADMA 2-port controller */
160 { PCI_VDEVICE(PDC, 0x1841), board_1841_idx },
190 struct adma_port_priv *pp = ap->private_data; in adma_reinit_engine()
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/linux-5.10/drivers/pci/hotplug/
Dpnv_php.c1 // SPDX-License-Identifier: GPL-2.0+
14 #include <asm/pnv-pci.h>
15 #include <asm/ppc-pci.h>
22 ((sl)->pdev ? pci_warn((sl)->pdev, x) : dev_warn(&(sl)->bus->dev, x))
40 struct pci_dev *pdev = php_slot->pdev; in pnv_php_disable_irq()
41 int irq = php_slot->irq; in pnv_php_disable_irq()
44 if (php_slot->irq > 0) { in pnv_php_disable_irq()
51 free_irq(php_slot->irq, php_slot); in pnv_php_disable_irq()
52 php_slot->irq = 0; in pnv_php_disable_irq()
55 if (php_slot->wq) { in pnv_php_disable_irq()
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/linux-5.10/drivers/video/fbdev/sis/
Dsis_main.c1 // SPDX-License-Identifier: GPL-2.0-or-later
8 * Copyright (C) 2001-2005 Thomas Winischhofer, Vienna, Austria.
19 * which is (c) 1998 Gerd Knorr <kraxel@goldbach.in-berlin.de>
52 /* ---------------------- Prototypes ------------------------- */
105 /* ------------------ Internal helper routines ----------------- */
112 sisfb_accel = -1; in sisfb_setdefaultparms()
113 sisfb_ypan = -1; in sisfb_setdefaultparms()
114 sisfb_max = -1; in sisfb_setdefaultparms()
115 sisfb_userom = -1; in sisfb_setdefaultparms()
116 sisfb_useoem = -1; in sisfb_setdefaultparms()
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/linux-5.10/arch/arm64/boot/dts/qcom/
Dsc7180.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
8 #include <dt-bindings/clock/qcom,dispcc-sc7180.h>
9 #include <dt-bindings/clock/qcom,gcc-sc7180.h>
10 #include <dt-bindings/clock/qcom,gpucc-sc7180.h>
11 #include <dt-bindings/clock/qcom,lpasscorecc-sc7180.h>
12 #include <dt-bindings/clock/qcom,rpmh.h>
13 #include <dt-bindings/clock/qcom,videocc-sc7180.h>
14 #include <dt-bindings/interconnect/qcom,osm-l3.h>
15 #include <dt-bindings/interconnect/qcom,sc7180.h>
16 #include <dt-bindings/interrupt-controller/arm-gic.h>
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Dsm8250.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/qcom,gcc-sm8250.h>
8 #include <dt-bindings/clock/qcom,gpucc-sm8250.h>
9 #include <dt-bindings/clock/qcom,rpmh.h>
10 #include <dt-bindings/interconnect/qcom,osm-l3.h>
11 #include <dt-bindings/mailbox/qcom-ipcc.h>
12 #include <dt-bindings/power/qcom-aoss-qmp.h>
13 #include <dt-bindings/power/qcom-rpmpd.h>
14 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
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Dsdm845.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/clock/qcom,camcc-sdm845.h>
9 #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
10 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
11 #include <dt-bindings/clock/qcom,gpucc-sdm845.h>
12 #include <dt-bindings/clock/qcom,lpass-sdm845.h>
13 #include <dt-bindings/clock/qcom,rpmh.h>
14 #include <dt-bindings/clock/qcom,videocc-sdm845.h>
15 #include <dt-bindings/interconnect/qcom,osm-l3.h>
16 #include <dt-bindings/interconnect/qcom,sdm845.h>
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/linux-5.10/arch/parisc/mm/
Dinit.c1 // SPDX-License-Identifier: GPL-2.0
10 * Copyright 2006-2007 Helge Deller (deller@gmx.de)
42 * guarantee that global objects will be laid out in memory in the same order
62 .name = "PDC data (Page Zero)",
118 physmem_range_t pmem_holes[MAX_PHYSMEM_RANGES - 1]; in setup_bootmem()
134 for (j = i; j > 0; j--) { in setup_bootmem()
137 if (pmem_ranges[j-1].start_pfn < in setup_bootmem()
142 tmp = pmem_ranges[j-1]; in setup_bootmem()
143 pmem_ranges[j-1] = pmem_ranges[j]; in setup_bootmem()
155 if (pmem_ranges[i].start_pfn - in setup_bootmem()
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/linux-5.10/include/xen/interface/
Dplatform.h4 * Hardware platform operations. Intended for use by domain-0 kernel.
24 * Copyright (c) 2002-2006, K Fraser
57 * Request memory range (@mfn, @mfn+@nr_mfns-1) to have type @type.
58 * On x86, @type is an architecture-defined MTRR memory type.
61 * (x86-specific).
76 * Tear down an existing memory-range type. If @handle is remembered then it
80 * (x86-specific).
90 /* Read current type of an MTRR (x86-specific). */
111 #define QUIRK_NOIRQBALANCING 1 /* Do not restrict IO-APIC RTE targets */
112 #define QUIRK_IOAPIC_BAD_REGSEL 2 /* IO-APIC REGSEL forgets its value */
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