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Searched full:pcs (Results 1 – 14 of 14) sorted by relevance

/qemu/hw/net/
H A Dnpcm_pcs.c2 * Nuvoton NPCM8xx PCS Module
368 NPCMPCSState *pcs = NPCM_PCS(dev); in npcm_pcs_realize() local
371 memory_region_init_io(&pcs->iomem, OBJECT(pcs), &npcm_pcs_ops, pcs, in npcm_pcs_realize()
373 sysbus_init_mmio(sbd, &pcs->iomem); in npcm_pcs_realize()
396 dc->desc = "NPCM PCS Controller"; in npcm_pcs_class_init()
H A Dsungem.c176 /* PCS/Serialink Registers */
178 #define PCS_MIISTAT 0x0004UL /* PCS MII Status Register */
179 #define PCS_ISTAT 0x0018UL /* PCS Interrupt Status Reg */
216 MemoryRegion pcs; member
1283 "Write to unknown PCS register 0x%"HWADDR_PRIx"\n", in sungem_mmio_pcs_write()
1309 "Read from unknown PCS register 0x%"HWADDR_PRIx"\n", in sungem_mmio_pcs_read()
1393 memory_region_init_io(&s->pcs, OBJECT(s), &sungem_mmio_pcs_ops, s, in sungem_realize()
1394 "sungem.pcs", SUNGEM_MMIO_PCS_SIZE); in sungem_realize()
1395 memory_region_add_subregion(&s->sungem, 0x9000, &s->pcs); in sungem_realize()
H A Dtrace-events364 sungem_mmio_pcs_write(uint64_t addr, uint64_t val) "MMIO pcs write to 0x%"PRIx64" val=0x%"PRIx64
365 sungem_mmio_pcs_read(uint64_t addr, uint64_t val) "MMIO pcs read from 0x%"PRIx64" val=0x%"PRIx64
/qemu/hw/intc/
H A Dloongson_ipi.c24 int64_t arch_id, int *index, CPUState **pcs) in loongson_cpu_by_arch_id() argument
37 if (pcs) { in loongson_cpu_by_arch_id()
38 *pcs = cs; in loongson_cpu_by_arch_id()
H A Dloongarch_ipi.c31 int64_t arch_id, int *index, CPUState **pcs) in loongarch_cpu_by_arch_id() argument
43 if (pcs) { in loongarch_cpu_by_arch_id()
44 *pcs = found->cpu; in loongarch_cpu_by_arch_id()
/qemu/include/hw/net/
H A Dnpcm_pcs.h2 * Nuvoton NPCM8xx PCS Module
39 #define TYPE_NPCM_PCS "npcm-pcs"
/qemu/include/hw/vfio/
H A Dvfio-amd-xgbe.h24 * - 5 MMIO regions: MAC, PCS, SerDes Rx/Tx regs,
/qemu/hw/arm/
H A Dnpcm8xx.c70 /* PCS Module */
466 object_initialize_child(obj, "pcs", &s->pcs, TYPE_NPCM_PCS); in npcm8xx_init()
716 * GMAC Physical Coding Sublayer(PCS) Module. Cannot fail. in npcm8xx_realize()
718 sysbus_realize(SYS_BUS_DEVICE(&s->pcs), &error_abort); in npcm8xx_realize()
719 sysbus_mmio_map(SYS_BUS_DEVICE(&s->pcs), 0, NPCM8XX_PCS_BA); in npcm8xx_realize()
/qemu/include/hw/intc/
H A Dloongson_ipi_common.h50 int *index, CPUState **pcs);
/qemu/include/hw/input/
H A Di8042.h49 * + Named GPIO output "a20": A20 line for x86 PCs
/qemu/tests/qtest/
H A Dnpcm_gmac-test.c26 /* Address of the PCS Module */
122 /* PCS Registers */
/qemu/include/hw/arm/
H A Dnpcm8xx.h104 NPCMPCSState pcs; member
/qemu/hw/core/
H A Dsysbus-fdt.c394 * General device interrupt and PCS auto-negotiation interrupts are in add_amd_xgbe_fdt_node()
/qemu/hw/ide/
H A Dahci.c95 [AHCI_PORT_IRQ_BIT_PCS] = "PCS",