/linux-6.15/arch/parisc/include/asm/ |
D | assembly.h | 16 #define REG_SZ 8 62 #define LDREGM ldd,mb 128 addib,NUV,n -1,1,.+8 278 fstd,ma %fr0, 8(\regs) 279 fstd,ma %fr1, 8(\regs) 280 fstd,ma %fr2, 8(\regs) 281 fstd,ma %fr3, 8(\regs) 282 fstd,ma %fr4, 8(\regs) 283 fstd,ma %fr5, 8(\regs) 284 fstd,ma %fr6, 8(\regs) [all …]
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D | barrier.h | 16 #define mb() do { synchronize_caches(); } while (0) macro 17 #define rmb() mb() 18 #define wmb() mb() 19 #define dma_rmb() mb() 20 #define dma_wmb() mb() 22 #define mb() barrier() macro 29 #define __smp_mb() mb() 30 #define __smp_rmb() mb() 31 #define __smp_wmb() mb() 55 case 8: \ [all …]
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/linux-6.15/arch/alpha/kernel/ |
D | core_mcpcia.c | 27 * NOTE: Herein lie back-to-back mb instructions. They are magic. 54 * 3 2|1 0 9 8|7 6 5 4|3 2 1 0|9 8 7 6|5 4 3 2|1 0 9 8|7 6 5 4|3 2 1 0 60 * 10:8 Function number 66 * 3 2|1 0 9 8|7 6 5 4|3 2 1 0|9 8 7 6|5 4 3 2|1 0 9 8|7 6 5 4|3 2 1 0 72 * 23:16 bus number (8 bits = 128 possible buses) 74 * 10:8 function number 104 mb(); in conf_read() 108 mb(); in conf_read() 113 mb(); in conf_read() 117 mb(); in conf_read() [all …]
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D | io.c | 20 mb(); in ioread8() 22 mb(); in ioread8() 29 mb(); in ioread16() 31 mb(); in ioread16() 38 mb(); in ioread32() 40 mb(); in ioread32() 47 mb(); in ioread64() 49 mb(); in ioread64() 55 mb(); in iowrite8() 61 mb(); in iowrite16() [all …]
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D | core_t2.c | 40 * floppy to DMA only via the scatter/gather window set up for 8MB 62 * NOTE: Herein lie back-to-back mb instructions. They are magic. 108 * 3 2|1 0 9 8|7 6 5 4|3 2 1 0|9 8 7 6|5 4 3 2|1 0 9 8|7 6 5 4|3 2 1 0 114 * 10:8 Function number 120 * 3 2|1 0 9 8|7 6 5 4|3 2 1 0|9 8 7 6|5 4 3 2|1 0 9 8|7 6 5 4|3 2 1 0 126 * 23:16 bus number (8 bits = 128 possible buses) 128 * 10:8 function number 156 if (device > 8) { in mk_conf_addr() 163 addr = (0x0800L << device) | ((device_fn & 7) << 8) | (where); in mk_conf_addr() 167 addr = (bus << 16) | (device_fn << 8) | (where); in mk_conf_addr() [all …]
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D | core_cia.c | 34 * NOTE: Herein lie back-to-back mb instructions. They are magic. 57 * 3 2|1 0 9 8|7 6 5 4|3 2 1 0|9 8 7 6|5 4 3 2|1 0 9 8|7 6 5 4|3 2 1 0 63 * 10:8 Function number 69 * 3 2|1 0 9 8|7 6 5 4|3 2 1 0|9 8 7 6|5 4 3 2|1 0 9 8|7 6 5 4|3 2 1 0 75 * 23:16 bus number (8 bits = 128 possible buses) 77 * 10:8 function number 96 *pci_addr = (bus << 16) | (device_fn << 8) | where; in mk_conf_addr() 118 mb(); in conf_read() 125 mb(); in conf_read() 129 mb(); in conf_read() [all …]
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D | core_polaris.c | 47 * 9 8 7 6|5 4 3 2|1 0 9 8|7 6 5 4|3 2 1 0|9 8 7 6|5 4 3 2|1 0 9 8|7 6 5 4|3 2 1 0 52 * 23:16 bus number (8 bits = 128 possible buses) 54 * 10:8 function number 73 *pci_addr = (bus << 16) | (device_fn << 8) | (where) | in mk_conf_addr() 122 mb(); in polaris_write_config() 127 mb(); in polaris_write_config() 132 mb(); in polaris_write_config() 186 mb(); in polaris_pci_clr_err() 194 mb(); in polaris_machine_check() 195 mb(); in polaris_machine_check() [all …]
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/linux-6.15/drivers/mailbox/ |
D | rockchip-mailbox.c | 17 #define MAILBOX_A2B_CMD(x) (0x08 + (x) * 8) 18 #define MAILBOX_A2B_DAT(x) (0x0c + (x) * 8) 22 #define MAILBOX_B2A_CMD(x) (0x30 + (x) * 8) 23 #define MAILBOX_B2A_DAT(x) (0x34 + (x) * 8) 38 struct rockchip_mbox *mb; member 54 struct rockchip_mbox *mb = dev_get_drvdata(chan->mbox->dev); in rockchip_mbox_send_data() local 56 struct rockchip_mbox_chan *chans = mb->chans; in rockchip_mbox_send_data() 61 if (msg->rx_size > mb->buf_size) { in rockchip_mbox_send_data() 62 dev_err(mb->mbox.dev, "Transmit size over buf size(%d)\n", in rockchip_mbox_send_data() 63 mb->buf_size); in rockchip_mbox_send_data() [all …]
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/linux-6.15/drivers/scsi/qla2xxx/ |
D | qla_mbx.c | 95 * mb[MAX_MAILBOX_REGISTER_COUNT] = returned mailbox data. 161 mcp->mb[0] = MBS_LINK_DOWN_ERROR; in qla2x00_mailbox_command() 171 !is_rom_cmd(mcp->mb[0])) || ha->flags.eeh_busy) { in qla2x00_mailbox_command() 174 mcp->mb[0]); in qla2x00_mailbox_command() 188 mcp->mb[0]); in qla2x00_mailbox_command() 198 ha->flags.purge_mbox, ha->flags.eeh_busy, mcp->mb[0]); in qla2x00_mailbox_command() 208 "Prepare to issue mbox cmd=0x%x.\n", mcp->mb[0]); in qla2x00_mailbox_command() 228 iptr = mcp->mb; in qla2x00_mailbox_command() 229 command = mcp->mb[0]; in qla2x00_mailbox_command() 235 if (IS_QLA2200(ha) && cnt == 8) in qla2x00_mailbox_command() [all …]
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/linux-6.15/Documentation/arch/x86/x86_64/ |
D | mm.rst | 20 from TB to GB and then MB/KB. 36 …0000800000000000 | +128 TB | 7fffffffffffffff | ~8 EB | ... huge, almost 63 bits wide hole of… 37 … | | | | virtual memory addresses up to the -8 EB 47 …8000000000000000 | -8 EB | ffff7fffffffffff | ~8 EB | ... huge, almost 63 bits wide hole of… 55 …ffff800000000000 | -128 TB | ffff87ffffffffff | 8 TB | ... guard hole, also reserved for hyp… 77 …ffffffff80000000 | -2 GB | ffffffff9fffffff | 512 MB | kernel text mapping, mapped to physic… 78 ffffffff80000000 |-2048 MB | | | 79 ffffffffa0000000 |-1536 MB | fffffffffeffffff | 1520 MB | module mapping space 80 ffffffffff000000 | -16 MB | | | 81 …FIXADDR_START | ~-11 MB | ffffffffff5fffff | ~0.5 MB | kernel-internal fixmap range, variable s… [all …]
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/linux-6.15/drivers/net/ethernet/apple/ |
D | macmace.c | 219 mp->chipid = mp->mace->chipid_hi << 8 | mp->mace->chipid_lo; in mace_probe() 222 * The PROM contains 8 bytes which total 0xFF when XOR'd in mace_probe() 236 for (; j < 8; ++j) { in mace_probe() 266 volatile struct mace *mb = mp->mace; in mace_reset() local 272 mb->biucc = SWRST; in mace_reset() 273 if (mb->biucc & SWRST) { in mace_reset() 284 mb->maccc = 0; /* turn off tx, rx */ in mace_reset() 285 mb->imr = 0xFF; /* disable all intrs for now */ in mace_reset() 286 i = mb->ir; in mace_reset() 288 mb->biucc = XMTSP_64; in mace_reset() [all …]
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D | mace.c | 31 #define N_RX_RING 8 35 #define RX_BUFLEN (ETH_FRAME_LEN + 8) 173 mp->chipid = (in_8(&mp->mace->chipid_hi) << 8) | in mace_probe() 251 mp->chipid >> 8, mp->chipid & 0xff); in mace_probe() 319 volatile struct mace __iomem *mb = mp->mace; in mace_reset() local 325 out_8(&mb->biucc, SWRST); in mace_reset() 326 if (in_8(&mb->biucc) & SWRST) { in mace_reset() 337 out_8(&mb->imr, 0xff); /* disable all intrs for now */ in mace_reset() 338 i = in_8(&mb->ir); in mace_reset() 339 out_8(&mb->maccc, 0); /* turn off tx, rx */ in mace_reset() [all …]
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/linux-6.15/Documentation/fb/ |
D | matroxfb.rst | 49 8 0x100 0x101 0x180 0x103 0x188 64 8 0x105 0x190 0x107 0x198 0x11C 78 8x8 0x1C0 0x108 0x10A 0x10B 0x10C 79 8x16 2, 3, 7 0x109 94 architectures there are some glitches for 24bpp videomodes. 8, 16 and 32bpp 128 memory usable for on-screen display (i.e. max. 8 MB). 165 - 0 -> 2x128Kx32 chips, 2MB onboard, probably sgram 166 - 1 -> 2x128Kx32 chips, 4MB onboard, probably sgram 167 - 2 -> 2x256Kx32 chips, 4MB onboard, probably sgram 168 - 3 -> 2x256Kx32 chips, 8MB onboard, probably sgram [all …]
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D | intel810.rst | 37 - Supports color depths of 8, 16, 24 and 32 bits per pixel 41 - Full and optimized hardware acceleration at 8, 16 and 24 bpp 88 select amount of system RAM in MB to allocate for the video memory 90 Recommendation: 1 - 4 MB. 96 Recommendation: 8 97 (default = 8) 123 select at what offset in MB of the logical memory to allocate the 126 offset (16 MB for a 64 MB aperture, 8 MB for a 32 MB aperture) will 127 avoid XFree86's usage and allows up to 7 MB/15 MB of framebuffer 129 (0 for maximum usage, 31/63 MB for the least amount). Note, an [all …]
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/linux-6.15/arch/mips/include/asm/sgi/ |
D | gio.h | 20 * There is 10MB of GIO address space for GIO64 slot devices 23 * 0 GFX 0x1f000000 - 0x1f3fffff 4MB 24 * 1 EXP0 0x1f400000 - 0x1f5fffff 2MB 25 * 2 EXP1 0x1f600000 - 0x1f9fffff 4MB 29 * - MISC 0x1fb00000 - 0x1fbfffff 1MB 32 * - RESERVED 0x18000000 - 0x1effffff 112MB 37 * read with an "ID" value. IDs are either 8 or 32 bits long. IDs less 38 * than 128 are 8 bits long, with the most significant 24 bits read from 43 * bit 7 0=GIO Product ID is 8 bits wide 45 * bits 8:15 manufacturer version for the product. [all …]
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/linux-6.15/arch/x86/kernel/cpu/ |
D | cacheinfo.c | 50 #define MB(x) ((x) * 1024) macro 57 { 0x06, LVL_1_INST, 8 }, /* 4-way set assoc, 32 byte line size */ 60 { 0x0a, LVL_1_DATA, 8 }, /* 2 way set assoc, 32 byte line size */ 64 { 0x21, LVL_2, 256 }, /* 8-way set assoc, 64 byte line size */ 66 { 0x23, LVL_3, MB(1) }, /* 8-way set assoc, sectored cache, 64 byte line size */ 67 { 0x25, LVL_3, MB(2) }, /* 8-way set assoc, sectored cache, 64 byte line size */ 68 { 0x29, LVL_3, MB(4) }, /* 8-way set assoc, sectored cache, 64 byte line size */ 69 { 0x2c, LVL_1_DATA, 32 }, /* 8-way set assoc, 64 byte line size */ 70 { 0x30, LVL_1_INST, 32 }, /* 8-way set assoc, 64 byte line size */ 81 { 0x44, LVL_2, MB(1) }, /* 4-way set assoc, 32 byte line size */ [all …]
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/linux-6.15/drivers/power/supply/ |
D | ipaq_micro_battery.c | 51 struct micro_battery *mb = container_of(work, in micro_battery_work() local 61 ipaq_micro_tx_msg_sync(mb->micro, &msg_battery); in micro_battery_work() 75 mb->ac = msg_battery.rx_data[0]; in micro_battery_work() 76 mb->chemistry = msg_battery.rx_data[1]; in micro_battery_work() 77 mb->voltage = ((((unsigned short)msg_battery.rx_data[3] << 8) + in micro_battery_work() 79 mb->flag = msg_battery.rx_data[4]; in micro_battery_work() 85 ipaq_micro_tx_msg_sync(mb->micro, &msg_sensor); in micro_battery_work() 86 mb->temperature = msg_sensor.rx_data[1] << 8 | msg_sensor.rx_data[0]; in micro_battery_work() 88 queue_delayed_work(mb->wq, &mb->update, msecs_to_jiffies(BATT_PERIOD)); in micro_battery_work() 93 struct micro_battery *mb = dev_get_drvdata(b->dev.parent); in get_capacity() local [all …]
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/linux-6.15/arch/arc/plat-axs10x/ |
D | axs10x.c | 44 * | snps,dw-apb-intc (MB)| in axs10x_enable_gpio_intc_wire() 55 * DT hardware topology - connect MB intc directly to cpu intc in axs10x_enable_gpio_intc_wire() 94 char mb[32]; in axs10x_early_init() local 104 scnprintf(mb, 32, "MainBoard v%d", mb_rev); in axs10x_early_init() 105 axs10x_print_board_ver(CREG_MB_VER, mb); in axs10x_early_init() 121 * Each AXI master has a 4GB memory map specified as 16 apertures of 256MB, each 122 * of which maps to a corresponding 256MB aperture in Target slave memory map. 124 * e.g. ARC cpu AXI Master's aperture 8 (0x8000_0000) is mapped to aperture 0 127 * Access from cpu to MB controllers such as GMAC is setup using AXI Tunnel: 131 * MB AXI Tunnel Master, which also has a mem map setup [all …]
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/linux-6.15/drivers/accel/habanalabs/include/gaudi/ |
D | gaudi.h | 15 #define SRAM_BAR_SIZE 0x4000000ull /* 64MB */ 16 #define CFG_BAR_SIZE 0x8000000ull /* 128MB */ 19 #define CFG_SIZE 0x4000000 /* 32MB CFG + 32MB DBG*/ 22 #define SRAM_SIZE 0x1400000 /* 20MB */ 49 #define TPC_NUMBER_OF_ENGINES 8 51 #define DMA_NUMBER_OF_CHANNELS 8 57 #define NUMBER_OF_IF 8
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/linux-6.15/net/can/ |
D | gw.c | 177 for (i = 0; i < CANFD_MAX_DLEN; i += 8) in mod_and_fddata() 185 for (i = 0; i < CANFD_MAX_DLEN; i += 8) in mod_or_fddata() 193 for (i = 0; i < CANFD_MAX_DLEN; i += 8) in mod_xor_fddata() 224 /* plain data length 0 .. 8 - that was easy */ in mod_store_ccdlc() 297 * relative to received dlc -1 .. -8 : in cgw_chk_csum_parms() 298 * e.g. for received dlc = 8 in cgw_chk_csum_parms() 301 * -8 => index = 0 (data[0]) in cgw_chk_csum_parms() 395 (cf->can_id >> 8 & 0xFF)]; in cgw_csum_crc8_rel() 422 (cf->can_id >> 8 & 0xFF)]; in cgw_csum_crc8_pos() 449 (cf->can_id >> 8 & 0xFF)]; in cgw_csum_crc8_neg() [all …]
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/linux-6.15/arch/x86/kernel/ |
D | early-quirks.c | 127 d |= 1<<8; in ati_ixp4x0_rev() 243 #define MB(x) (KB (KB (x))) macro 253 return MB(1); in i830_tseg_size() 268 case I845_TSEG_SIZE_1M: return MB(1); in i845_tseg_size() 282 return MB(1); in i85x_tseg_size() 287 return read_pci_config_byte(0, 0, 0, I830_DRB3) * MB(32); in i830_mem_size() 292 return read_pci_config_byte(0, 0, 1, I85X_DRB3) * MB(32); in i85x_mem_size() 364 case I830_GMCH_GMS_STOLEN_1024: return MB(1); in i830_stolen_size() 365 case I830_GMCH_GMS_STOLEN_8192: return MB(8); in i830_stolen_size() 384 case I855_GMCH_GMS_STOLEN_1M: return MB(1); in gen3_stolen_size() [all …]
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/linux-6.15/drivers/net/fddi/skfp/ |
D | smt.c | 26 #define m_fc(mb) ((mb)->sm_data[0]) argument 72 static void smt_add_frame_len(SMbuf *mb, int len); 271 if (time - smc->sm.smt_last_lem >= TICKS_PER_SECOND*8) { in smt_event() 273 * Use 8 sec. for the time intervall, it simplifies the in smt_event() 352 /* If ratio is more than 5 in 8 seconds in smt_event() 460 void smt_received_pack(struct s_smc *smc, SMbuf *mb, int fs) in smt_received_pack() argument 468 switch (m_fc(mb)) { in smt_received_pack() 475 smt_free_mbuf(smc,mb) ; in smt_received_pack() 480 sm = smtod(mb,struct smt_header *) ; in smt_received_pack() 486 smt_free_mbuf(smc,mb) ; in smt_received_pack() [all …]
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/linux-6.15/Documentation/devicetree/bindings/memory-controllers/ |
D | qcom,ebi2.yaml | 28 memory is referred to as "Chip Peripheral SS FPB0" and is 168MB big. 31 CS0 GPIO134 0x1a800000-0x1b000000 (8MB) 32 CS1 GPIO39 (A) / GPIO123 (B) 0x1b000000-0x1b800000 (8MB) 33 CS2 GPIO40 (A) / GPIO124 (B) 0x1b800000-0x1c000000 (8MB) 34 CS3 GPIO133 0x1d000000-0x25000000 (128 MB) 35 CS4 GPIO132 0x1c800000-0x1d000000 (8MB) 36 CS5 GPIO131 0x1c000000-0x1c800000 (8MB) 46 flag somewhere for 8bit memories.
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/linux-6.15/drivers/eisa/ |
D | eisa.ids | 246 CPQ5251 "Compaq 5/133 System Processor Board-2MB" 247 CPQ5253 "Compaq 5/166 System Processor Board-2MB" 248 CPQ5255 "Compaq 5/133 System Processor Board-1MB" 249 CPQ525D "Compaq 5/100 System Processor Board-1MB" 281 CPQ9018 "Compaq 486/33 Processor Board (8 MB)" 284 CPQ9036 "Compaq 486SX/25 Processor Board (8 MB)" 285 CPQ9037 "Compaq 486SX/16 Processor Board (8 MB)" 286 CPQ9038 "Compaq 486SX/33 Processor Board (8 MB)" 287 CPQ903C "Compaq 486SX/33 Processor Board (4 MB)" 296 CPQ9251 "Compaq 5/133 System Processor Board-2MB" [all …]
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/linux-6.15/tools/testing/selftests/mm/ |
D | charge_reserved_hugetlb.sh | 87 mb=$(($kb / 1024)) 88 echo $mb 91 MB=$(get_machine_hugepage_size) 101 echo "$cgroup_limit" >$cgroup_path/$name/hugetlb.${MB}MB.$fault_limit_file 105 $cgroup_path/$name/hugetlb.${MB}MB.$reservation_limit_file 117 local path="$cgroup_path/$cgroup/hugetlb.${MB}MB.$reservation_usage_file" 130 local path="$cgroup_path/$cgroup/hugetlb.${MB}MB.$reservation_usage_file" 143 local path="$cgroup_path/$cgroup/hugetlb.${MB}MB.$fault_usage_file" 160 local expect_failure="$8" 169 local hugetlb_usage=$cgroup_path/$cgroup/hugetlb.${MB}MB.$fault_usage_file [all …]
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