kernel/cpu/cacheinfo.c

50 #define MB(x)	((x) * 1024)  macro
57 	{ 0x06, LVL_1_INST, 8 },	/* 4-way set assoc, 32 byte line size */
60 	{ 0x0a, LVL_1_DATA, 8 },	/* 2 way set assoc, 32 byte line size */
64 	{ 0x21, LVL_2,      256 },	/* 8-way set assoc, 64 byte line size */
66 	{ 0x23, LVL_3,      MB(1) },	/* 8-way set assoc, sectored cache, 64 byte line size */
67 	{ 0x25, LVL_3,      MB(2) },	/* 8-way set assoc, sectored cache, 64 byte line size */
68 	{ 0x29, LVL_3,      MB(4) },	/* 8-way set assoc, sectored cache, 64 byte line size */
69 	{ 0x2c, LVL_1_DATA, 32 },	/* 8-way set assoc, 64 byte line size */
70 	{ 0x30, LVL_1_INST, 32 },	/* 8-way set assoc, 64 byte line size */
81 	{ 0x44, LVL_2,      MB(1) },	/* 4-way set assoc, 32 byte line size */
82 	{ 0x45, LVL_2,      MB(2) },	/* 4-way set assoc, 32 byte line size */
83 	{ 0x46, LVL_3,      MB(4) },	/* 4-way set assoc, 64 byte line size */
84 	{ 0x47, LVL_3,      MB(8) },	/* 8-way set assoc, 64 byte line size */
85 	{ 0x48, LVL_2,      MB(3) },	/* 12-way set assoc, 64 byte line size */
86 	{ 0x49, LVL_3,      MB(4) },	/* 16-way set assoc, 64 byte line size */
87 	{ 0x4a, LVL_3,      MB(6) },	/* 12-way set assoc, 64 byte line size */
88 	{ 0x4b, LVL_3,      MB(8) },	/* 16-way set assoc, 64 byte line size */
89 	{ 0x4c, LVL_3,      MB(12) },	/* 12-way set assoc, 64 byte line size */
90 	{ 0x4d, LVL_3,      MB(16) },	/* 16-way set assoc, 64 byte line size */
91 	{ 0x4e, LVL_2,      MB(6) },	/* 24-way set assoc, 64 byte line size */
92 	{ 0x60, LVL_1_DATA, 16 },	/* 8-way set assoc, sectored cache, 64 byte line size */
93 	{ 0x66, LVL_1_DATA, 8 },	/* 4-way set assoc, sectored cache, 64 byte line size */
96 	{ 0x78, LVL_2,      MB(1) },	/* 4-way set assoc, 64 byte line size */
97 	{ 0x79, LVL_2,      128 },	/* 8-way set assoc, sectored cache, 64 byte line size */
98 	{ 0x7a, LVL_2,      256 },	/* 8-way set assoc, sectored cache, 64 byte line size */
99 	{ 0x7b, LVL_2,      512 },	/* 8-way set assoc, sectored cache, 64 byte line size */
100 	{ 0x7c, LVL_2,      MB(1) },	/* 8-way set assoc, sectored cache, 64 byte line size */
101 	{ 0x7d, LVL_2,      MB(2) },	/* 8-way set assoc, 64 byte line size */
103 	{ 0x80, LVL_2,      512 },	/* 8-way set assoc, 64 byte line size */
104 	{ 0x82, LVL_2,      256 },	/* 8-way set assoc, 32 byte line size */
105 	{ 0x83, LVL_2,      512 },	/* 8-way set assoc, 32 byte line size */
106 	{ 0x84, LVL_2,      MB(1) },	/* 8-way set assoc, 32 byte line size */
107 	{ 0x85, LVL_2,      MB(2) },	/* 8-way set assoc, 32 byte line size */
109 	{ 0x87, LVL_2,      MB(1) },	/* 8-way set assoc, 64 byte line size */
111 	{ 0xd1, LVL_3,      MB(1) },	/* 4-way set assoc, 64 byte line size */
112 	{ 0xd2, LVL_3,      MB(2) },	/* 4-way set assoc, 64 byte line size */
113 	{ 0xd6, LVL_3,      MB(1) },	/* 8-way set assoc, 64 byte line size */
114 	{ 0xd7, LVL_3,      MB(2) },	/* 8-way set assoc, 64 byte line size */
115 	{ 0xd8, LVL_3,      MB(4) },	/* 12-way set assoc, 64 byte line size */
116 	{ 0xdc, LVL_3,      MB(2) },	/* 12-way set assoc, 64 byte line size */
117 	{ 0xdd, LVL_3,      MB(4) },	/* 12-way set assoc, 64 byte line size */
118 	{ 0xde, LVL_3,      MB(8) },	/* 12-way set assoc, 64 byte line size */
119 	{ 0xe2, LVL_3,      MB(2) },	/* 16-way set assoc, 64 byte line size */
120 	{ 0xe3, LVL_3,      MB(4) },	/* 16-way set assoc, 64 byte line size */
121 	{ 0xe4, LVL_3,      MB(8) },	/* 16-way set assoc, 64 byte line size */
122 	{ 0xea, LVL_3,      MB(12) },	/* 24-way set assoc, 64 byte line size */
123 	{ 0xeb, LVL_3,      MB(18) },	/* 24-way set assoc, 64 byte line size */
124 	{ 0xec, LVL_3,      MB(24) },	/* 24-way set assoc, 64 byte line size */
182 		unsigned line_size:8;
183 		unsigned lines_per_tag:8;
184 		unsigned assoc:8;
185 		unsigned size_in_kb:8;
192 		unsigned line_size:8;
202 		unsigned line_size:8;
215 	[6] = 8,
216 	[8] = 16,
329 	l3->subcaches[2] = sc2 = !(val & BIT(8))  + !(val & BIT(9));  in amd_calc_l3_indices()