| /qemu/target/xtensa/core-de233_fpu/ |
| H A D | gdb-config.c.inc | 76 "03:03:54:00","03:03:14:00",0,0,0,0)
78 "03:13:54:00","03:13:14:00",0,0,0,0)
79 XTREG( 54,224,64, 8, 8,0x0032,0x0006, 0, 4,0x0401,f2,
80 "03:23:54:00","03:23:14:00",0,0,0,0)
82 "03:33:54:00","03:33:14:00",0,0,0,0)
84 "03:43:54:00","03:43:14:00",0,0,0,0)
86 "03:53:54:00","03:53:14:00",0,0,0,0)
88 "03:63:54:00","03:63:14:00",0,0,0,0)
90 "03:73:54:00","03:73:14:00",0,0,0,0)
92 "03:83:54:00","03:83:14:00",0,0,0,0)
[all …]
|
| /qemu/include/hw/gpio/ |
| H A D | bcm2835_gpio.h | 31 uint8_t fsel[54];
34 qemu_irq out[54];
|
| /qemu/hw/gpio/ |
| H A D | bcm2835_gpio.c | 107 if (index >= 0 && index < 54) { in gpfsel_is_out()
288 VMSTATE_UINT8_ARRAY(fsel, BCM2835GpioState, 54),
307 qdev_init_gpio_out(dev, s->out, 54); in bcm2835_gpio_init()
|
| /qemu/tests/tcg/aarch64/ |
| H A D | pauth-1.c | 6 #define PR_PAC_RESET_KEYS 54
|
| H A D | pauth-5.c | 33 * toggle bit 54 in the output... in main()
|
| H A D | pauth-2.c | 64 * Without FEAT_Pauth2, bits [54:53] are an error indicator based on in do_test()
|
| /qemu/target/hppa/ |
| H A D | machine.c | 63 ent->ar_pl1 = extract64(val, 54, 2); in get_tlb()
86 val = deposit64(val, 54, 2, ent->ar_pl1); in put_tlb()
|
| H A D | gdbstub.c | 105 case 54: in hppa_cpu_gdb_read_register()
233 case 54: in hppa_cpu_gdb_write_register()
|
| /qemu/target/hexagon/ |
| H A D | hex_regs.h | 79 HEX_REG_QEMU_HVX_CNT = 54,
|
| /qemu/include/hw/arm/ |
| H A D | omap.h | 260 #define OMAP_INT_1610_DMA_CH7 54
318 #define OMAP_INT_730_DMA_CH7 54
477 #define OMAP_DMA_MMC2_TX 54
|
| /qemu/hw/hppa/ |
| H A D | hppa_hardware.h | 79 #define HPPA64_DIAG_SPHASH_ENABLE 0x200 /* DIAG_SPHASH_ENAB (bit 54) */
|
| /qemu/docs/system/devices/ |
| H A D | keyboard.rst | 103 - 54
|
| /qemu/tests/tcg/alpha/ |
| H A D | test-cvttq.c | 16 #define FPCR_OVF (1UL << 54)
|
| /qemu/hw/display/ |
| H A D | cirrus_vga_internal.h | 2 * QEMU Cirrus CLGD 54xx VGA Emulator, ISA bus support
|
| H A D | cirrus_vga_isa.c | 2 * QEMU Cirrus CLGD 54xx VGA Emulator, ISA bus support
|
| H A D | edid-generate.c | 145 } else if (std < 54) { in edid_fill_modes()
159 while (std < 54) { in edid_fill_modes()
385 uint8_t *desc = edid + 54; in qemu_edid_generate()
|
| /qemu/docs/system/ |
| H A D | virtio-net-failover.rst | 43 -device virtio-net-pci,netdev=hostnet1,id=net1,mac=52:54:00:6f:55:cc, \
|
| /qemu/include/hw/riscv/ |
| H A D | sifive_u.h | 159 #define SIFIVE_U_PLIC_NUM_SOURCES 54
|
| /qemu/hw/sd/ |
| H A D | sdmmc-internal.h | 29 #define EXT_CSD_EXP_EVENTS_STATUS 54 /* RO, 2 bytes */
|
| /qemu/linux-user/alpha/ |
| H A D | target_errno_defs.h | 53 #define TARGET_ECONNRESET 54
|
| /qemu/linux-user/hppa/ |
| H A D | target_errno_defs.h | 48 #define TARGET_ENOSTR 54
|
| /qemu/include/hw/cxl/ |
| H A D | cxl_events.h | 73 * CXL r3.1 section 8.2.9.2.3; Table 8-54
|
| /qemu/linux-user/loongarch64/ |
| H A D | vdso.S | 113 .cfi_offset 54, B_FR + 22 * 8
|
| /qemu/include/hw/misc/ |
| H A D | imx6_ccm.h | 84 #define CCM_ANALOG_PLL_MLB_CLR 54
|
| /qemu/include/hw/ssi/ |
| H A D | pnv_spi_regs.h | 40 #define SPI_CTR_CFG_N2_CTRL_B2 PPC_BIT(54)
|