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/qemu/hw/block/
H A Dm25p80_sfdp.c25 0x53, 0x46, 0x44, 0x50, 0x00, 0x01, 0x00, 0xff,
26 0x00, 0x00, 0x01, 0x09, 0x30, 0x00, 0x00, 0xff,
27 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
28 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
29 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
30 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
31 0xe5, 0x20, 0xfb, 0xff, 0xff, 0xff, 0xff, 0x0f,
32 0x29, 0xeb, 0x27, 0x6b, 0x08, 0x3b, 0x27, 0xbb,
33 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x27, 0xbb,
34 0xff, 0xff, 0x29, 0xeb, 0x0c, 0x20, 0x10, 0xd8,
[all …]
/qemu/tests/tcg/s390x/
H A Dfloat.h13 #define CLASS_MINUS_INF 0
39 /* -inf */ {1, {{0xff, 0x80, 0x00, 0x00}}},
40 /* -Fn */ {2, {{0xc2, 0x28, 0x00, 0x00},
41 {0xc2, 0x29, 0x00, 0x00}}},
42 /* -0 */ {1, {{0x80, 0x00, 0x00, 0x00}}},
43 /* +0 */ {1, {{0x00, 0x00, 0x00, 0x00}}},
44 /* +Fn */ {2, {{0x42, 0x28, 0x00, 0x00},
45 {0x42, 0x2a, 0x00, 0x00}}},
46 /* +inf */ {1, {{0x7f, 0x80, 0x00, 0x00}}},
47 /* QNaN */ {2, {{0x7f, 0xff, 0xff, 0xff},
[all …]
/qemu/hw/rx/
H A Drx62n.c38 #define RX62N_IRAM_BASE 0x00000000
39 #define RX62N_DFLASH_BASE 0x00100000
40 #define RX62N_CFLASH_BASE 0xfff80000
46 #define RX62N_ICU_BASE 0x00087000
47 #define RX62N_TMR_BASE 0x00088200
48 #define RX62N_CMT_BASE 0x00088000
49 #define RX62N_SCI_BASE 0x00088240
79 * 0x00 - 0x91: IPR no (IPR00 to IPR91)
80 * 0xff: IPR not assigned
84 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
[all …]
/qemu/tests/qemu-iotests/
H A D08025 seq=`basename $0`
35 trap "_cleanup; exit \$status" 0 1 2 3 15
47 _unsupported_imgopts 'refcount_bits=1[^0-9]' data_file 'compat=0.10'
63 offset_l2_table_0=$((0x40000))
65 offset_snap1=$((0x70000))
66 offset_snap1_l1_offset=$((offset_snap1 + 0))
72 poke_file "$TEST_IMG" "$offset_header_size" "\xff\xff\xff\xff"
73 { $QEMU_IO -c "read 0 512" $TEST_IMG; } 2>&1 | _filter_qemu_io | _filter_testdir
74 poke_file "$TEST_IMG" "$offset_header_size" "\x7f\xff\xff\xff"
75 { $QEMU_IO -c "read 0 512" $TEST_IMG; } 2>&1 | _filter_qemu_io | _filter_testdir
[all …]
H A D11628 seq=`basename $0`
37 trap "_cleanup; exit \$status" 0 1 2 3 15
54 $QEMU_IO -f "$IMGFMT" -c "read 0 $size" "$TEST_IMG" 2>&1 | _filter_qemu_io | _filter_testdir
59 poke_file "$TEST_IMG" "0" "QEDX"
60 $QEMU_IO -f "$IMGFMT" -c "read 0 $size" "$TEST_IMG" 2>&1 | _filter_qemu_io | _filter_testdir
65 poke_file "$TEST_IMG" "4" "\xff\xff\xff\xff"
66 $QEMU_IO -f "$IMGFMT" -c "read 0 $size" "$TEST_IMG" 2>&1 | _filter_qemu_io | _filter_testdir
71 poke_file "$TEST_IMG" "8" "\xff\xff\xff\xff"
72 $QEMU_IO -f "$IMGFMT" -c "read 0 $size" "$TEST_IMG" 2>&1 | _filter_qemu_io | _filter_testdir
77 poke_file "$TEST_IMG" "12" "\xff\xff\xff\xff"
[all …]
H A D09225 seq=`basename $0`
35 trap "_cleanup; exit \$status" 0 1 2 3 15
54 poke_file "$TEST_IMG" "$offset_cluster_bits" "\xff"
55 { $QEMU_IO -c "read 0 512" $TEST_IMG; } 2>&1 | _filter_qemu_io | _filter_testdir
57 { $QEMU_IO -c "read 0 512" $TEST_IMG; } 2>&1 | _filter_qemu_io | _filter_testdir
59 { $QEMU_IO -c "read 0 512" $TEST_IMG; } 2>&1 | _filter_qemu_io | _filter_testdir
61 { $QEMU_IO -c "read 0 512" $TEST_IMG; } 2>&1 | _filter_qemu_io | _filter_testdir
66 poke_file "$TEST_IMG" "$offset_l2_bits" "\xff"
67 { $QEMU_IO -c "read 0 512" $TEST_IMG; } 2>&1 | _filter_qemu_io | _filter_testdir
69 { $QEMU_IO -c "read 0 512" $TEST_IMG; } 2>&1 | _filter_qemu_io | _filter_testdir
[all …]
H A D07525 seq=`basename $0`
34 trap "_cleanup; exit \$status" 0 1 2 3 15
51 $QEMU_IO -r -c "read 0 512" $TEST_IMG 2>&1 | _filter_qemu_io | _filter_testdir
62 $QEMU_IO -r -c "read 0 512" $TEST_IMG 2>&1 | _filter_qemu_io | _filter_testdir
68 $QEMU_IO -r -c "read 0 512" $TEST_IMG 2>&1 | _filter_qemu_io | _filter_testdir
73 poke_file "$TEST_IMG" "$block_size_offset" "\xff\xff\xfe\x00"
74 $QEMU_IO -r -c "read 0 512" $TEST_IMG 2>&1 | _filter_qemu_io | _filter_testdir
79 poke_file "$TEST_IMG" "$n_blocks_offset" "\xff\xff\xff\xff"
80 $QEMU_IO -r -c "read 0 512" $TEST_IMG 2>&1 | _filter_qemu_io | _filter_testdir
86 $QEMU_IO -r -c "read 0 512" $TEST_IMG 2>&1 | _filter_qemu_io | _filter_testdir
[all …]
H A D05925 seq=`basename $0`
35 trap "_cleanup; exit \$status" 0 1 2 3 15
56 poke_file "$TEST_IMG" "$granularity_offset" "\xff\xff\xff\xff\xff\xff\xff\xff"
57 { $QEMU_IO -c "read 0 512" "$TEST_IMG"; } 2>&1 | _filter_qemu_io | _filter_testdir
62 poke_file "$TEST_IMG" "$grain_table_size_offset" "\xff\xff\xff\xff"
63 { $QEMU_IO -c "read 0 512" "$TEST_IMG"; } 2>&1 | _filter_qemu_io | _filter_testdir
68 poke_file "$TEST_IMG" "$capacity_offset" "\xff\xff\xff\xff"
70 { $QEMU_IO -c "read 0 512" "$TEST_IMG"; } 2>&1 | _filter_qemu_io | _filter_testdir
114 $QEMU_IO -f qcow2 -c "write -P 0xa 0 512" "$TEST_IMG.qcow2" | _filter_qemu_io
115 $QEMU_IO -f qcow2 -c "write -P 0xb 10240 512" "$TEST_IMG.qcow2" | _filter_qemu_io
[all …]
H A D07625 seq=`basename $0`
34 trap "_cleanup; exit \$status" 0 1 2 3 15
44 tracks_offset=$((0x1c))
45 catalog_entries_offset=$((0x20))
46 nb_sectors_offset=$((0x24))
51 { $QEMU_IO -c "read -P 0x11 0 64k" "$TEST_IMG"; } 2>&1 | _filter_qemu_io | _filter_testdir
56 poke_file "$TEST_IMG" "$catalog_entries_offset" "\xff\xff\xff\xff"
57 { $QEMU_IO -c "read 0 512" "$TEST_IMG"; } 2>&1 | _filter_qemu_io | _filter_testdir
62 poke_file "$TEST_IMG" "$nb_sectors_offset" "\xff\xff\xff\xff"
70 { $QEMU_IO -c "read 0 512" "$TEST_IMG"; } 2>&1 | _filter_qemu_io | _filter_testdir
[all …]
/qemu/crypto/
H A Daes.c41 # define GETU32(pt) (((u32)(pt)[0] << 24) ^ ((u32)(pt)[1] << 16) ^ ((u32)(pt)[2] << 8) ^ ((u32)(pt…
42 # define PUTU32(ct, st) { (ct)[0] = (u8)((st) >> 24); (ct)[1] = (u8)((st) >> 16); (ct)[2] = (u8)((s…
45 0x63, 0x7C, 0x77, 0x7B, 0xF2, 0x6B, 0x6F, 0xC5,
46 0x30, 0x01, 0x67, 0x2B, 0xFE, 0xD7, 0xAB, 0x76,
47 0xCA, 0x82, 0xC9, 0x7D, 0xFA, 0x59, 0x47, 0xF0,
48 0xAD, 0xD4, 0xA2, 0xAF, 0x9C, 0xA4, 0x72, 0xC0,
49 0xB7, 0xFD, 0x93, 0x26, 0x36, 0x3F, 0xF7, 0xCC,
50 0x34, 0xA5, 0xE5, 0xF1, 0x71, 0xD8, 0x31, 0x15,
51 0x04, 0xC7, 0x23, 0xC3, 0x18, 0x96, 0x05, 0x9A,
52 0x07, 0x12, 0x80, 0xE2, 0xEB, 0x27, 0xB2, 0x75,
[all …]
/qemu/tests/tcg/i386/
H A Dtest-i386-fbstp.c13 volatile union u ld_invalid_2 = { .s = { 0, 1234 } };
14 volatile union u ld_invalid_3 = { .s = { 0, 0x7fff } };
15 volatile union u ld_invalid_4 = { .s = { (UINT64_C(1) << 63) - 1, 0x7fff } };
19 int ret = 0; in main()
21 memset(out, 0xfe, sizeof out); in main()
22 __asm__ volatile ("fbstp %0" : "=m" (out) : "t" (-0.0L) : "st"); in main()
23 out[9] &= 0x80; in main()
24 if (memcmp(out, "\0\0\0\0\0\0\0\0\0\x80", sizeof out) != 0) { in main()
25 printf("FAIL: fbstp -0\n"); in main()
28 memset(out, 0x12, sizeof out); in main()
[all …]
H A Dtest-i386-vm86.S5 #define GET_OFFSET(x) ((x) - vm86_code_start + 0x100)
9 movb $0x09, %ah
10 int $0x21
12 /* prepare int 0x90 vector */
15 es movw $GET_OFFSET(int90_test), 0x90 * 4
16 es movw %cs, 0x90 * 4 + 2
18 /* launch int 0x90 */
20 int $0x90
24 movb $0x09, %ah
25 int $0x21
[all …]
/qemu/ebpf/
H A Drss.bpf.skeleton.h146 s->maps[0].name = "tap_rss_map_configurations"; in rss_bpf__create_skeleton()
147 s->maps[0].map = &obj->maps.tap_rss_map_configurations; in rss_bpf__create_skeleton()
164 s->progs[0].name = "tun_rss_steering_prog"; in rss_bpf__create_skeleton()
165 s->progs[0].prog = &obj->progs.tun_rss_steering_prog; in rss_bpf__create_skeleton()
166 s->progs[0].link = &obj->links.tun_rss_steering_prog; in rss_bpf__create_skeleton()
171 return 0; in rss_bpf__create_skeleton()
180 \x7f\x45\x4c\x46\x02\x01\x01\0\0\0\0\0\0\0\0\0\x01\0\xf7\0\x01\0\0\0\0\0\0\0\0\ in rss_bpf__elf_bytes()
181 \0\0\0\0\0\0\0\0\0\0\0\xb0\x4b\0\0\0\0\0\0\0\0\0\0\x40\0\0\0\0\0\x40\0\x0d\0\ in rss_bpf__elf_bytes()
182 \x01\0\x7b\x1a\x48\xff\0\0\0\0\xb7\x09\0\0\0\0\0\0\x63\x9a\x54\xff\0\0\0\0\xbf\ in rss_bpf__elf_bytes()
183 \xa7\0\0\0\0\0\0\x07\x07\0\0\x54\xff\xff\xff\x18\x01\0\0\0\0\0\0\0\0\0\0\0\0\0\ in rss_bpf__elf_bytes()
[all …]
/qemu/include/qemu/
H A Duuid.h58 { (time_low) & 0xff, ((time_low) >> 8) & 0xff, ((time_low) >> 16) & 0xff, \
59 ((time_low) >> 24) & 0xff, (time_mid) & 0xff, ((time_mid) >> 8) & 0xff, \
60 (time_hi_and_version) & 0xff, ((time_hi_and_version) >> 8) & 0xff, \
68 { ((time_low) >> 24) & 0xff, ((time_low) >> 16) & 0xff, \
69 ((time_low) >> 8) & 0xff, (time_low) & 0xff, \
70 ((time_mid) >> 8) & 0xff, (time_mid) & 0xff, \
71 ((time_hi_and_version) >> 8) & 0xff, (time_hi_and_version) & 0xff, \
/qemu/tests/tcg/ppc64/
H A Dvector.c8 vector unsigned char vbc_bi_src = { 0xFF, 0xFF, 0, 0xFF, 0xFF, 0xFF, in main()
9 0xFF, 0xFF, 0xFF, 0xFF, 0, 0, 0, in main()
10 0, 0xFF, 0xFF}; in main()
11 vector unsigned short vbc_hi_src = { 0xFFFF, 0, 0, 0xFFFF, in main()
12 0, 0, 0xFFFF, 0xFFFF}; in main()
13 vector unsigned int vbc_wi_src = {0, 0, 0xFFFFFFFF, 0xFFFFFFFF}; in main()
14 vector unsigned long long vbc_di_src = {0xFFFFFFFFFFFFFFFF, 0}; in main()
17 asm("vextractbm %0, %1" : "=r" (result_wi) : "v" (vbc_bi_src)); in main()
19 assert(result_wi == 0b1101111111000011); in main()
21 assert(result_wi == 0b1100001111111011); in main()
[all …]
/qemu/tests/tcg/hexagon/
H A Dpreg_alias.c32 "%0 = C4\n" in preg_alias()
46 "%0 = C5:4\n" in preg_alias_pair()
66 "%0 = p0\n\t" in creg_alias()
78 uint64_t cval_pair = (0xdeadbeefULL << 32) | cval; in creg_alias_pair()
82 "%0 = p0\n\t" in creg_alias_pair()
92 check32(c5, 0xdeadbeef); in creg_alias_pair()
103 uint32_t old_val = 0x0000001c; in test_packet()
111 " if (!p2) %0 = %3\n\t" in test_packet()
114 : "r"(0xffffffff), "r"(0xff00ffff), "r"(0x837ed653) in test_packet()
119 result = 0xffffffff; in test_packet()
[all …]
/qemu/hw/display/
H A Dvga.c74 0x03,
75 0x3d,
76 0x0f,
77 0x3f,
78 0x0e,
79 0x00,
80 0x00,
81 0xff,
85 0x0f, /* 0x00 */
86 0x0f, /* 0x01 */
[all …]
/qemu/target/arm/tcg/
H A Diwmmxt_helper.c32 #define SIMD8_SET(v, n, b) ((v != 0) << ((((b) + 1) * 4) + (n)))
33 #define SIMD16_SET(v, n, h) ((v != 0) << ((((h) + 1) * 8) + (n)))
34 #define SIMD32_SET(v, n, w) ((v != 0) << ((((w) + 1) * 16) + (n)))
35 #define SIMD64_SET(v, n) ((v != 0) << (32 + (n)))
42 #define NBIT8(x) ((x) & 0x80)
43 #define NBIT16(x) ((x) & 0x8000)
44 #define NBIT32(x) ((x) & 0x80000000)
45 #define NBIT64(x) ((x) & 0x8000000000000000ULL)
46 #define ZBIT8(x) (((x) & 0xff) == 0)
47 #define ZBIT16(x) (((x) & 0xffff) == 0)
[all …]
/qemu/tests/qtest/migration/s390x/
H A Da-b-bios.h7 0x7f, 0x45, 0x4c, 0x46, 0x02, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
8 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x16, 0x00, 0x00, 0x00, 0x01,
9 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0xa8, 0x00, 0x00, 0x00, 0x00,
10 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x09, 0x80,
11 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x00, 0x38, 0x00, 0x07, 0x00, 0x40,
12 0x00, 0x0d, 0x00, 0x0c, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x04,
13 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x00,
14 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40,
15 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x88, 0x00, 0x00, 0x00, 0x00,
16 0x00, 0x00, 0x01, 0x88, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08,
[all …]
/qemu/target/i386/tcg/
H A Dint_helper.c37 num = (env->regs[R_EAX] & 0xffff); in helper_divb_AL()
38 den = (t0 & 0xff); in helper_divb_AL()
39 if (den == 0) { in helper_divb_AL()
43 if (q > 0xff) { in helper_divb_AL()
46 q &= 0xff; in helper_divb_AL()
47 r = (num % den) & 0xff; in helper_divb_AL()
48 env->regs[R_EAX] = (env->regs[R_EAX] & ~0xffff) | (r << 8) | q; in helper_divb_AL()
57 if (den == 0) { in helper_idivb_AL()
64 q &= 0xff; in helper_idivb_AL()
65 r = (num % den) & 0xff; in helper_idivb_AL()
[all …]
/qemu/tests/qtest/
H A Dpnv-xive2-test.c111 uint8_t first_group = 0; in reset_pool_threads()
114 for (i = 0; i < SMT; i++) { in reset_pool_threads()
115 uint32_t nvp_idx = 0x100 + i; in reset_pool_threads()
117 set_tima32(qts, i, TM_QW2_HV_POOL + TM_WORD0, 0x000000ff); in reset_pool_threads()
118 set_tima32(qts, i, TM_QW2_HV_POOL + TM_WORD1, 0); in reset_pool_threads()
125 uint8_t first_group = 0; in reset_hw_threads()
126 uint32_t w1 = 0x000000ff; in reset_hw_threads()
131 set_nvg(qts, 0x80, 0x02); in reset_hw_threads()
132 set_nvg(qts, 0x82, 0x02); in reset_hw_threads()
133 set_nvg(qts, 0x81, 0); in reset_hw_threads()
[all …]
/qemu/hw/cxl/
H A Dcxl-component-utils.c20 case 1: return 0x0; in cxl_decoder_count_enc()
21 case 2: return 0x1; in cxl_decoder_count_enc()
22 case 4: return 0x2; in cxl_decoder_count_enc()
23 case 6: return 0x3; in cxl_decoder_count_enc()
24 case 8: return 0x4; in cxl_decoder_count_enc()
25 case 10: return 0x5; in cxl_decoder_count_enc()
27 case 12: return 0x6; in cxl_decoder_count_enc()
28 case 14: return 0x7; in cxl_decoder_count_enc()
29 case 16: return 0x8; in cxl_decoder_count_enc()
30 case 20: return 0x9; in cxl_decoder_count_enc()
[all …]
/qemu/include/hw/loongarch/
H A Dboot.h12 #define EFI_SYSTEM_TABLE_SIGNATURE 0x5453595320494249
17 #define FW_VERSION 0x1
18 #define FW_PATCHLEVEL 0x0
25 (a) & 0xff, ((a) >> 8) & 0xff, ((a) >> 16) & 0xff, ((a) >> 24) & 0xff, \
26 (b) & 0xff, ((b) >> 8) & 0xff, \
27 (c) & 0xff, ((c) >> 8) & 0xff, d } }
30 EFI_GUID(0x800f683f, 0xd08b, 0x423a, 0xa2, 0x93, \
31 0x96, 0x5c, 0x3c, 0x6f, 0xe2, 0xb4)
34 EFI_GUID(0x5568e427, 0x68fc, 0x4f3d, 0xac, 0x74, \
35 0xca, 0x55, 0x52, 0x31, 0xcc, 0x68)
[all …]
/qemu/tests/qtest/migration/aarch64/
H A Da-b-kernel.h7 0x00, 0x10, 0x38, 0xd5, 0x00, 0xf8, 0x7f, 0x92, 0x00, 0x10, 0x18, 0xd5,
8 0xdf, 0x3f, 0x03, 0xd5, 0x00, 0x02, 0xa8, 0xd2, 0x01, 0xc8, 0xa8, 0xd2,
9 0x23, 0x08, 0x80, 0x52, 0x02, 0x20, 0xa1, 0xd2, 0x43, 0x00, 0x00, 0x39,
10 0x03, 0x00, 0x80, 0x52, 0xe4, 0x03, 0x00, 0xaa, 0x83, 0x00, 0x00, 0x39,
11 0x84, 0x04, 0x40, 0x91, 0x9f, 0x00, 0x01, 0xeb, 0xad, 0xff, 0xff, 0x54,
12 0x05, 0x00, 0x80, 0x52, 0xe4, 0x03, 0x00, 0xaa, 0x83, 0x00, 0x40, 0x39,
13 0x63, 0x04, 0x00, 0x11, 0x83, 0x00, 0x00, 0x39, 0x24, 0x7e, 0x0b, 0xd5,
14 0x84, 0x04, 0x40, 0x91, 0x9f, 0x00, 0x01, 0xeb, 0x4b, 0xff, 0xff, 0x54,
15 0xa5, 0x04, 0x00, 0x11, 0xa5, 0x10, 0x00, 0x12, 0xbf, 0x00, 0x00, 0x71,
16 0xa1, 0xfe, 0xff, 0x54, 0x43, 0x08, 0x80, 0x52, 0x43, 0x00, 0x00, 0x39,
[all …]
/qemu/hw/gpio/
H A Dpl061.c11 * + sysbus MMIO region 0: the device registers
13 * + unnamed GPIO inputs 0..7: inputs to connect to the emulated GPIO lines
14 * + unnamed GPIO outputs 0..7: the emulated GPIO lines, considered as
19 * This should be an 8-bit value, where bit 0 is 1 if GPIO line 0 should
20 * be pulled high, bit 1 configures line 1, and so on. The default is 0xff,
23 * configured as inputs should be pulled down to logical 0 (ie whether in
25 * This should be an 8-bit value, where bit 0 is 1 if GPIO line 0 should
26 * be pulled low, bit 1 configures line 1, and so on. The default is 0x0.
28 * is 0 in both, then the line is considered to be floating, and it will
44 { 0x00, 0x00, 0x00, 0x00, 0x61, 0x10, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 };
[all …]

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