Lines Matching +full:0 +full:xff
74 0x03,
75 0x3d,
76 0x0f,
77 0x3f,
78 0x0e,
79 0x00,
80 0x00,
81 0xff,
85 0x0f, /* 0x00 */
86 0x0f, /* 0x01 */
87 0x0f, /* 0x02 */
88 0x1f, /* 0x03 */
89 0x03, /* 0x04 */
90 0x7b, /* 0x05 */
91 0x0f, /* 0x06 */
92 0x0f, /* 0x07 */
93 0xff, /* 0x08 */
94 0x00, /* 0x09 */
95 0x00, /* 0x0a */
96 0x00, /* 0x0b */
97 0x00, /* 0x0c */
98 0x00, /* 0x0d */
99 0x00, /* 0x0e */
100 0x00, /* 0x0f */
103 #define GET_PLANE(data, p) ((cpu_to_le32(data) >> ((p) * 8)) & 0xff)
106 const_le32(0x00000000),
107 const_le32(0x000000ff),
108 const_le32(0x0000ff00),
109 const_le32(0x0000ffff),
110 const_le32(0x00ff0000),
111 const_le32(0x00ff00ff),
112 const_le32(0x00ffff00),
113 const_le32(0x00ffffff),
114 const_le32(0xff000000),
115 const_le32(0xff0000ff),
116 const_le32(0xff00ff00),
117 const_le32(0xff00ffff),
118 const_le32(0xffff0000),
119 const_le32(0xffff00ff),
120 const_le32(0xffffff00),
121 const_le32(0xffffffff),
152 s->plane_updated = 0xf; in vga_update_memory_access()
156 offset = 0; in vga_update_memory_access()
158 case 0: in vga_update_memory_access()
159 base = 0xa0000; in vga_update_memory_access()
160 size = 0x20000; in vga_update_memory_access()
163 base = 0xa0000; in vga_update_memory_access()
164 size = 0x10000; in vga_update_memory_access()
168 base = 0xb0000; in vga_update_memory_access()
169 size = 0x8000; in vga_update_memory_access()
173 base = 0xb8000; in vga_update_memory_access()
174 size = 0x8000; in vga_update_memory_access()
203 #if 0 in vga_precise_update_retrace_info()
215 hretr_end_char = s->cr[VGA_CRTC_H_SYNC_END] & 0x1f; in vga_precise_update_retrace_info()
223 vretr_end_line = s->cr[VGA_CRTC_V_SYNC_END] & 0xf; in vga_precise_update_retrace_info()
247 #if 0 in vga_precise_update_retrace_info()
321 return (addr >= 0x3b0 && addr <= 0x3bf); in vga_ioport_invalid()
324 return (addr >= 0x3d0 && addr <= 0x3df); in vga_ioport_invalid()
334 val = 0xff; in vga_ioport_read()
338 if (s->ar_flip_flop == 0) { in vga_ioport_read()
341 val = 0; in vga_ioport_read()
345 index = s->ar_index & 0x1f; in vga_ioport_read()
349 val = 0; in vga_ioport_read()
361 printf("vga: read SR%x = 0x%02x\n", s->sr_index, val); in vga_ioport_read()
373 s->dac_sub_index = 0; in vga_ioport_read()
389 printf("vga: read GR%x = 0x%02x\n", s->gr_index, val); in vga_ioport_read()
400 printf("vga: read CR%x = 0x%02x\n", s->cr_index, val); in vga_ioport_read()
407 s->ar_flip_flop = 0; in vga_ioport_read()
410 val = 0x00; in vga_ioport_read()
431 if (s->ar_flip_flop == 0) { in vga_ioport_write()
432 val &= 0x3f; in vga_ioport_write()
435 index = s->ar_index & 0x1f; in vga_ioport_write()
438 s->ar[index] = val & 0x3f; in vga_ioport_write()
441 s->ar[index] = val & ~0x10; in vga_ioport_write()
447 s->ar[index] = val & ~0xc0; in vga_ioport_write()
450 s->ar[index] = val & ~0xf0; in vga_ioport_write()
453 s->ar[index] = val & ~0xf0; in vga_ioport_write()
462 s->msr = val & ~0x10; in vga_ioport_write()
470 printf("vga: write SR%x = 0x%02x\n", s->sr_index, val); in vga_ioport_write()
480 s->dac_sub_index = 0; in vga_ioport_write()
485 s->dac_sub_index = 0; in vga_ioport_write()
486 s->dac_state = 0; in vga_ioport_write()
492 s->dac_sub_index = 0; in vga_ioport_write()
497 s->gr_index = val & 0x0f; in vga_ioport_write()
501 printf("vga: write GR%x = 0x%02x\n", s->gr_index, val); in vga_ioport_write()
514 printf("vga: write CR%x = 0x%02x\n", s->cr_index, val); in vga_ioport_write()
521 s->cr[VGA_CRTC_OVERFLOW] = (s->cr[VGA_CRTC_OVERFLOW] & ~0x10) | in vga_ioport_write()
522 (val & 0x10); in vga_ioport_write()
544 s->fcr = val & 0x10; in vga_ioport_write()
585 if (r[VBE_DISPI_INDEX_XRES] == 0) { in vbe_fixup_regs()
602 if (r[VBE_DISPI_INDEX_YRES] == 0) { in vbe_fixup_regs()
622 r[VBE_DISPI_INDEX_Y_OFFSET] = 0; in vbe_fixup_regs()
625 r[VBE_DISPI_INDEX_X_OFFSET] = 0; in vbe_fixup_regs()
626 offset = 0; in vbe_fixup_regs()
647 s->gr[VGA_GFX_MISC] = (s->gr[VGA_GFX_MISC] & ~0x0c) | 0x04 | in vbe_update_vgaregs()
657 s->cr[VGA_CRTC_OVERFLOW] = (s->cr[VGA_CRTC_OVERFLOW] & ~0x42) | in vbe_update_vgaregs()
658 ((h >> 7) & 0x02) | ((h >> 3) & 0x40); in vbe_update_vgaregs()
660 s->cr[VGA_CRTC_LINE_COMPARE] = 0xff; in vbe_update_vgaregs()
661 s->cr[VGA_CRTC_OVERFLOW] |= 0x10; in vbe_update_vgaregs()
662 s->cr[VGA_CRTC_MAX_SCAN] |= 0x40; in vbe_update_vgaregs()
665 shift_control = 0; in vbe_update_vgaregs()
674 s->gr[VGA_GFX_MODE] = (s->gr[VGA_GFX_MODE] & ~0x60) | in vbe_update_vgaregs()
676 s->cr[VGA_CRTC_MAX_SCAN] &= ~0x9f; /* no double scan */ in vbe_update_vgaregs()
713 val = 0; in vbe_ioport_read_data()
762 s->vbe_regs[VBE_DISPI_INDEX_VIRT_WIDTH] = 0; in vbe_ioport_write_data()
763 s->vbe_regs[VBE_DISPI_INDEX_X_OFFSET] = 0; in vbe_ioport_write_data()
764 s->vbe_regs[VBE_DISPI_INDEX_Y_OFFSET] = 0; in vbe_ioport_write_data()
771 memset(s->vram_ptr, 0, in vbe_ioport_write_data()
775 s->bank_offset = 0; in vbe_ioport_write_data()
777 s->dac_8bit = (val & VBE_DISPI_8BIT_DAC) > 0; in vbe_ioport_write_data()
787 /* called for accesses between 0xa0000 and 0xc0000 */
795 addr &= 0x1ffff; in vga_mem_readb()
797 case 0: in vga_mem_readb()
800 if (addr >= 0x10000) in vga_mem_readb()
801 return 0xff; in vga_mem_readb()
805 addr -= 0x10000; in vga_mem_readb()
806 if (addr >= 0x8000) in vga_mem_readb()
807 return 0xff; in vga_mem_readb()
811 addr -= 0x18000; in vga_mem_readb()
812 if (addr >= 0x8000) in vga_mem_readb()
813 return 0xff; in vga_mem_readb()
837 (s->cr[VGA_CRTC_MODE] & VGA_CR17_WORD_BYTE) == 0) { in vga_mem_readb()
842 return 0xff; in vga_mem_readb()
853 if (!(s->gr[VGA_GFX_MODE] & 0x08)) { in vga_mem_readb()
854 /* read mode 0 */ in vga_mem_readb()
862 ret = (~ret) & 0xff; in vga_mem_readb()
868 /* called for accesses between 0xa0000 and 0xc0000 */
873 int plane = 0; in vga_mem_writeb()
876 printf("vga: [0x" HWADDR_FMT_plx "] = 0x%02x\n", addr, val); in vga_mem_writeb()
880 addr &= 0x1ffff; in vga_mem_writeb()
882 case 0: in vga_mem_writeb()
885 if (addr >= 0x10000) in vga_mem_writeb()
890 addr -= 0x10000; in vga_mem_writeb()
891 if (addr >= 0x8000) in vga_mem_writeb()
896 addr -= 0x18000; in vga_mem_writeb()
897 if (addr >= 0x8000) in vga_mem_writeb()
909 if ((sr(s, VGA_SEQ_MEMORY_MODE) & VGA_SR04_SEQ_MODE) == 0) { in vga_mem_writeb()
910 mask &= (addr & 1) ? 0x0a : 0x05; in vga_mem_writeb()
920 * 0,1,2,3, 16,17,18,19, 32,33,34,35, etc. Text modes use word in vga_mem_writeb()
921 * mode and, on real hardware, would fetch bytes 0,1, 8,9, etc. in vga_mem_writeb()
930 * word mode bit. The odd/even read bit is 0 when reading font data, in vga_mem_writeb()
935 } else if ((sr(s, VGA_SEQ_MEMORY_MODE) & VGA_SR04_SEQ_MODE) == 0 && in vga_mem_writeb()
936 (s->cr[VGA_CRTC_MODE] & VGA_CR17_WORD_BYTE) == 0) { in vga_mem_writeb()
948 printf("vga: chain4: [0x" HWADDR_FMT_plx "]\n", addr); in vga_mem_writeb()
960 case 0: in vga_mem_writeb()
963 val = ((val >> b) | (val << (8 - b))) & 0xff; in vga_mem_writeb()
977 val = mask16[val & 0x0f]; in vga_mem_writeb()
993 case 0: in vga_mem_writeb()
1024 printf("vga: latch: [0x" HWADDR_FMT_plx "] mask=0x%08x val=0x%08x\n", in vga_mem_writeb()
1042 full_update = 0; in update_palette16()
1044 for(i = 0; i < 16; i++) { in update_palette16()
1046 if (s->ar[VGA_ATC_MODE] & 0x80) { in update_palette16()
1047 v = ((s->ar[VGA_ATC_COLOR_PAGE] & 0xf) << 4) | (v & 0xf); in update_palette16()
1049 v = ((s->ar[VGA_ATC_COLOR_PAGE] & 0xc) << 4) | (v & 0x3f); in update_palette16()
1069 full_update = 0; in update_palette256()
1071 v = 0; in update_palette256()
1072 for(i = 0; i < 256; i++) { in update_palette256()
1110 ((s->cr[VGA_CRTC_OVERFLOW] & 0x10) << 4) | in vga_get_params()
1111 ((s->cr[VGA_CRTC_MAX_SCAN] & 0x40) << 3); in vga_get_params()
1114 params->hpel_split = s->ar[VGA_ATC_MODE] & 0x20; in vga_get_params()
1124 full_update = 0; in update_basic_params()
1137 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1138 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1139 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1140 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1141 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1142 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1143 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1144 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1145 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1146 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1147 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1148 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1149 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1150 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1151 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1152 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1161 cheight = (s->cr[VGA_CRTC_MAX_SCAN] & 0x1f) + 1; in vga_get_text_resolution()
1166 if (sr(s, VGA_SEQ_CLOCK_MODE) & 0x08) { in vga_get_text_resolution()
1175 ((s->cr[VGA_CRTC_OVERFLOW] & 0x02) << 7) | in vga_get_text_resolution()
1176 ((s->cr[VGA_CRTC_OVERFLOW] & 0x40) << 3); in vga_get_text_resolution()
1210 if (offset != s->font_offsets[0]) { in vga_draw_text()
1211 s->font_offsets[0] = offset; in vga_draw_text()
1214 font_base[0] = s->vram_ptr + offset; in vga_draw_text()
1225 s->plane_updated = 0; in vga_draw_text()
1249 s->last_depth = 0; in vga_draw_text()
1264 s->full_update_gfx = 0; in vga_draw_text()
1292 line = 0; in vga_draw_text()
1294 for(cy = 0; cy < height; cy++) { in vga_draw_text()
1299 for(cx = 0; cx < width; cx++) { in vga_draw_text()
1312 cattr = ch_attr & 0xff; in vga_draw_text()
1314 ch = ch_attr & 0xff; in vga_draw_text()
1320 fgcol = palette[cattr & 0x0f]; in vga_draw_text()
1328 dup9 = 0; in vga_draw_text()
1329 if (ch >= 0xb0 && ch <= 0xdf && in vga_draw_text()
1330 (s->ar[VGA_ATC_MODE] & 0x04)) { in vga_draw_text()
1337 !(s->cr[VGA_CRTC_CURSOR_START] & 0x20) && in vga_draw_text()
1341 line_start = s->cr[VGA_CRTC_CURSOR_START] & 0x1f; in vga_draw_text()
1342 line_last = s->cr[VGA_CRTC_CURSOR_END] & 0x1f; in vga_draw_text()
1374 offset = 0; in vga_draw_text()
1422 ret = 0; in vga_get_bpp()
1437 ((s->cr[VGA_CRTC_OVERFLOW] & 0x02) << 7) | in vga_get_resolution()
1438 ((s->cr[VGA_CRTC_OVERFLOW] & 0x40) << 3); in vga_get_resolution()
1453 s->invalidated_y_table[y >> 5] |= 1 << (y & 0x1f); in vga_invalidate_scanlines()
1462 return s->invalidated_y_table[y >> 5] & (1 << (y & 0x1f)); in vga_scanline_invalidated()
1504 /* bits 5-6: 0 = 16-color mode, 1 = 4-color mode, 2 = 256-color mode. */ in vga_draw_graphic()
1508 multi_scan = (((s->cr[VGA_CRTC_MAX_SCAN] & 0x1f) + 1) << double_scan) in vga_draw_graphic()
1523 if (shift_control == 0) { in vga_draw_graphic()
1546 case 0: in vga_draw_graphic()
1576 hpel = bits <= 8 ? s->params.hpel & 7 : 0; in vga_draw_graphic()
1595 region_start = 0; in vga_draw_graphic()
1601 region_start = 0; in vga_draw_graphic()
1662 #if 0 in vga_draw_graphic()
1663 …printf("w=%d h=%d v=%d line_offset=%d cr[0x09]=0x%02x cr[0x17]=0x%02x linecmp=%d sr[0x01]=0x%02x\n… in vga_draw_graphic()
1671 y1 = 0; in vga_draw_graphic()
1679 for(y = 0; y < height; y++) { in vga_draw_graphic()
1688 addr = (addr & ~0x8000) | ((y1 & 2) << 14); in vga_draw_graphic()
1700 0, page1); in vga_draw_graphic()
1708 if (y_start < 0) in vga_draw_graphic()
1720 if (y_start >= 0) { in vga_draw_graphic()
1722 dpy_gfx_update(s->con, 0, y_start, in vga_draw_graphic()
1741 addr1 = 0; in vga_draw_graphic()
1745 if (y_start >= 0) { in vga_draw_graphic()
1747 dpy_gfx_update(s->con, 0, y_start, in vga_draw_graphic()
1751 memset(s->invalidated_y_table, 0, sizeof(s->invalidated_y_table)); in vga_draw_graphic()
1762 if (s->last_scr_width <= 0 || s->last_scr_height <= 0) in vga_draw_blank()
1774 for(i = 0; i < s->last_scr_height; i++) { in vga_draw_blank()
1775 memset(d, 0, w); in vga_draw_blank()
1781 #define GMODE_TEXT 0
1793 if (surface_bits_per_pixel(surface) == 0) { in vga_update_display()
1796 full_update = 0; in vga_update_display()
1797 if (!(s->ar_index & 0x20)) { in vga_update_display()
1833 s->sr_index = 0; in vga_common_reset()
1834 memset(s->sr, '\0', sizeof(s->sr)); in vga_common_reset()
1835 memset(s->sr_vbe, '\0', sizeof(s->sr_vbe)); in vga_common_reset()
1836 s->gr_index = 0; in vga_common_reset()
1837 memset(s->gr, '\0', sizeof(s->gr)); in vga_common_reset()
1838 s->ar_index = 0; in vga_common_reset()
1839 memset(s->ar, '\0', sizeof(s->ar)); in vga_common_reset()
1840 s->ar_flip_flop = 0; in vga_common_reset()
1841 s->cr_index = 0; in vga_common_reset()
1842 memset(s->cr, '\0', sizeof(s->cr)); in vga_common_reset()
1843 s->msr = 0; in vga_common_reset()
1844 s->fcr = 0; in vga_common_reset()
1845 s->st00 = 0; in vga_common_reset()
1846 s->st01 = 0; in vga_common_reset()
1847 s->dac_state = 0; in vga_common_reset()
1848 s->dac_sub_index = 0; in vga_common_reset()
1849 s->dac_read_index = 0; in vga_common_reset()
1850 s->dac_write_index = 0; in vga_common_reset()
1851 memset(s->dac_cache, '\0', sizeof(s->dac_cache)); in vga_common_reset()
1852 s->dac_8bit = 0; in vga_common_reset()
1853 memset(s->palette, '\0', sizeof(s->palette)); in vga_common_reset()
1854 s->bank_offset = 0; in vga_common_reset()
1855 s->vbe_index = 0; in vga_common_reset()
1856 memset(s->vbe_regs, '\0', sizeof(s->vbe_regs)); in vga_common_reset()
1858 s->vbe_start_addr = 0; in vga_common_reset()
1859 s->vbe_line_offset = 0; in vga_common_reset()
1861 memset(s->font_offsets, '\0', sizeof(s->font_offsets)); in vga_common_reset()
1863 s->shift_control = 0; in vga_common_reset()
1864 s->double_scan = 0; in vga_common_reset()
1865 memset(&s->params, '\0', sizeof(s->params)); in vga_common_reset()
1866 s->plane_updated = 0; in vga_common_reset()
1867 s->last_cw = 0; in vga_common_reset()
1868 s->last_ch = 0; in vga_common_reset()
1869 s->last_width = 0; in vga_common_reset()
1870 s->last_height = 0; in vga_common_reset()
1871 s->last_scr_width = 0; in vga_common_reset()
1872 s->last_scr_height = 0; in vga_common_reset()
1873 s->cursor_start = 0; in vga_common_reset()
1874 s->cursor_end = 0; in vga_common_reset()
1875 s->cursor_offset = 0; in vga_common_reset()
1876 memset(s->invalidated_y_table, '\0', sizeof(s->invalidated_y_table)); in vga_common_reset()
1877 memset(s->last_palette, '\0', sizeof(s->last_palette)); in vga_common_reset()
1878 memset(s->last_ch_attr, '\0', sizeof(s->last_ch_attr)); in vga_common_reset()
1883 memset(&s->retrace_info, 0, sizeof (s->retrace_info)); in vga_common_reset()
1897 #define VMEM2CHTYPE(v) ((v & 0xff0007ff) | \
1898 ((v & 0x00000800) << 10) | ((v & 0x00007000) >> 1))
1909 int full_update = 0; in vga_update_text()
1913 if (!(s->ar_index & 0x20)) { in vga_update_text()
1923 s->last_width = 0; in vga_update_text()
1933 cheight = (s->cr[VGA_CRTC_MAX_SCAN] & 0x1f) + 1; in vga_update_text()
1938 if (sr(s, VGA_SEQ_CLOCK_MODE) & 0x08) { in vga_update_text()
1947 ((s->cr[VGA_CRTC_OVERFLOW] & 0x02) << 7) | in vga_update_text()
1948 ((s->cr[VGA_CRTC_OVERFLOW] & 0x40) << 3); in vga_update_text()
1968 s->last_depth = 0; in vga_update_text()
1980 s->full_update_text = 0; in vga_update_text()
1990 cursor_visible = !(s->cr[VGA_CRTC_CURSOR_START] & 0x20); in vga_update_text()
1991 if (cursor_visible && cursor_offset < size && cursor_offset >= 0) in vga_update_text()
2006 for (i = 0; i < size; src ++, dst ++, i ++) in vga_update_text()
2009 dpy_text_update(s->con, 0, 0, width, height); in vga_update_text()
2011 c_max = 0; in vga_update_text()
2013 for (i = 0; i < size; src ++, dst ++, i ++) { in vga_update_text()
2032 dpy_text_update(s->con, 0, i, width, TEXTMODE_Y(c_max) - i + 1); in vga_update_text()
2060 for (dst = chardata, i = 0; i < s->last_width * height; i ++) in vga_update_text()
2066 for (i = 0; i < size; i ++) in vga_update_text()
2070 dpy_text_update(s->con, 0, 0, s->last_width, height); in vga_update_text()
2107 return 0; in vga_common_post_load()
2198 for(i = 0;i < 256; i++) { in vga_common_init()
2199 v = 0; in vga_common_init()
2200 for(j = 0; j < 8; j++) { in vga_common_init()
2205 v = 0; in vga_common_init()
2206 for(j = 0; j < 4; j++) { in vga_common_init()
2211 for(i = 0; i < 16; i++) { in vga_common_init()
2212 v = 0; in vga_common_init()
2213 for(j = 0; j < 4; j++) { in vga_common_init()
2276 { 0x04, 2, 1, .read = vga_ioport_read, .write = vga_ioport_write }, /* 3b4 */
2277 { 0x0a, 1, 1, .read = vga_ioport_read, .write = vga_ioport_write }, /* 3ba */
2278 { 0x10, 16, 1, .read = vga_ioport_read, .write = vga_ioport_write }, /* 3c0 */
2279 { 0x24, 2, 1, .read = vga_ioport_read, .write = vga_ioport_write }, /* 3d4 */
2280 { 0x2a, 1, 1, .read = vga_ioport_read, .write = vga_ioport_write }, /* 3da */
2285 { 0, 1, 2, .read = vbe_ioport_read_index, .write = vbe_ioport_write_index },
2292 { 0, 1, 2, .read = vbe_ioport_read_index, .write = vbe_ioport_write_index },
2307 * not be able to do 16-bit accesses at unaligned addresses (0x1cf) in vga_init_io()
2319 "vga-lowmem", 0x20000); in vga_init_io()
2333 s->bank_offset = 0; in vga_init()
2339 0x000a0000, in vga_init()
2346 portio_list_add(&s->vga_port_list, address_space_io, 0x3b0); in vga_init()
2350 portio_list_add(&s->vbe_port_list, address_space_io, 0x1ce); in vga_init()