| /linux-6.15/drivers/gpu/drm/xe/ |
| D | xe_pm.c | 30 * DOC: Xe Power Management
32 * Xe PM implements the main routines for both system level suspend states and
52 * to perform the transition from D3hot to D3cold. Xe may disallow this
60 * (PC-states), and/or other low level power states. Xe PM component provides
64 * Also, Xe PM provides get and put functions that Xe driver will use to
87 * @xe: The xe device.
92 bool xe_rpm_reclaim_safe(const struct xe_device *xe) in xe_rpm_reclaim_safe() argument
94 return !xe->d3cold.capable; in xe_rpm_reclaim_safe()
97 static void xe_rpm_lockmap_acquire(const struct xe_device *xe) in xe_rpm_lockmap_acquire() argument
99 lock_map_acquire(xe_rpm_reclaim_safe(xe) ? in xe_rpm_lockmap_acquire()
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| D | xe_irq.c | 30 #define IMR(offset) XE_REG(offset + 0x4)
31 #define IIR(offset) XE_REG(offset + 0x8)
32 #define IER(offset) XE_REG(offset + 0xc)
34 static int xe_irq_msix_init(struct xe_device *xe);
35 static void xe_irq_msix_free(struct xe_device *xe);
36 static int xe_irq_msix_request_irqs(struct xe_device *xe);
37 static void xe_irq_msix_synchronize_irq(struct xe_device *xe);
43 if (val == 0) in assert_iir_is_zero()
46 drm_WARN(&mmio->tile->xe->drm, 1, in assert_iir_is_zero()
47 "Interrupt register 0x%x is not zero: 0x%08x\n", in assert_iir_is_zero()
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| D | xe_device.c | 71 struct xe_device *xe = to_xe_device(dev); in xe_file_open() local
89 xef->xe = xe; in xe_file_open()
107 return 0; in xe_file_open()
125 * xe_file_get() - Take a reference to the xe file object
126 * @xef: Pointer to the xe file
128 * Anyone with a pointer to xef must take a reference to the xe file
131 * Return: xe file pointer
140 * xe_file_put() - Drop a reference to the xe file object
141 * @xef: Pointer to the xe file
152 struct xe_device *xe = to_xe_device(dev); in xe_file_close() local
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| D | xe_pat.c | 22 #define _PAT_ATS 0x47fc
24 0x4800, 0x4804, \
25 0x4848, 0x484c)
26 #define _PAT_PTA 0x4820
33 #define XE2_COH_MODE REG_GENMASK(1, 0)
38 #define XELPG_PAT_0_WB REG_FIELD_PREP(XELPG_L4_POLICY_MASK, 0)
39 #define XELPG_INDEX_COH_MODE_MASK REG_GENMASK(1, 0)
42 #define XELPG_0_COH_NON REG_FIELD_PREP(XELPG_INDEX_COH_MODE_MASK, 0)
47 #define XELP_MEM_TYPE_MASK REG_GENMASK(1, 0)
51 #define XELP_PAT_UC REG_FIELD_PREP(XELP_MEM_TYPE_MASK, 0)
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| D | xe_pci_sriov.c | 27 static int pf_provision_vfs(struct xe_device *xe, unsigned int num_vfs) in pf_provision_vfs() argument
31 int result = 0, err; in pf_provision_vfs()
33 for_each_gt(gt, xe, id) { in pf_provision_vfs()
43 static void pf_unprovision_vfs(struct xe_device *xe, unsigned int num_vfs) in pf_unprovision_vfs() argument
49 for_each_gt(gt, xe, id) in pf_unprovision_vfs()
54 static void pf_reset_vfs(struct xe_device *xe, unsigned int num_vfs) in pf_reset_vfs() argument
60 for_each_gt(gt, xe, id) in pf_reset_vfs()
65 static struct pci_dev *xe_pci_pf_get_vf_dev(struct xe_device *xe, unsigned int vf_id) in xe_pci_pf_get_vf_dev() argument
67 struct pci_dev *pdev = to_pci_dev(xe->drm.dev); in xe_pci_pf_get_vf_dev()
69 xe_assert(xe, IS_SRIOV_PF(xe)); in xe_pci_pf_get_vf_dev()
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| D | xe_ttm_stolen_mgr.c | 49 * @xe: xe device
55 bool xe_ttm_stolen_cpu_access_needs_ggtt(struct xe_device *xe) in xe_ttm_stolen_cpu_access_needs_ggtt() argument
57 return GRAPHICS_VERx100(xe) < 1270 && !IS_DGFX(xe); in xe_ttm_stolen_cpu_access_needs_ggtt()
60 static u32 get_wopcm_size(struct xe_device *xe) in get_wopcm_size() argument
65 val = xe_mmio_read64_2x32(xe_root_tile_mmio(xe), STOLEN_RESERVED); in get_wopcm_size()
69 case 0x5 ... 0x6: in get_wopcm_size()
72 case 0x0 ... 0x3: in get_wopcm_size()
77 wopcm_size = 0; in get_wopcm_size()
83 static s64 detect_bar2_dgfx(struct xe_device *xe, struct xe_ttm_stolen_mgr *mgr) in detect_bar2_dgfx() argument
85 struct xe_tile *tile = xe_device_get_root_tile(xe); in detect_bar2_dgfx()
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| D | xe_debugfs.c | 40 struct xe_device *xe = node_to_xe(m->private); in info() local
45 xe_pm_runtime_get(xe); in info()
47 drm_printf(&p, "graphics_verx100 %d\n", xe->info.graphics_verx100); in info()
48 drm_printf(&p, "media_verx100 %d\n", xe->info.media_verx100); in info()
50 xe_step_name(xe->info.step.graphics), in info()
51 xe_step_name(xe->info.step.media), in info()
52 xe_step_name(xe->info.step.basedie)); in info()
53 drm_printf(&p, "is_dgfx %s\n", str_yes_no(xe->info.is_dgfx)); in info()
54 drm_printf(&p, "platform %d\n", xe->info.platform); in info()
56 xe->info.subplatform > XE_SUBPLATFORM_NONE ? xe->info.subplatform : 0); in info()
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| D | xe_pxp_submit.c | 37 struct xe_device *xe = pxp->xe; in allocate_vcs_execution_resources() local
44 hwe = xe_gt_hw_engine(gt, XE_ENGINE_CLASS_VIDEO_DECODE, 0, true); in allocate_vcs_execution_resources()
48 q = xe_exec_queue_create(xe, NULL, BIT(hwe->logical_instance), 1, hwe, in allocate_vcs_execution_resources()
49 EXEC_QUEUE_FLAG_KERNEL | EXEC_QUEUE_FLAG_PERMANENT, 0); in allocate_vcs_execution_resources()
57 bo = xe_bo_create_pin_map(xe, tile, NULL, SZ_4K, ttm_bo_type_kernel, in allocate_vcs_execution_resources()
67 return 0; in allocate_vcs_execution_resources()
89 struct xe_device *xe = tile_to_xe(tile); in allocate_gsc_client_resources() local
96 int err = 0; in allocate_gsc_client_resources()
98 hwe = xe_gt_hw_engine(gt, XE_ENGINE_CLASS_OTHER, 0, true); in allocate_gsc_client_resources()
101 xe_assert(xe, hwe); in allocate_gsc_client_resources()
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| D | xe_pci.c | 217 static const u16 adls_rpls_ids[] = { INTEL_RPLS_IDS(NOP), 0 };
233 static const u16 adlp_rplu_ids[] = { INTEL_RPLU_IDS(NOP), 0 };
273 static const u16 dg2_g10_ids[] = { INTEL_DG2_G10_IDS(NOP), INTEL_ATS_M150_IDS(NOP), 0 };
274 static const u16 dg2_g11_ids[] = { INTEL_DG2_G11_IDS(NOP), INTEL_ATS_M75_IDS(NOP), 0 };
275 static const u16 dg2_g12_ids[] = { INTEL_DG2_G12_IDS(NOP), 0 };
391 if (negative && strcmp(devices, "!*") == 0) in device_id_in_list()
393 if (!negative && strcmp(devices, "*") == 0) in device_id_in_list()
403 if (negative && tok[0] == '!') in device_id_in_list()
405 else if ((negative && tok[0] != '!') || in device_id_in_list()
406 (!negative && tok[0] == '!')) in device_id_in_list()
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| D | xe_device.h | 34 static inline struct xe_device *xe_device_const_cast(const struct xe_device *xe) in xe_device_const_cast() argument
36 return (struct xe_device *)xe; in xe_device_const_cast()
46 int xe_device_probe_early(struct xe_device *xe);
47 int xe_device_probe(struct xe_device *xe);
48 void xe_device_remove(struct xe_device *xe);
49 void xe_device_shutdown(struct xe_device *xe);
51 void xe_device_wmb(struct xe_device *xe);
58 static inline struct xe_tile *xe_device_get_root_tile(struct xe_device *xe) in xe_device_get_root_tile() argument
60 return &xe->tiles[0]; in xe_device_get_root_tile()
68 gt_id = 0; in xe_tile_get_gt()
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| D | xe_sriov.c | 39 static bool test_is_vf(struct xe_device *xe) in test_is_vf() argument
41 u32 value = xe_mmio_read32(xe_root_tile_mmio(xe), VF_CAP_REG); in test_is_vf()
48 * @xe: the &xe_device to probe mode on
57 void xe_sriov_probe_early(struct xe_device *xe) in xe_sriov_probe_early() argument
59 struct pci_dev *pdev = to_pci_dev(xe->drm.dev); in xe_sriov_probe_early()
61 bool has_sriov = xe->info.has_sriov; in xe_sriov_probe_early()
64 if (test_is_vf(xe)) in xe_sriov_probe_early()
66 else if (xe_sriov_pf_readiness(xe)) in xe_sriov_probe_early()
76 drm_info(&xe->drm, "Support for SR-IOV is not available\n"); in xe_sriov_probe_early()
77 pci_sriov_set_totalvfs(pdev, 0); in xe_sriov_probe_early()
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| D | xe_vram.c | 27 _resize_bar(struct xe_device *xe, int resno, resource_size_t size) in _resize_bar() argument
29 struct pci_dev *pdev = to_pci_dev(xe->drm.dev); in _resize_bar()
38 …drm_info(&xe->drm, "Failed to resize BAR%d to %dM (%pe). Consider enabling 'Resizable BAR' support… in _resize_bar()
43 drm_info(&xe->drm, "BAR%d resized to %dM\n", resno, 1 << bar_size); in _resize_bar()
50 static void resize_vram_bar(struct xe_device *xe) in resize_vram_bar() argument
53 struct pci_dev *pdev = to_pci_dev(xe->drm.dev); in resize_vram_bar()
78 drm_info(&xe->drm, in resize_vram_bar()
79 "Requested size: %lluMiB is not supported by rebar sizes: 0x%x. Leaving default: %lluMiB\n", in resize_vram_bar()
96 drm_info(&xe->drm, "Attempting to resize bar from %lluMiB -> %lluMiB\n", in resize_vram_bar()
104 (u64)root_res->start > 0x100000000ul) in resize_vram_bar()
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| D | xe_heci_gsc.c | 17 #define GSC_BAR_LENGTH 0x00000FFC
19 #define DG1_GSC_HECI2_BASE 0x259000
20 #define PVC_GSC_HECI2_BASE 0x285000
21 #define DG2_GSC_HECI2_BASE 0x374000
104 if (heci_gsc->irq >= 0) in xe_heci_gsc_fini()
110 static int heci_gsc_irq_setup(struct xe_device *xe) in heci_gsc_irq_setup() argument
112 struct xe_heci_gsc *heci_gsc = &xe->heci_gsc; in heci_gsc_irq_setup()
115 heci_gsc->irq = irq_alloc_desc(0); in heci_gsc_irq_setup()
116 if (heci_gsc->irq < 0) { in heci_gsc_irq_setup()
117 drm_err(&xe->drm, "gsc irq error %d\n", heci_gsc->irq); in heci_gsc_irq_setup()
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| D | xe_survivability_mode.c | 23 * DOC: Xe Boot Survivability
60 static void populate_survivability_info(struct xe_device *xe) in populate_survivability_info() argument
62 struct xe_survivability *survivability = &xe->survivability; in populate_survivability_info()
65 u32 id = 0, reg_value; in populate_survivability_info()
69 mmio = xe_root_tile_mmio(xe); in populate_survivability_info()
86 for (index = 0; id && reg_value; index++, reg_value = info[id].value, in populate_survivability_info()
96 struct xe_device *xe = pdev_to_xe_device(pdev); in log_survivability_info() local
97 struct xe_survivability *survivability = &xe->survivability; in log_survivability_info()
103 for (id = 0; id < MAX_SCRATCH_MMIO; id++) { in log_survivability_info()
105 dev_info(&pdev->dev, "%s: 0x%x - 0x%x\n", info[id].name, in log_survivability_info()
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| D | xe_bo_evict.c | 16 * @xe: xe device
27 int xe_bo_evict_all(struct xe_device *xe) in xe_bo_evict_all() argument
29 struct ttm_device *bdev = &xe->ttm; in xe_bo_evict_all()
50 if (mem_type == XE_PL_TT && (IS_DGFX(xe) || !xe_device_has_flat_ccs(xe))) in xe_bo_evict_all()
62 spin_lock(&xe->pinned.lock); in xe_bo_evict_all()
64 bo = list_first_entry_or_null(&xe->pinned.external_vram, in xe_bo_evict_all()
70 spin_unlock(&xe->pinned.lock); in xe_bo_evict_all()
77 spin_lock(&xe->pinned.lock); in xe_bo_evict_all()
79 &xe->pinned.external_vram); in xe_bo_evict_all()
80 spin_unlock(&xe->pinned.lock); in xe_bo_evict_all()
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| D | xe_query.c | 48 static size_t calc_hw_engine_info_size(struct xe_device *xe) in calc_hw_engine_info_size() argument
54 int i = 0; in calc_hw_engine_info_size()
56 for_each_gt(gt, xe, gt_id) in calc_hw_engine_info_size()
95 u32 upper, lower, old_upper, loop = 0; in hwe_read_timestamp()
113 query_engine_cycles(struct xe_device *xe, in query_engine_cycles() argument
125 if (IS_SRIOV_VF(xe)) in query_engine_cycles()
128 if (query->size == 0) { in query_engine_cycles()
130 return 0; in query_engine_cycles()
131 } else if (XE_IOCTL_DBG(xe, query->size != size)) { in query_engine_cycles()
147 gt = xe_device_get_gt(xe, eci->gt_id); in query_engine_cycles()
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| D | xe_bo.c | 47 .fpfn = 0,
48 .lpfn = 0,
50 .flags = 0,
60 .fpfn = 0,
61 .lpfn = 0,
66 .fpfn = 0,
67 .lpfn = 0,
83 static bool resource_is_stolen_vram(struct xe_device *xe, struct ttm_resource *res) in resource_is_stolen_vram() argument
85 return res->mem_type == XE_PL_STOLEN && IS_DGFX(xe); in resource_is_stolen_vram()
155 mem_type_to_migrate(struct xe_device *xe, u32 mem_type) in mem_type_to_migrate() argument
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| D | xe_rtp.c | 27 static bool has_samedia(const struct xe_device *xe) in has_samedia() argument
29 return xe->info.media_verx100 >= 1300; in has_samedia()
32 static bool rule_matches(const struct xe_device *xe, in rule_matches() argument
39 unsigned int i, rcount = 0; in rule_matches()
42 for (r = rules, i = 0; i < n_rules; r = &rules[++i]) { in rule_matches()
52 match = xe->info.platform == r->platform; in rule_matches()
55 match = xe->info.platform == r->platform && in rule_matches()
56 xe->info.subplatform == r->subplatform; in rule_matches()
59 match = xe->info.graphics_verx100 == r->ver_start && in rule_matches()
60 (!has_samedia(xe) || !xe_gt_is_media_type(gt)); in rule_matches()
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| D | xe_pmu.c | 18 * DOC: Xe PMU (Performance Monitoring Unit)
26 * $ ls /sys/bus/event_source/devices/xe_0000_00_02.0/events/
27 * $ ls /sys/bus/event_source/devices/xe_0000_00_02.0/format/
39 * For gt specific events (gt-*) gt parameter must be passed. All other parameters will be 0.
54 #define XE_PMU_EVENT_ID_MASK GENMASK_ULL(11, 0)
76 #define XE_PMU_EVENT_GT_C6_RESIDENCY 0x01
77 #define XE_PMU_EVENT_ENGINE_ACTIVE_TICKS 0x02
78 #define XE_PMU_EVENT_ENGINE_TOTAL_TICKS 0x03
82 struct xe_device *xe = container_of(event->pmu, typeof(*xe), pmu.base); in event_to_gt() local
85 return xe_device_get_gt(xe, gt); in event_to_gt()
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| D | xe_exec_queue.c | 31 XE_EXEC_QUEUE_JOB_TIMEOUT = 0,
37 static int exec_queue_user_extensions(struct xe_device *xe, struct xe_exec_queue *q,
53 static struct xe_exec_queue *__xe_exec_queue_alloc(struct xe_device *xe, in __xe_exec_queue_alloc() argument
105 err = exec_queue_user_extensions(xe, q, extensions, 0); in __xe_exec_queue_alloc()
119 u32 flags = 0; in __xe_exec_queue_init()
141 for (i = 0; i < q->width; ++i) { in __xe_exec_queue_init()
156 return 0; in __xe_exec_queue_init()
162 for (i = i - 1; i >= 0; --i) in __xe_exec_queue_init()
167 struct xe_exec_queue *xe_exec_queue_create(struct xe_device *xe, struct xe_vm *vm, in xe_exec_queue_create() argument
176 …xe_assert(xe, !vm || (!!(vm->flags & XE_VM_FLAG_GSC) == !!(hwe->engine_id == XE_HW_ENGINE_GSCCS0))… in xe_exec_queue_create()
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| /linux-6.15/drivers/gpu/drm/xe/compat-i915-headers/ |
| D | i915_drv.h | 9 * "Adaptation header" to allow i915 display to also build for xe driver.
10 * TODO: refactor i915 and xe so this can cease to exist
25 #define IS_PLATFORM(xe, x) ((xe)->info.platform == x) argument
27 #define IS_I830(dev_priv) (dev_priv && 0)
28 #define IS_I845G(dev_priv) (dev_priv && 0)
29 #define IS_I85X(dev_priv) (dev_priv && 0)
30 #define IS_I865G(dev_priv) (dev_priv && 0)
31 #define IS_I915G(dev_priv) (dev_priv && 0)
32 #define IS_I915GM(dev_priv) (dev_priv && 0)
33 #define IS_I945G(dev_priv) (dev_priv && 0)
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| /linux-6.15/drivers/gpu/drm/xe/display/ |
| D | xe_display.c | 37 /* Xe device functions */
39 static bool has_display(struct xe_device *xe) in has_display() argument
41 return HAS_DISPLAY(&xe->display); in has_display()
54 return 0; in xe_display_driver_probe_defer()
79 static void unset_display_features(struct xe_device *xe) in unset_display_features() argument
81 xe->drm.driver_features &= ~(DRIVER_MODESET | DRIVER_ATOMIC); in unset_display_features()
86 struct xe_device *xe = to_xe_device(dev); in display_destroy() local
88 destroy_workqueue(xe->display.hotplug.dp_wq); in display_destroy()
93 * @xe: XE device instance
98 * to the rest of xe and return it to be xe->display.
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| D | xe_display.h | 18 int xe_display_create(struct xe_device *xe);
20 int xe_display_probe(struct xe_device *xe);
22 int xe_display_init_early(struct xe_device *xe);
23 int xe_display_init(struct xe_device *xe);
25 void xe_display_register(struct xe_device *xe);
26 void xe_display_unregister(struct xe_device *xe);
28 void xe_display_irq_handler(struct xe_device *xe, u32 master_ctl);
29 void xe_display_irq_enable(struct xe_device *xe, u32 gu_misc_iir);
30 void xe_display_irq_reset(struct xe_device *xe);
31 void xe_display_irq_postinstall(struct xe_device *xe, struct xe_gt *gt);
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| /linux-6.15/drivers/gpu/drm/xe/tests/ |
| D | xe_migrate.c | 15 static bool sanity_fence_failed(struct xe_device *xe, struct dma_fence *fence, in sanity_fence_failed() argument
29 if (ret <= 0) { in sanity_fence_failed()
37 static int run_sanity_job(struct xe_migrate *m, struct xe_device *xe, in run_sanity_job() argument
41 u64 batch_base = xe_migrate_batch_base(m, xe->info.has_usm); in run_sanity_job()
57 if (sanity_fence_failed(xe, fence, str, test)) in run_sanity_job()
62 return 0; in run_sanity_job()
70 } } while (0)
75 struct xe_device *xe = tile_to_xe(m->tile); in test_copy() local
76 u64 retval, expected = 0; in test_copy()
82 struct xe_bo *remote = xe_bo_create_locked(xe, m->tile, NULL, in test_copy()
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| /linux-6.15/Documentation/ABI/testing/ |
| D | sysfs-driver-intel-xe-hwmon | 1 What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/power1_max
4 Contact: intel-xe@lists.freedesktop.org
9 exceeds this limit. A read value of 0 means that the PL1
10 power limit is disabled, writing 0 disables the
11 limit. Writing values > 0 and <= TDP will enable the power limit.
13 Only supported for particular Intel Xe graphics platforms.
15 What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/power1_rated_max
18 Contact: intel-xe@lists.freedesktop.org
21 Only supported for particular Intel Xe graphics platforms.
24 What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/energy1_input
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