17 #define GSC_BAR_LENGTH  0x00000FFC
19 #define DG1_GSC_HECI2_BASE			0x259000
20 #define PVC_GSC_HECI2_BASE			0x285000
21 #define DG2_GSC_HECI2_BASE			0x374000
104 	if (heci_gsc->irq >= 0)  in xe_heci_gsc_fini()
110 static int heci_gsc_irq_setup(struct xe_device *xe)  in heci_gsc_irq_setup()  argument
112 	struct xe_heci_gsc *heci_gsc = &xe->heci_gsc;  in heci_gsc_irq_setup()
115 	heci_gsc->irq = irq_alloc_desc(0);  in heci_gsc_irq_setup()
116 	if (heci_gsc->irq < 0) {  in heci_gsc_irq_setup()
117 		drm_err(&xe->drm, "gsc irq error %d\n", heci_gsc->irq);  in heci_gsc_irq_setup()
122 	if (ret < 0)  in heci_gsc_irq_setup()
123 		drm_err(&xe->drm, "gsc irq init failed %d\n", ret);  in heci_gsc_irq_setup()
128 static int heci_gsc_add_device(struct xe_device *xe, const struct heci_gsc_def *def)  in heci_gsc_add_device()  argument
130 	struct xe_heci_gsc *heci_gsc = &xe->heci_gsc;  in heci_gsc_add_device()
131 	struct pci_dev *pdev = to_pci_dev(xe->drm.dev);  in heci_gsc_add_device()
140 	adev->bar.parent = &pdev->resource[0];  in heci_gsc_add_device()
141 	adev->bar.start = def->bar + pdev->resource[0].start;  in heci_gsc_add_device()
155 	if (ret < 0) {  in heci_gsc_add_device()
156 		drm_err(&xe->drm, "gsc aux init failed %d\n", ret);  in heci_gsc_add_device()
163 	if (ret < 0) {  in heci_gsc_add_device()
164 		drm_err(&xe->drm, "gsc aux add failed %d\n", ret);  in heci_gsc_add_device()
173 int xe_heci_gsc_init(struct xe_device *xe)  in xe_heci_gsc_init()  argument
175 	struct xe_heci_gsc *heci_gsc = &xe->heci_gsc;  in xe_heci_gsc_init()
179 	if (!xe->info.has_heci_gscfi && !xe->info.has_heci_cscfi)  in xe_heci_gsc_init()
180 		return 0;  in xe_heci_gsc_init()
184 	if (xe->info.platform == XE_BATTLEMAGE) {  in xe_heci_gsc_init()
186 	} else if (xe->info.platform == XE_PVC) {  in xe_heci_gsc_init()
188 	} else if (xe->info.platform == XE_DG2) {  in xe_heci_gsc_init()
190 	} else if (xe->info.platform == XE_DG1) {  in xe_heci_gsc_init()
195 		drm_warn(&xe->drm, "HECI is not implemented!\n");  in xe_heci_gsc_init()
196 		return 0;  in xe_heci_gsc_init()
199 	ret = devm_add_action_or_reset(xe->drm.dev, xe_heci_gsc_fini, heci_gsc);  in xe_heci_gsc_init()
203 	if (!def->use_polling && !xe_survivability_mode_is_enabled(xe)) {  in xe_heci_gsc_init()
204 		ret = heci_gsc_irq_setup(xe);  in xe_heci_gsc_init()
209 	return heci_gsc_add_device(xe, def);  in xe_heci_gsc_init()
212 void xe_heci_gsc_irq_handler(struct xe_device *xe, u32 iir)  in xe_heci_gsc_irq_handler()  argument
216 	if ((iir & GSC_IRQ_INTF(1)) == 0)  in xe_heci_gsc_irq_handler()
219 	if (!xe->info.has_heci_gscfi) {  in xe_heci_gsc_irq_handler()
220 		drm_warn_once(&xe->drm, "GSC irq: not supported");  in xe_heci_gsc_irq_handler()
224 	if (xe->heci_gsc.irq < 0)  in xe_heci_gsc_irq_handler()
227 	ret = generic_handle_irq(xe->heci_gsc.irq);  in xe_heci_gsc_irq_handler()
229 		drm_err_ratelimited(&xe->drm, "error handling GSC irq: %d\n", ret);  in xe_heci_gsc_irq_handler()
232 void xe_heci_csc_irq_handler(struct xe_device *xe, u32 iir)  in xe_heci_csc_irq_handler()  argument
236 	if ((iir & CSC_IRQ_INTF(1)) == 0)  in xe_heci_csc_irq_handler()
239 	if (!xe->info.has_heci_cscfi) {  in xe_heci_csc_irq_handler()
240 		drm_warn_once(&xe->drm, "CSC irq: not supported");  in xe_heci_csc_irq_handler()
244 	if (xe->heci_gsc.irq < 0)  in xe_heci_csc_irq_handler()
247 	ret = generic_handle_irq(xe->heci_gsc.irq);  in xe_heci_csc_irq_handler()
249 		drm_err_ratelimited(&xe->drm, "error handling GSC irq: %d\n", ret);  in xe_heci_csc_irq_handler()