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/linux-5.10/drivers/media/dvb-frontends/
Dstv6111.c46 { 2572, 0 },
82 { 1548, 0 },
118 { 4870, 0x3000 },
119 { 4850, 0x3C00 },
120 { 4800, 0x4500 },
121 { 4750, 0x4800 },
122 { 4700, 0x4B00 },
123 { 4650, 0x4D00 },
124 { 4600, 0x4F00 },
125 { 4550, 0x5100 },
[all …]
/linux-5.10/Documentation/devicetree/bindings/phy/
Dqcom,qmp-usb3-dp-phy.yaml81 "^usb3-phy@[0-9a-f]+$":
109 const: 0
112 const: 0
121 "^dp-phy@[0-9a-f]+$":
139 const: 0
167 reg = <0x088e9000 0x18c>,
168 <0x088e8000 0x10>,
169 <0x088ea000 0x40>;
174 ranges = <0x0 0x088e9000 0x2000>;
190 reg = <0x200 0x128>,
[all …]
/linux-5.10/arch/m68k/apollo/
Dconfig.c48 int unknown = 0; in apollo_parse_bootinfo()
122 while (!(sio01.srb_csrb & 0x4)) in dn_serial_console_write()
126 while (!(sio01.srb_csrb & 0x4)) in dn_serial_console_write()
136 while (!(sio01.srb_csrb & 0x4)) in dn_serial_print()
140 while (!(sio01.srb_csrb & 0x4)) in dn_serial_print()
153 mach_max_dma_address = 0xffffffff; in config_apollo()
161 cpuctrl=0xaa00; in config_apollo()
164 for(i=0;i<0x400;i++) in config_apollo()
165 addr_xlat_map[i]=0; in config_apollo()
186 *(volatile unsigned char *)(apollo_timer + 3) = 0x01; in dn_sched_init()
[all …]
/linux-5.10/drivers/gpu/drm/msm/adreno/
Da6xx_gpu_state.h13 0x8000, 0x8006, 0x8010, 0x8092, 0x8094, 0x809d, 0x80a0, 0x80a6,
14 0x80af, 0x80f1, 0x8100, 0x8107, 0x8109, 0x8109, 0x8110, 0x8110,
15 0x8400, 0x840b,
19 0x8800, 0x8806, 0x8809, 0x8811, 0x8818, 0x881e, 0x8820, 0x8865,
20 0x8870, 0x8879, 0x8880, 0x8889, 0x8890, 0x8891, 0x8898, 0x8898,
21 0x88c0, 0x88c1, 0x88d0, 0x88e3, 0x8900, 0x890c, 0x890f, 0x891a,
22 0x8c00, 0x8c01, 0x8c08, 0x8c10, 0x8c17, 0x8c1f, 0x8c26, 0x8c33,
26 0x88f0, 0x88f3, 0x890d, 0x890e, 0x8927, 0x8928, 0x8bf0, 0x8bf1,
27 0x8c02, 0x8c07, 0x8c11, 0x8c16, 0x8c20, 0x8c25,
31 0x9200, 0x9216, 0x9218, 0x9236, 0x9300, 0x9306,
[all …]
/linux-5.10/drivers/clk/imx/
Dclk-imx7d.c32 { .val = 0, .div = 4, },
40 { .val = 0, .div = 1, },
406 hws[IMX7D_CLK_DUMMY] = imx_clk_hw_fixed("dummy", 0); in imx7d_clocks_init()
411 base = of_iomap(np, 0); in imx7d_clocks_init()
415 …hws[IMX7D_PLL_ARM_MAIN_SRC] = imx_clk_hw_mux("pll_arm_main_src", base + 0x60, 14, 2, pll_bypass_s… in imx7d_clocks_init()
416 …hws[IMX7D_PLL_DRAM_MAIN_SRC] = imx_clk_hw_mux("pll_dram_main_src", base + 0x70, 14, 2, pll_bypass_… in imx7d_clocks_init()
417 …hws[IMX7D_PLL_SYS_MAIN_SRC] = imx_clk_hw_mux("pll_sys_main_src", base + 0xb0, 14, 2, pll_bypass_s… in imx7d_clocks_init()
418 …hws[IMX7D_PLL_ENET_MAIN_SRC] = imx_clk_hw_mux("pll_enet_main_src", base + 0xe0, 14, 2, pll_bypass_… in imx7d_clocks_init()
419 …hws[IMX7D_PLL_AUDIO_MAIN_SRC] = imx_clk_hw_mux("pll_audio_main_src", base + 0xf0, 14, 2, pll_bypas… in imx7d_clocks_init()
420 …hws[IMX7D_PLL_VIDEO_MAIN_SRC] = imx_clk_hw_mux("pll_video_main_src", base + 0x130, 14, 2, pll_bypa… in imx7d_clocks_init()
[all …]
Dclk-imx8mn.c310 hws[IMX8MN_CLK_DUMMY] = imx_clk_hw_fixed("dummy", 0); in imx8mn_clocks_probe()
319 base = of_iomap(np, 0); in imx8mn_clocks_probe()
326 …hws[IMX8MN_AUDIO_PLL1_REF_SEL] = imx_clk_hw_mux("audio_pll1_ref_sel", base + 0x0, 0, 2, pll_ref_se… in imx8mn_clocks_probe()
327 …hws[IMX8MN_AUDIO_PLL2_REF_SEL] = imx_clk_hw_mux("audio_pll2_ref_sel", base + 0x14, 0, 2, pll_ref_s… in imx8mn_clocks_probe()
328 …hws[IMX8MN_VIDEO_PLL1_REF_SEL] = imx_clk_hw_mux("video_pll1_ref_sel", base + 0x28, 0, 2, pll_ref_s… in imx8mn_clocks_probe()
329 …hws[IMX8MN_DRAM_PLL_REF_SEL] = imx_clk_hw_mux("dram_pll_ref_sel", base + 0x50, 0, 2, pll_ref_sels,… in imx8mn_clocks_probe()
330 …hws[IMX8MN_GPU_PLL_REF_SEL] = imx_clk_hw_mux("gpu_pll_ref_sel", base + 0x64, 0, 2, pll_ref_sels, A… in imx8mn_clocks_probe()
331 …hws[IMX8MN_VPU_PLL_REF_SEL] = imx_clk_hw_mux("vpu_pll_ref_sel", base + 0x74, 0, 2, pll_ref_sels, A… in imx8mn_clocks_probe()
332 …hws[IMX8MN_ARM_PLL_REF_SEL] = imx_clk_hw_mux("arm_pll_ref_sel", base + 0x84, 0, 2, pll_ref_sels, A… in imx8mn_clocks_probe()
333 …hws[IMX8MN_SYS_PLL3_REF_SEL] = imx_clk_hw_mux("sys_pll3_ref_sel", base + 0x114, 0, 2, pll_ref_sels… in imx8mn_clocks_probe()
[all …]
Dclk-imx8mm.c317 hws[IMX8MM_CLK_DUMMY] = imx_clk_hw_fixed("dummy", 0); in imx8mm_clocks_probe()
326 base = of_iomap(np, 0); in imx8mm_clocks_probe()
331 …hws[IMX8MM_AUDIO_PLL1_REF_SEL] = imx_clk_hw_mux("audio_pll1_ref_sel", base + 0x0, 0, 2, pll_ref_se… in imx8mm_clocks_probe()
332 …hws[IMX8MM_AUDIO_PLL2_REF_SEL] = imx_clk_hw_mux("audio_pll2_ref_sel", base + 0x14, 0, 2, pll_ref_s… in imx8mm_clocks_probe()
333 …hws[IMX8MM_VIDEO_PLL1_REF_SEL] = imx_clk_hw_mux("video_pll1_ref_sel", base + 0x28, 0, 2, pll_ref_s… in imx8mm_clocks_probe()
334 …hws[IMX8MM_DRAM_PLL_REF_SEL] = imx_clk_hw_mux("dram_pll_ref_sel", base + 0x50, 0, 2, pll_ref_sels,… in imx8mm_clocks_probe()
335 …hws[IMX8MM_GPU_PLL_REF_SEL] = imx_clk_hw_mux("gpu_pll_ref_sel", base + 0x64, 0, 2, pll_ref_sels, A… in imx8mm_clocks_probe()
336 …hws[IMX8MM_VPU_PLL_REF_SEL] = imx_clk_hw_mux("vpu_pll_ref_sel", base + 0x74, 0, 2, pll_ref_sels, A… in imx8mm_clocks_probe()
337 …hws[IMX8MM_ARM_PLL_REF_SEL] = imx_clk_hw_mux("arm_pll_ref_sel", base + 0x84, 0, 2, pll_ref_sels, A… in imx8mm_clocks_probe()
338 …hws[IMX8MM_SYS_PLL3_REF_SEL] = imx_clk_hw_mux("sys_pll3_ref_sel", base + 0x114, 0, 2, pll_ref_sels… in imx8mm_clocks_probe()
[all …]
Dclk-imx8mp.c433 anatop_base = of_iomap(np, 0); in imx8mp_clocks_probe()
439 ccm_base = devm_platform_ioremap_resource(pdev, 0); in imx8mp_clocks_probe()
454 hws[IMX8MP_CLK_DUMMY] = imx_clk_hw_fixed("dummy", 0); in imx8mp_clocks_probe()
462 …hws[IMX8MP_AUDIO_PLL1_REF_SEL] = imx_clk_hw_mux("audio_pll1_ref_sel", anatop_base + 0x0, 0, 2, pll… in imx8mp_clocks_probe()
463 …hws[IMX8MP_AUDIO_PLL2_REF_SEL] = imx_clk_hw_mux("audio_pll2_ref_sel", anatop_base + 0x14, 0, 2, pl… in imx8mp_clocks_probe()
464 …hws[IMX8MP_VIDEO_PLL1_REF_SEL] = imx_clk_hw_mux("video_pll1_ref_sel", anatop_base + 0x28, 0, 2, pl… in imx8mp_clocks_probe()
465 …hws[IMX8MP_DRAM_PLL_REF_SEL] = imx_clk_hw_mux("dram_pll_ref_sel", anatop_base + 0x50, 0, 2, pll_re… in imx8mp_clocks_probe()
466 …hws[IMX8MP_GPU_PLL_REF_SEL] = imx_clk_hw_mux("gpu_pll_ref_sel", anatop_base + 0x64, 0, 2, pll_ref_… in imx8mp_clocks_probe()
467 …hws[IMX8MP_VPU_PLL_REF_SEL] = imx_clk_hw_mux("vpu_pll_ref_sel", anatop_base + 0x74, 0, 2, pll_ref_… in imx8mp_clocks_probe()
468 …hws[IMX8MP_ARM_PLL_REF_SEL] = imx_clk_hw_mux("arm_pll_ref_sel", anatop_base + 0x84, 0, 2, pll_ref_… in imx8mp_clocks_probe()
[all …]
Dclk-imx8mq.c299 hws[IMX8MQ_CLK_DUMMY] = imx_clk_hw_fixed("dummy", 0); in imx8mq_clocks_probe()
309 base = of_iomap(np, 0); in imx8mq_clocks_probe()
314 …hws[IMX8MQ_ARM_PLL_REF_SEL] = imx_clk_hw_mux("arm_pll_ref_sel", base + 0x28, 16, 2, pll_ref_sels, … in imx8mq_clocks_probe()
315 …hws[IMX8MQ_GPU_PLL_REF_SEL] = imx_clk_hw_mux("gpu_pll_ref_sel", base + 0x18, 16, 2, pll_ref_sels, … in imx8mq_clocks_probe()
316 …hws[IMX8MQ_VPU_PLL_REF_SEL] = imx_clk_hw_mux("vpu_pll_ref_sel", base + 0x20, 16, 2, pll_ref_sels, … in imx8mq_clocks_probe()
317 …hws[IMX8MQ_AUDIO_PLL1_REF_SEL] = imx_clk_hw_mux("audio_pll1_ref_sel", base + 0x0, 16, 2, pll_ref_s… in imx8mq_clocks_probe()
318 …hws[IMX8MQ_AUDIO_PLL2_REF_SEL] = imx_clk_hw_mux("audio_pll2_ref_sel", base + 0x8, 16, 2, pll_ref_s… in imx8mq_clocks_probe()
319 …hws[IMX8MQ_VIDEO_PLL1_REF_SEL] = imx_clk_hw_mux("video_pll1_ref_sel", base + 0x10, 16, 2, pll_ref_… in imx8mq_clocks_probe()
320 …hws[IMX8MQ_SYS3_PLL1_REF_SEL] = imx_clk_hw_mux("sys3_pll1_ref_sel", base + 0x48, 0, 2, pll_ref_sel… in imx8mq_clocks_probe()
321 …hws[IMX8MQ_DRAM_PLL1_REF_SEL] = imx_clk_hw_mux("dram_pll1_ref_sel", base + 0x60, 0, 2, pll_ref_sel… in imx8mq_clocks_probe()
[all …]
/linux-5.10/sound/soc/codecs/
Drt1015.c40 { 0x0000, 0x0000 },
41 { 0x0004, 0xa000 },
42 { 0x0006, 0x0003 },
43 { 0x000a, 0x081e },
44 { 0x000c, 0x0006 },
45 { 0x000e, 0x0000 },
46 { 0x0010, 0x0000 },
47 { 0x0012, 0x0000 },
48 { 0x0014, 0x0000 },
49 { 0x0016, 0x0000 },
[all …]
Drt5640.c35 #define RT5640_DEVICE_ID 0x6231
37 #define RT5640_PR_RANGE_BASE (0xff + 1)
38 #define RT5640_PR_SPACING 0x100
40 #define RT5640_PR_BASE (RT5640_PR_RANGE_BASE + (0 * RT5640_PR_SPACING))
44 .range_max = RT5640_PR_BASE + 0xb4,
46 .selector_mask = 0xff,
47 .selector_shift = 0x0,
49 .window_len = 0x1, },
53 {RT5640_PR_BASE + 0x3d, 0x3600},
54 {RT5640_PR_BASE + 0x12, 0x0aa8},
[all …]
/linux-5.10/drivers/input/mouse/
Dtrackpoint.c42 /* Check for success response -- 0xAA00 */ in trackpoint_power_on_reset()
43 if (param[0] != 0xAA || param[1] != 0x00) in trackpoint_power_on_reset()
46 return 0; in trackpoint_power_on_reset()
54 results[0] = loc; in trackpoint_read()
63 return ps2_command(ps2dev, param, MAKE_PS2_CMD(3, 0, TP_COMMAND)); in trackpoint_write()
71 if (loc < 0x20 || loc >= 0x2F) in trackpoint_toggle_bit()
74 return ps2_command(ps2dev, param, MAKE_PS2_CMD(3, 0, TP_COMMAND)); in trackpoint_toggle_bit()
221 return trackpoint_is_attr_available(psmouse, attr) ? attr->mode : 0; in trackpoint_is_attr_visible()
262 } while (0)
267 } while (0)
[all …]
/linux-5.10/drivers/net/ethernet/realtek/
Dr8169_phy_config.c23 int oldpage = phy_select_page(phydev, 0x0007); in r8168d_modify_extpage()
25 __phy_write(phydev, 0x1e, extpage); in r8168d_modify_extpage()
28 phy_restore_page(phydev, oldpage, 0); in r8168d_modify_extpage()
34 int oldpage = phy_select_page(phydev, 0x0005); in r8168d_phy_param()
36 __phy_write(phydev, 0x05, parm); in r8168d_phy_param()
37 __phy_modify(phydev, 0x06, mask, val); in r8168d_phy_param()
39 phy_restore_page(phydev, oldpage, 0); in r8168d_phy_param()
45 int oldpage = phy_select_page(phydev, 0x0a43); in r8168g_phy_param()
47 __phy_write(phydev, 0x13, parm); in r8168g_phy_param()
48 __phy_modify(phydev, 0x14, mask, val); in r8168g_phy_param()
[all …]
/linux-5.10/drivers/scsi/esas2r/
Desas2r.h115 #define ESAS2R_FWCOREDUMP_SZ 0x80000
117 #define ESAS2R_TARG_ID_INV 0xFFFF
120 #define ESAS2R_INT_DIS_MASK 0
135 #define LOBIT(x) ((x) & (0 - (x)))
157 #define ATTO_VENDOR_ID 0x117C
158 #define ATTO_DID_INTEL_IOP348 0x002C
159 #define ATTO_DID_MV_88RC9580 0x0049
160 #define ATTO_DID_MV_88RC9580TS 0x0066
161 #define ATTO_DID_MV_88RC9580TSE 0x0067
162 #define ATTO_DID_MV_88RC9580TL 0x0068
[all …]
/linux-5.10/drivers/net/wireless/broadcom/b43legacy/
Dradio.c30 0x0002, 0x0003, 0x0001, 0x000F,
31 0x0006, 0x0007, 0x0005, 0x000F,
32 0x000A, 0x000B, 0x0009, 0x000F,
33 0x000E, 0x000F, 0x000D, 0x000F,
41 u16 flipped = 0x0000; in flip_4bit()
43 B43legacy_BUG_ON(!((value & ~0x000F) == 0x0000)); in flip_4bit()
45 flipped |= (value & 0x0001) << 3; in flip_4bit()
46 flipped |= (value & 0x0002) << 1; in flip_4bit()
47 flipped |= (value & 0x0004) >> 1; in flip_4bit()
48 flipped |= (value & 0x0008) >> 3; in flip_4bit()
[all …]
/linux-5.10/sound/pci/hda/
Dhda_intel.c73 #define ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR 0x42
74 #define ATI_SB450_HDAUDIO_ENABLE_SNOOP 0x02
77 #define NVIDIA_HDA_TRANSREG_ADDR 0x4e
78 #define NVIDIA_HDA_ENABLE_COHBITS 0x0f
79 #define NVIDIA_HDA_ISTRM_COH 0x4d
80 #define NVIDIA_HDA_OSTRM_COH 0x4c
81 #define NVIDIA_HDA_ENABLE_COHBIT 0x01
84 #define INTEL_HDA_CGCTL 0x48
85 #define INTEL_HDA_CGCTL_MISCBDCGE (0x1 << 6)
86 #define INTEL_SCH_HDA_DEVC 0x78
[all …]
/linux-5.10/drivers/atm/
Diphase.c69 #define swap_byte_order(x) (((x & 0xff) << 8) | ((x & 0xff00) >> 8))
84 |IF_IADBG_ABR | IF_IADBG_EVENT*/ 0;
86 module_param(IA_TX_BUF, int, 0);
87 module_param(IA_TX_BUF_SZ, int, 0);
88 module_param(IA_RX_BUF, int, 0);
89 module_param(IA_RX_BUF_SZ, int, 0);
147 tcq_wr = readl(dev->seg_reg+TCQ_WR_PTR) & 0xffff; in ia_hack_tcq()
153 *(u_short *) (dev->seg_ram + dev->host_tcq_wr) = 0; in ia_hack_tcq()
161 dev->desc_tbl[desc1 -1].timestamp = 0; in ia_hack_tcq()
162 IF_EVENT(printk("ia_hack: return_q skb = 0x%p desc = %d\n", in ia_hack_tcq()
[all …]
/linux-5.10/drivers/media/usb/pvrusb2/
Dpvrusb2-hdw.c53 static struct pvr2_hdw *unit_pointers[PVR_NUM] = {[ 0 ... PVR_NUM-1 ] = NULL};
58 static int tuner[PVR_NUM] = { [0 ... PVR_NUM-1] = -1 };
59 static int tolerance[PVR_NUM] = { [0 ... PVR_NUM-1] = 0 };
60 static int video_std[PVR_NUM] = { [0 ... PVR_NUM-1] = 0 };
64 MODULE_PARM_DESC(ctlchg, "0=optimize ctl change 1=always accept new ctl value");
87 #define PVR2_CTL_WRITE_ENDPOINT 0x01
88 #define PVR2_CTL_READ_ENDPOINT 0x81
90 #define PVR2_GPIO_IN 0x9008
91 #define PVR2_GPIO_OUT 0x900c
92 #define PVR2_GPIO_DIR 0x9020
[all …]