Home
last modified time | relevance | path

Searched +full:0 +full:x15c30000 (Results 1 – 5 of 5) sorted by relevance

/linux/Documentation/devicetree/bindings/net/
H A Drenesas,rzv2h-gbeth.yaml65 - const: rx-queue-0
69 - const: tx-queue-0
99 reg = <0x15c30000 0x10000>;
100 clocks = <&cpg CPG_MOD 0xbd>, <&cpg CPG_MOD 0xbc>,
101 <&ptp_clock>, <&cpg CPG_MOD 0xb8>,
102 <&cpg CPG_MOD 0xb9>, <&cpg CPG_MOD 0xb
[all...]
/linux/arch/arm64/boot/dts/exynos/
H A Dexynos990.dtsi30 #size-cells = <0>;
72 cpu0: cpu@0 {
75 reg = <0x0>;
82 reg = <0x1>;
89 reg = <0x2>;
96 reg = <0x3>;
103 reg = <0x4>;
110 reg = <0x5>;
117 reg = <0x6>;
124 reg = <0x
[all...]
/linux/arch/arm64/boot/dts/renesas/
H A Dr9a09g056.dtsi12 /* RZV2N_Px = Offset address of PFC_P_mn - 0x20 */
13 #define RZV2N_P0 0
36 #clock-cells = <0>;
38 clock-frequency = <0>;
48 cluster0_opp: opp-table-0 {
76 #size-cells = <0>;
78 cpu0: cpu@0 {
80 reg = <0>;
90 reg = <0x100>;
100 reg = <0x20
[all...]
H A Dr9a09g047.dtsi18 #clock-cells = <0>;
20 clock-frequency = <0>;
30 cluster0_opp: opp-table-0 {
58 #size-cells = <0>;
60 cpu0: cpu@0 {
62 reg = <0>;
72 reg = <0x100>;
82 reg = <0x200>;
92 reg = <0x300>;
100 L3_CA55: cache-controller-0 {
[all...]
H A Dr9a09g057.dtsi18 #clock-cells = <0>;
20 clock-frequency = <0>;
30 cluster0_opp: opp-table-0 {
58 #size-cells = <0>;
60 cpu0: cpu@0 {
62 reg = <0>;
72 reg = <0x100>;
82 reg = <0x200>;
92 reg = <0x300>;
100 L3_CA55: cache-controller-0 {
[all...]