Searched +full:0 +full:x0ae97500 (Results 1 – 4 of 4) sorted by relevance
42 "^display-controller@[0-9a-f]+$":49 "^displayport-controller@[0-9a-f]+$":56 "^dsi@[0-9a-f]+$":65 "^phy@[0-9a-f]+$":86 reg = <0x0ae00000 0x1000>;89 interconnects = <&mmss_noc MASTER_MDP 0 &mc_virt SLAVE_EBI1 0>,90 <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_DISPLAY_CFG 0>;106 iommus = <&apps_smmu 0x1c00 0x2>;114 reg = <0x0ae01000 0x8f000>,115 <0x0aeb0000 0x2008>;[all …]
43 "^display-controller@[0-9a-f]+$":51 "^displayport-controller@[0-9a-f]+$":61 "^dsi@[0-9a-f]+$":71 "^phy@[0-9a-f]+$":95 reg = <0x0ae00000 0x1000>;98 interconnects = <&mmss_noc MASTER_MDP 0 &mc_virt SLAVE_EBI1 0>,99 <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_DISPLAY_CFG 0>;116 iommus = <&apps_smmu 0x1c00 0x2>;124 reg = <0x0ae01000 0x8f000>,125 <0x0aeb0000 0x2008>;[all …]
39 #clock-cells = <0>;44 #clock-cells = <0>;48 #clock-cells = <0>;56 #clock-cells = <0>;66 #size-cells = <0>;68 cpu0: cpu@0 {71 reg = <0 0>;72 clocks = <&cpufreq_hw 0>;77 qcom,freq-domain = <&cpufreq_hw 0>;97 reg = <0 0x100>;[all …]
40 #clock-cells = <0>;45 #clock-cells = <0>;50 #clock-cells = <0>;59 #clock-cells = <0>;69 #size-cells = <0>;71 cpu0: cpu@0 {74 reg = <0 0>;76 clocks = <&cpufreq_hw 0>;86 qcom,freq-domain = <&cpufreq_hw 0>;107 reg = <0 0x100>;[all …]