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/linux-6.8/drivers/crypto/intel/qat/qat_common/
Dadf_gen4_ras.h1 /* SPDX-License-Identifier: GPL-2.0-only */
11 #define ADF_GEN4_ERRSOU0_BIT BIT(0)
18 #define ADF_GEN4_ERRSOU1_HIAEUNCERRLOG_CPP0_BIT BIT(0)
19 #define ADF_GEN4_ERRSOU1_HICPPAGENTCMDPARERRLOG_BIT BIT(1)
20 #define ADF_GEN4_ERRSOU1_RIMEM_PARERR_STS_BIT BIT(2)
21 #define ADF_GEN4_ERRSOU1_TIMEM_PARERR_STS_BIT BIT(3)
22 #define ADF_GEN4_ERRSOU1_RIMISCSTS_BIT BIT(4)
51 * BIT(0) - BIT(3) - ri_iosf_pdata_rxq[0:3] parity error
52 * BIT(4) - ri_tlq_phdr parity error
53 * BIT(5) - ri_tlq_pdata parity error
[all …]
/linux-6.8/drivers/net/ethernet/freescale/dpaa2/
Ddpkg.h1 /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
2 /* Copyright 2013-2015 Freescale Semiconductor Inc.
16 * DPKG_NUM_OF_MASKS - Number of masks per key extraction
21 * DPKG_MAX_NUM_OF_EXTRACTS - Number of extractions per key profile
26 * enum dpkg_extract_from_hdr_type - Selecting extraction by header types
38 * enum dpkg_extract_type - Enumeration for selecting extraction type
41 * @DPKG_EXTRACT_FROM_PARSE: Extract from parser-result;
52 * struct dpkg_mask - A structure for defining a single extraction mask
64 #define NH_FLD_ETH_DA BIT(0)
65 #define NH_FLD_ETH_SA BIT(1)
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/linux-6.8/drivers/net/wireless/realtek/rtw89/
Dpci.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
16 #define B_BAC_EQ_SEL BIT(5)
18 #define B_PCIE_BIT_PSAVE BIT(15)
20 #define B_PCIE_BIT_PINOUT_DIS BIT(3)
25 #define B_PCIE_BIT_RD_SEL BIT(2)
35 #define B_AX_CLK_CALIB_EN BIT(12)
36 #define B_AX_CALIB_EN BIT(13)
41 #define B_AX_DBI_RFLAG BIT(17)
42 #define B_AX_DBI_WFLAG BIT(16)
52 #define B_AX_CMAC_EXIT_L1_EN BIT(7)
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/linux-6.8/drivers/net/dsa/microchip/
Dksz9477_reg.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Copyright (C) 2017-2018 Microchip Technology Inc.
14 /* 0 - Operation */
43 #define PME_ENABLE BIT(1)
44 #define PME_POLARITY BIT(0)
48 #define SW_GIGABIT_ABLE BIT(6)
49 #define SW_REDUNDANCY_ABLE BIT(5)
50 #define SW_AVB_ABLE BIT(4)
68 #define SW_QW_ABLE BIT(5)
74 #define LUE_INT BIT(31)
[all …]
Dlan937x_reg.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (C) 2019-2021 Microchip Technology Inc.
10 /* 0 - Operation */
13 #define SW_PHY_REG_BLOCK BIT(7)
14 #define SW_FAST_MODE BIT(3)
15 #define SW_FAST_MODE_OVERRIDE BIT(2)
20 #define LUE_INT BIT(31)
21 #define TRIG_TS_INT BIT(30)
22 #define APB_TIMEOUT_INT BIT(29)
23 #define OVER_TEMP_INT BIT(28)
[all …]
/linux-6.8/drivers/staging/emxx_udc/
Demxx_udc.h1 /* SPDX-License-Identifier: GPL-2.0 */
11 /*---------------------------------------------------------------------------*/
13 /*----------------- Default define */
17 /*------------ Board dependence(Resource) */
24 /*------------ Board dependence(Wait) */
31 /*------------ Controller dependence */
48 #define TEST_FORCE_ENABLE (BIT(18) | BIT(16))
50 #define INT_SEL BIT(10)
51 #define CONSTFS BIT(9)
52 #define SOF_RCV BIT(8)
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/linux-6.8/drivers/platform/x86/intel/pmc/
Dmtl.c1 // SPDX-License-Identifier: GPL-2.0
25 * MTL-M SOC-M IOE-M None
26 * MTL-P SOC-M IOE-P None
27 * MTL-S SOC-S IOE-P PCH-S
31 {"PMC", BIT(0)},
32 {"OPI", BIT(1)},
33 {"SPI", BIT(2)},
34 {"XHCI", BIT(3)},
35 {"SPA", BIT(4)},
36 {"SPB", BIT(5)},
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Dtgl.c1 // SPDX-License-Identifier: GPL-2.0
13 #define ACPI_S0IX_DSM_UUID "57a6512e-3979-4e9d-9708-ff13b2508972"
22 {"PSF9", BIT(0)},
23 {"RES_66", BIT(1)},
24 {"RES_67", BIT(2)},
25 {"RES_68", BIT(3)},
26 {"RES_69", BIT(4)},
27 {"RES_70", BIT(5)},
28 {"TBTLSX", BIT(6)},
43 {"USB2PLL_OFF_STS", BIT(18)},
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Dlnl.c1 // SPDX-License-Identifier: GPL-2.0
74 {"PMC_PGD0_PG_STS", BIT(0)},
75 {"FUSE_OSSE_PGD0_PG_STS", BIT(1)},
76 {"ESPISPI_PGD0_PG_STS", BIT(2)},
77 {"XHCI_PGD0_PG_STS", BIT(3)},
78 {"SPA_PGD0_PG_STS", BIT(4)},
79 {"SPB_PGD0_PG_STS", BIT(5)},
80 {"SPR16B0_PGD0_PG_STS", BIT(6)},
81 {"GBE_PGD0_PG_STS", BIT(7)},
82 {"SBR8B7_PGD0_PG_STS", BIT(8)},
[all …]
Dadl.c1 // SPDX-License-Identifier: GPL-2.0
15 {"SPI/eSPI", BIT(2)},
16 {"XHCI", BIT(3)},
17 {"SPA", BIT(4)},
18 {"SPB", BIT(5)},
19 {"SPC", BIT(6)},
20 {"GBE", BIT(7)},
22 {"SATA", BIT(0)},
23 {"HDA_PGD0", BIT(1)},
24 {"HDA_PGD1", BIT(2)},
[all …]
Darl.c1 // SPDX-License-Identifier: GPL-2.0
63 {"AON2_OFF_STS", BIT(0)},
64 {"AON3_OFF_STS", BIT(1)},
65 {"AON4_OFF_STS", BIT(2)},
66 {"AON5_OFF_STS", BIT(3)},
67 {"AON1_OFF_STS", BIT(4)},
68 {"XTAL_LVM_OFF_STS", BIT(5)},
69 {"AON3_SPL_OFF_STS", BIT(9)},
70 {"DMI3FPW_0_PLL_OFF_STS", BIT(10)},
71 {"DMI3FPW_1_PLL_OFF_STS", BIT(11)},
[all …]
/linux-6.8/drivers/media/platform/sunxi/sun8i-a83t-mipi-csi2/
Dsun8i_a83t_mipi_csi2_reg.h1 /* SPDX-License-Identifier: GPL-2.0+ */
4 * Copyright 2020-2022 Bootlin
14 #define SUN8I_A83T_MIPI_CSI2_CTRL_RESET_N BIT(31)
24 #define SUN8I_A83T_MIPI_CSI2_INT_STA0_ECC_ERR_DBL BIT(28)
25 #define SUN8I_A83T_MIPI_CSI2_INT_STA0_LINE_CKSM_ERR_VC3 BIT(27)
26 #define SUN8I_A83T_MIPI_CSI2_INT_STA0_LINE_CKSM_ERR_VC2 BIT(26)
27 #define SUN8I_A83T_MIPI_CSI2_INT_STA0_LINE_CKSM_ERR_VC1 BIT(25)
28 #define SUN8I_A83T_MIPI_CSI2_INT_STA0_LINE_CKSM_ERR_VC0 BIT(24)
29 #define SUN8I_A83T_MIPI_CSI2_INT_STA0_LINE_SEQ_ERR_DT3 BIT(23)
30 #define SUN8I_A83T_MIPI_CSI2_INT_STA0_LINE_SEQ_ERR_DT2 BIT(22)
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/linux-6.8/drivers/comedi/drivers/
Dni_stc.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Register descriptions for NI DAQ-STC chip
5 * COMEDI - Linux Control and Measurement Device Interface
6 * Copyright (C) 1998-9 David A. Schleef <ds@schleef.org>
11 * DAQ-STC Technical Reference Manual
21 * Registers in the National Instruments DAQ-STC chip
25 #define NISTC_INTA_ACK_G0_GATE BIT(15)
26 #define NISTC_INTA_ACK_G0_TC BIT(14)
27 #define NISTC_INTA_ACK_AI_ERR BIT(13)
28 #define NISTC_INTA_ACK_AI_STOP BIT(12)
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/linux-6.8/drivers/clk/bcm/
Dclk-bcm63xx-gate.c1 // SPDX-License-Identifier: GPL-2.0
3 #include <linux/clk-provider.h>
8 #include <dt-bindings/clock/bcm3368-clock.h>
9 #include <dt-bindings/clock/bcm6318-clock.h>
10 #include <dt-bindings/clock/bcm6328-clock.h>
11 #include <dt-bindings/clock/bcm6358-clock.h>
12 #include <dt-bindings/clock/bcm6362-clock.h>
13 #include <dt-bindings/clock/bcm6368-clock.h>
14 #include <dt-bindings/clock/bcm63268-clock.h>
18 u8 bit; member
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/linux-6.8/drivers/net/ethernet/asix/
Dax88796c_main.h1 /* SPDX-License-Identifier: GPL-2.0-only */
121 #define AX_FC_RX BIT(0)
122 #define AX_FC_TX BIT(1)
123 #define AX_FC_ANEG BIT(2)
126 #define AX_CAP_COMP BIT(0)
153 #define PSR_DEV_READY BIT(7)
155 #define PSR_RESET_CLR BIT(15)
158 #define FER_IPALM BIT(0)
159 #define FER_DCRC BIT(1)
160 #define FER_RH3M BIT(2)
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/linux-6.8/drivers/net/ieee802154/
Dmcr20a.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Driver for NXP MCR20A 802.15.4 Wireless-PAN Networking controller
50 /*------------------ 0x27 */
69 /*----------------------- 0x3A */
118 /*-------------------- 0x29 */
124 /*------------------ 0x2F */
128 /*------------------- 0x33 */
147 /*-------------------- 0x46 */
163 /*------------------- 0x56 */
164 /*------------------- 0x57 */
[all …]
/linux-6.8/drivers/pmdomain/rockchip/
Dpm-domains.c1 // SPDX-License-Identifier: GPL-2.0-only
23 #include <dt-bindings/power/px30-power.h>
24 #include <dt-bindings/power/rockchip,rv1126-power.h>
25 #include <dt-bindings/power/rk3036-power.h>
26 #include <dt-bindings/power/rk3066-power.h>
27 #include <dt-bindings/power/rk3128-power.h>
28 #include <dt-bindings/power/rk3188-power.h>
29 #include <dt-bindings/power/rk3228-power.h>
30 #include <dt-bindings/power/rk3288-power.h>
31 #include <dt-bindings/power/rk3328-power.h>
[all …]
/linux-6.8/include/linux/
Dhwmon.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 hwmon.h - part of lm_sensors, Linux kernel modules for hardware monitoring
50 #define HWMON_C_TEMP_RESET_HISTORY BIT(hwmon_chip_temp_reset_history)
51 #define HWMON_C_IN_RESET_HISTORY BIT(hwmon_chip_in_reset_history)
52 #define HWMON_C_CURR_RESET_HISTORY BIT(hwmon_chip_curr_reset_history)
53 #define HWMON_C_POWER_RESET_HISTORY BIT(hwmon_chip_power_reset_history)
54 #define HWMON_C_REGISTER_TZ BIT(hwmon_chip_register_tz)
55 #define HWMON_C_UPDATE_INTERVAL BIT(hwmon_chip_update_interval)
56 #define HWMON_C_ALARMS BIT(hwmon_chip_alarms)
57 #define HWMON_C_SAMPLES BIT(hwmon_chip_samples)
[all …]
/linux-6.8/drivers/usb/typec/tcpm/
Dfusb302_reg.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright 2016-2017 Google, Inc
5 * Fairchild FUSB302 Type-C Chip Driver
13 #define FUSB_REG_SWITCHES0_CC2_PU_EN BIT(7)
14 #define FUSB_REG_SWITCHES0_CC1_PU_EN BIT(6)
15 #define FUSB_REG_SWITCHES0_VCONN_CC2 BIT(5)
16 #define FUSB_REG_SWITCHES0_VCONN_CC1 BIT(4)
17 #define FUSB_REG_SWITCHES0_MEAS_CC2 BIT(3)
18 #define FUSB_REG_SWITCHES0_MEAS_CC1 BIT(2)
19 #define FUSB_REG_SWITCHES0_CC2_PD_EN BIT(1)
[all …]
/linux-6.8/include/linux/mfd/
Dlp87565.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/
97 #define LP87565_BUCK_CTRL_1_EN BIT(7)
98 #define LP87565_BUCK_CTRL_1_EN_PIN_CTRL BIT(6)
101 #define LP87565_BUCK_CTRL_1_ROOF_FLOOR_EN BIT(3)
102 #define LP87565_BUCK_CTRL_1_RDIS_EN BIT(2)
103 #define LP87565_BUCK_CTRL_1_FPWM BIT(1)
105 #define LP87565_BUCK_CTRL_1_FPWM_MP_0_2 BIT(0)
119 #define LP87565_RESET_SW_RESET BIT(0)
121 #define LP87565_CONFIG_DOUBLE_DELAY BIT(7)
[all …]
Dlp873x.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2016 Texas Instruments Incorporated - https://www.ti.com/
68 #define LP873X_BUCK0_CTRL_1_BUCK0_FPWM BIT(3)
69 #define LP873X_BUCK0_CTRL_1_BUCK0_RDIS_EN BIT(2)
70 #define LP873X_BUCK0_CTRL_1_BUCK0_EN_PIN_CTRL BIT(1)
71 #define LP873X_BUCK0_CTRL_1_BUCK0_EN BIT(0)
76 #define LP873X_BUCK1_CTRL_1_BUCK1_FPWM BIT(3)
77 #define LP873X_BUCK1_CTRL_1_BUCK1_RDIS_EN BIT(2)
78 #define LP873X_BUCK1_CTRL_1_BUCK1_EN_PIN_CTRL BIT(1)
79 #define LP873X_BUCK1_CTRL_1_BUCK1_EN BIT(0)
[all …]
/linux-6.8/include/linux/mfd/abx500/
Dab8500-sysctrl.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) ST-Ericsson SA 2010
83 #define AB8500_TURNONSTATUS_PORNVBAT BIT(0)
84 #define AB8500_TURNONSTATUS_PONKEY1DBF BIT(1)
85 #define AB8500_TURNONSTATUS_PONKEY2DBF BIT(2)
86 #define AB8500_TURNONSTATUS_RTCALARM BIT(3)
87 #define AB8500_TURNONSTATUS_MAINCHDET BIT(4)
88 #define AB8500_TURNONSTATUS_VBUSDET BIT(5)
89 #define AB8500_TURNONSTATUS_USBIDDETECT BIT(6)
91 #define AB8500_RESETSTATUS_RESETN4500NSTATUS BIT(0)
[all …]
/linux-6.8/drivers/gpu/drm/i915/display/
Dintel_display_device.c1 // SPDX-License-Identifier: MIT
184 .__runtime_defaults.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B), \
186 BIT(TRANSCODER_A) | BIT(TRANSCODER_B)
197 .__runtime_defaults.pipe_mask = BIT(PIPE_A), \
198 .__runtime_defaults.cpu_transcoder_mask = BIT(TRANSCODER_A)
203 .__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C), /* DVO A/B/C */
209 .__runtime_defaults.port_mask = BIT(PORT_B) | BIT(PORT_C), /* DVO B/C */
215 .__runtime_defaults.port_mask = BIT(PORT_B) | BIT(PORT_C), /* DVO B/C */
216 .__runtime_defaults.fbc_mask = BIT(INTEL_FBC_A),
222 .__runtime_defaults.port_mask = BIT(PORT_B) | BIT(PORT_C), /* DVO B/C */
[all …]
/linux-6.8/drivers/staging/vt6656/
Dmac.h1 /* SPDX-License-Identifier: GPL-2.0+ */
13 * 07-01-2003 Bryan YC Fan: Re-write codes to support VT3253 spec.
14 * 08-25-2003 Kyle Hsu: Porting MAC functions from sim53.
15 * 09-03-2003 Bryan YC Fan: Add MACvDisableProtectMD & MACvEnableProtectMD
144 #define I2MCFG_BOUNDCTL BIT(7)
145 #define I2MCFG_WAITCTL BIT(5)
146 #define I2MCFG_SCLOECTL BIT(4)
147 #define I2MCFG_WBUSYCTL BIT(3)
148 #define I2MCFG_NORETRY BIT(2)
149 #define I2MCFG_I2MLDSEQ BIT(1)
[all …]
/linux-6.8/drivers/reset/
Dreset-imx7.c1 // SPDX-License-Identifier: GPL-2.0-only
14 #include <linux/reset-controller.h>
16 #include <dt-bindings/reset/imx7-reset.h>
17 #include <dt-bindings/reset/imx8mq-reset.h>
18 #include <dt-bindings/reset/imx8mp-reset.h>
21 unsigned int offset, bit; member
51 const struct imx7_src_signal *signal = &imx7src->signals[id]; in imx7_reset_update()
53 return regmap_update_bits(imx7src->regmap, in imx7_reset_update()
54 signal->offset, signal->bit, value); in imx7_reset_update()
58 [IMX7_RESET_A7_CORE_POR_RESET0] = { SRC_A7RCR0, BIT(0) },
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