Lines Matching +full:- +full:- +full:disable +full:- +full:fdt
2 * QEMU RISC-V VirtIO Board
6 * RISC-V machine with 16550a UART and VirtIO MMIO
23 #include "qemu/error-report.h"
24 #include "qemu/guest-random.h"
29 #include "hw/qdev-properties.h"
30 #include "hw/char/serial-mm.h"
32 #include "hw/core/sysbus-fdt.h"
36 #include "hw/riscv/riscv-iommu-bits.h"
46 #include "hw/platform-bus.h"
55 #include "hw/pci-host/gpex.h"
57 #include "hw/acpi/aml-build.h"
58 #include "qapi/qapi-visit-common.h"
59 #include "hw/virtio/virtio-iommu.h"
60 #include "hw/uefi/var-service-api.h"
127 qdev_prop_set_uint64(dev, "sector-length", VIRT_FLASH_SECTOR_SIZE); in virt_flash_create1()
129 qdev_prop_set_uint8(dev, "device-width", 2); in virt_flash_create1()
130 qdev_prop_set_bit(dev, "big-endian", false); in virt_flash_create1()
146 s->flash[0] = virt_flash_create1(s, "virt.flash0", "pflash0"); in virt_flash_create()
147 s->flash[1] = virt_flash_create1(s, "virt.flash1", "pflash1"); in virt_flash_create()
158 qdev_prop_set_uint32(dev, "num-blocks", size / VIRT_FLASH_SECTOR_SIZE); in virt_flash_map1()
169 hwaddr flashsize = s->memmap[VIRT_FLASH].size / 2; in virt_flash_map()
170 hwaddr flashbase = s->memmap[VIRT_FLASH].base; in virt_flash_map()
172 virt_flash_map1(s->flash[0], flashbase, flashsize, in virt_flash_map()
174 virt_flash_map1(s->flash[1], flashbase + flashsize, flashsize, in virt_flash_map()
178 static void create_pcie_irq_map(RISCVVirtState *s, void *fdt, char *nodename, in create_pcie_irq_map() argument
192 * possible slot) seeing the interrupt-map-mask will allow the table in create_pcie_irq_map()
213 if (s->aia_type != VIRT_AIA_TYPE_NONE) { in create_pcie_irq_map()
224 qemu_fdt_setprop(fdt, nodename, "interrupt-map", full_irq_map, in create_pcie_irq_map()
228 qemu_fdt_setprop_cells(fdt, nodename, "interrupt-map-mask", in create_pcie_irq_map()
239 bool is_32_bit = riscv_is_32bit(&s->soc[0]); in create_fdt_socket_cpus()
241 for (cpu = s->soc[socket].num_harts - 1; cpu >= 0; cpu--) { in create_fdt_socket_cpus()
242 RISCVCPU *cpu_ptr = &s->soc[socket].harts[cpu]; in create_fdt_socket_cpus()
243 int8_t satp_mode_max = cpu_ptr->cfg.max_satp_mode; in create_fdt_socket_cpus()
252 s->soc[socket].hartid_base + cpu); in create_fdt_socket_cpus()
253 qemu_fdt_add_subnode(ms->fdt, cpu_name); in create_fdt_socket_cpus()
255 if (satp_mode_max != -1) { in create_fdt_socket_cpus()
258 qemu_fdt_setprop_string(ms->fdt, cpu_name, "mmu-type", sv_name); in create_fdt_socket_cpus()
261 riscv_isa_write_fdt(cpu_ptr, ms->fdt, cpu_name); in create_fdt_socket_cpus()
263 if (cpu_ptr->cfg.ext_zicbom) { in create_fdt_socket_cpus()
264 qemu_fdt_setprop_cell(ms->fdt, cpu_name, "riscv,cbom-block-size", in create_fdt_socket_cpus()
265 cpu_ptr->cfg.cbom_blocksize); in create_fdt_socket_cpus()
268 if (cpu_ptr->cfg.ext_zicboz) { in create_fdt_socket_cpus()
269 qemu_fdt_setprop_cell(ms->fdt, cpu_name, "riscv,cboz-block-size", in create_fdt_socket_cpus()
270 cpu_ptr->cfg.cboz_blocksize); in create_fdt_socket_cpus()
273 if (cpu_ptr->cfg.ext_zicbop) { in create_fdt_socket_cpus()
274 qemu_fdt_setprop_cell(ms->fdt, cpu_name, "riscv,cbop-block-size", in create_fdt_socket_cpus()
275 cpu_ptr->cfg.cbop_blocksize); in create_fdt_socket_cpus()
278 qemu_fdt_setprop_string(ms->fdt, cpu_name, "compatible", "riscv"); in create_fdt_socket_cpus()
279 qemu_fdt_setprop_string(ms->fdt, cpu_name, "status", "okay"); in create_fdt_socket_cpus()
280 qemu_fdt_setprop_cell(ms->fdt, cpu_name, "reg", in create_fdt_socket_cpus()
281 s->soc[socket].hartid_base + cpu); in create_fdt_socket_cpus()
282 qemu_fdt_setprop_string(ms->fdt, cpu_name, "device_type", "cpu"); in create_fdt_socket_cpus()
284 qemu_fdt_setprop_cell(ms->fdt, cpu_name, "phandle", cpu_phandle); in create_fdt_socket_cpus()
288 intc_name = g_strdup_printf("%s/interrupt-controller", cpu_name); in create_fdt_socket_cpus()
289 qemu_fdt_add_subnode(ms->fdt, intc_name); in create_fdt_socket_cpus()
290 qemu_fdt_setprop_cell(ms->fdt, intc_name, "phandle", in create_fdt_socket_cpus()
292 qemu_fdt_setprop_string(ms->fdt, intc_name, "compatible", in create_fdt_socket_cpus()
293 "riscv,cpu-intc"); in create_fdt_socket_cpus()
294 qemu_fdt_setprop(ms->fdt, intc_name, "interrupt-controller", NULL, 0); in create_fdt_socket_cpus()
295 qemu_fdt_setprop_cell(ms->fdt, intc_name, "#interrupt-cells", 1); in create_fdt_socket_cpus()
298 qemu_fdt_add_subnode(ms->fdt, core_name); in create_fdt_socket_cpus()
299 qemu_fdt_setprop_cell(ms->fdt, core_name, "cpu", cpu_phandle); in create_fdt_socket_cpus()
310 addr = s->memmap[VIRT_DRAM].base + riscv_socket_mem_offset(ms, socket); in create_fdt_socket_memory()
313 qemu_fdt_add_subnode(ms->fdt, mem_name); in create_fdt_socket_memory()
314 qemu_fdt_setprop_cells(ms->fdt, mem_name, "reg", in create_fdt_socket_memory()
316 qemu_fdt_setprop_string(ms->fdt, mem_name, "device_type", "memory"); in create_fdt_socket_memory()
333 clint_cells = g_new0(uint32_t, s->soc[socket].num_harts * 4); in create_fdt_socket_clint()
335 for (cpu = 0; cpu < s->soc[socket].num_harts; cpu++) { in create_fdt_socket_clint()
342 clint_addr = s->memmap[VIRT_CLINT].base + in create_fdt_socket_clint()
343 (s->memmap[VIRT_CLINT].size * socket); in create_fdt_socket_clint()
345 qemu_fdt_add_subnode(ms->fdt, clint_name); in create_fdt_socket_clint()
346 qemu_fdt_setprop_string_array(ms->fdt, clint_name, "compatible", in create_fdt_socket_clint()
349 qemu_fdt_setprop_cells(ms->fdt, clint_name, "reg", in create_fdt_socket_clint()
350 0x0, clint_addr, 0x0, s->memmap[VIRT_CLINT].size); in create_fdt_socket_clint()
351 qemu_fdt_setprop(ms->fdt, clint_name, "interrupts-extended", in create_fdt_socket_clint()
352 clint_cells, s->soc[socket].num_harts * sizeof(uint32_t) * 4); in create_fdt_socket_clint()
369 aclint_mswi_cells = g_new0(uint32_t, s->soc[socket].num_harts * 2); in create_fdt_socket_aclint()
370 aclint_mtimer_cells = g_new0(uint32_t, s->soc[socket].num_harts * 2); in create_fdt_socket_aclint()
371 aclint_sswi_cells = g_new0(uint32_t, s->soc[socket].num_harts * 2); in create_fdt_socket_aclint()
373 for (cpu = 0; cpu < s->soc[socket].num_harts; cpu++) { in create_fdt_socket_aclint()
381 aclint_cells_size = s->soc[socket].num_harts * sizeof(uint32_t) * 2; in create_fdt_socket_aclint()
383 if (s->aia_type != VIRT_AIA_TYPE_APLIC_IMSIC) { in create_fdt_socket_aclint()
384 addr = s->memmap[VIRT_CLINT].base + in create_fdt_socket_aclint()
385 (s->memmap[VIRT_CLINT].size * socket); in create_fdt_socket_aclint()
388 qemu_fdt_add_subnode(ms->fdt, name); in create_fdt_socket_aclint()
389 qemu_fdt_setprop_string(ms->fdt, name, "compatible", in create_fdt_socket_aclint()
390 "riscv,aclint-mswi"); in create_fdt_socket_aclint()
391 qemu_fdt_setprop_cells(ms->fdt, name, "reg", in create_fdt_socket_aclint()
393 qemu_fdt_setprop(ms->fdt, name, "interrupts-extended", in create_fdt_socket_aclint()
395 qemu_fdt_setprop(ms->fdt, name, "interrupt-controller", NULL, 0); in create_fdt_socket_aclint()
396 qemu_fdt_setprop_cell(ms->fdt, name, "#interrupt-cells", 0); in create_fdt_socket_aclint()
401 if (s->aia_type == VIRT_AIA_TYPE_APLIC_IMSIC) { in create_fdt_socket_aclint()
402 addr = s->memmap[VIRT_CLINT].base + in create_fdt_socket_aclint()
406 addr = s->memmap[VIRT_CLINT].base + RISCV_ACLINT_SWI_SIZE + in create_fdt_socket_aclint()
407 (s->memmap[VIRT_CLINT].size * socket); in create_fdt_socket_aclint()
408 size = s->memmap[VIRT_CLINT].size - RISCV_ACLINT_SWI_SIZE; in create_fdt_socket_aclint()
411 qemu_fdt_add_subnode(ms->fdt, name); in create_fdt_socket_aclint()
412 qemu_fdt_setprop_string(ms->fdt, name, "compatible", in create_fdt_socket_aclint()
413 "riscv,aclint-mtimer"); in create_fdt_socket_aclint()
414 qemu_fdt_setprop_cells(ms->fdt, name, "reg", in create_fdt_socket_aclint()
416 0x0, size - RISCV_ACLINT_DEFAULT_MTIME, in create_fdt_socket_aclint()
419 qemu_fdt_setprop(ms->fdt, name, "interrupts-extended", in create_fdt_socket_aclint()
424 if (s->aia_type != VIRT_AIA_TYPE_APLIC_IMSIC) { in create_fdt_socket_aclint()
425 addr = s->memmap[VIRT_ACLINT_SSWI].base + in create_fdt_socket_aclint()
426 (s->memmap[VIRT_ACLINT_SSWI].size * socket); in create_fdt_socket_aclint()
429 qemu_fdt_add_subnode(ms->fdt, name); in create_fdt_socket_aclint()
430 qemu_fdt_setprop_string(ms->fdt, name, "compatible", in create_fdt_socket_aclint()
431 "riscv,aclint-sswi"); in create_fdt_socket_aclint()
432 qemu_fdt_setprop_cells(ms->fdt, name, "reg", in create_fdt_socket_aclint()
433 0x0, addr, 0x0, s->memmap[VIRT_ACLINT_SSWI].size); in create_fdt_socket_aclint()
434 qemu_fdt_setprop(ms->fdt, name, "interrupts-extended", in create_fdt_socket_aclint()
436 qemu_fdt_setprop(ms->fdt, name, "interrupt-controller", NULL, 0); in create_fdt_socket_aclint()
437 qemu_fdt_setprop_cell(ms->fdt, name, "#interrupt-cells", 0); in create_fdt_socket_aclint()
454 "sifive,plic-1.0.0", "riscv,plic0" in create_fdt_socket_plic()
458 plic_addr = s->memmap[VIRT_PLIC].base + in create_fdt_socket_plic()
459 (s->memmap[VIRT_PLIC].size * socket); in create_fdt_socket_plic()
461 qemu_fdt_add_subnode(ms->fdt, plic_name); in create_fdt_socket_plic()
462 qemu_fdt_setprop_cell(ms->fdt, plic_name, in create_fdt_socket_plic()
463 "#interrupt-cells", FDT_PLIC_INT_CELLS); in create_fdt_socket_plic()
464 qemu_fdt_setprop_cell(ms->fdt, plic_name, in create_fdt_socket_plic()
465 "#address-cells", FDT_PLIC_ADDR_CELLS); in create_fdt_socket_plic()
466 qemu_fdt_setprop_string_array(ms->fdt, plic_name, "compatible", in create_fdt_socket_plic()
469 qemu_fdt_setprop(ms->fdt, plic_name, "interrupt-controller", NULL, 0); in create_fdt_socket_plic()
472 plic_cells = g_new0(uint32_t, s->soc[socket].num_harts * 2); in create_fdt_socket_plic()
474 for (cpu = 0; cpu < s->soc[socket].num_harts; cpu++) { in create_fdt_socket_plic()
479 qemu_fdt_setprop(ms->fdt, plic_name, "interrupts-extended", in create_fdt_socket_plic()
481 s->soc[socket].num_harts * sizeof(uint32_t) * 2); in create_fdt_socket_plic()
483 plic_cells = g_new0(uint32_t, s->soc[socket].num_harts * 4); in create_fdt_socket_plic()
485 for (cpu = 0; cpu < s->soc[socket].num_harts; cpu++) { in create_fdt_socket_plic()
492 qemu_fdt_setprop(ms->fdt, plic_name, "interrupts-extended", in create_fdt_socket_plic()
494 s->soc[socket].num_harts * sizeof(uint32_t) * 4); in create_fdt_socket_plic()
497 qemu_fdt_setprop_cells(ms->fdt, plic_name, "reg", in create_fdt_socket_plic()
498 0x0, plic_addr, 0x0, s->memmap[VIRT_PLIC].size); in create_fdt_socket_plic()
499 qemu_fdt_setprop_cell(ms->fdt, plic_name, "riscv,ndev", in create_fdt_socket_plic()
500 VIRT_IRQCHIP_NUM_SOURCES - 1); in create_fdt_socket_plic()
502 qemu_fdt_setprop_cell(ms->fdt, plic_name, "phandle", in create_fdt_socket_plic()
506 platform_bus_add_all_fdt_nodes(ms->fdt, plic_name, in create_fdt_socket_plic()
507 s->memmap[VIRT_PLATFORM_BUS].base, in create_fdt_socket_plic()
508 s->memmap[VIRT_PLATFORM_BUS].size, in create_fdt_socket_plic()
539 imsic_cells = g_new0(uint32_t, ms->smp.cpus * 2); in create_fdt_one_imsic()
542 for (cpu = 0; cpu < ms->smp.cpus; cpu++) { in create_fdt_one_imsic()
551 s->soc[socket].num_harts; in create_fdt_one_imsic()
556 if (imsic_max_hart_per_socket < s->soc[socket].num_harts) { in create_fdt_one_imsic()
557 imsic_max_hart_per_socket = s->soc[socket].num_harts; in create_fdt_one_imsic()
561 imsic_name = g_strdup_printf("/soc/interrupt-controller@%lx", in create_fdt_one_imsic()
563 qemu_fdt_add_subnode(ms->fdt, imsic_name); in create_fdt_one_imsic()
564 qemu_fdt_setprop_string_array(ms->fdt, imsic_name, "compatible", in create_fdt_one_imsic()
568 qemu_fdt_setprop_cell(ms->fdt, imsic_name, "#interrupt-cells", in create_fdt_one_imsic()
570 qemu_fdt_setprop(ms->fdt, imsic_name, "interrupt-controller", NULL, 0); in create_fdt_one_imsic()
571 qemu_fdt_setprop(ms->fdt, imsic_name, "msi-controller", NULL, 0); in create_fdt_one_imsic()
572 qemu_fdt_setprop(ms->fdt, imsic_name, "interrupts-extended", in create_fdt_one_imsic()
573 imsic_cells, ms->smp.cpus * sizeof(uint32_t) * 2); in create_fdt_one_imsic()
574 qemu_fdt_setprop(ms->fdt, imsic_name, "reg", imsic_regs, in create_fdt_one_imsic()
576 qemu_fdt_setprop_cell(ms->fdt, imsic_name, "riscv,num-ids", in create_fdt_one_imsic()
580 qemu_fdt_setprop_cell(ms->fdt, imsic_name, "riscv,guest-index-bits", in create_fdt_one_imsic()
585 qemu_fdt_setprop_cell(ms->fdt, imsic_name, "riscv,hart-index-bits", in create_fdt_one_imsic()
587 qemu_fdt_setprop_cell(ms->fdt, imsic_name, "riscv,group-index-bits", in create_fdt_one_imsic()
589 qemu_fdt_setprop_cell(ms->fdt, imsic_name, "riscv,group-index-shift", in create_fdt_one_imsic()
592 qemu_fdt_setprop_cell(ms->fdt, imsic_name, "phandle", msi_phandle); in create_fdt_one_imsic()
603 /* M-level IMSIC node */ in create_fdt_imsic()
604 create_fdt_one_imsic(s, s->memmap[VIRT_IMSIC_M].base, intc_phandles, in create_fdt_imsic()
608 /* S-level IMSIC node */ in create_fdt_imsic()
609 create_fdt_one_imsic(s, s->memmap[VIRT_IMSIC_S].base, intc_phandles, in create_fdt_imsic()
611 imsic_num_bits(s->aia_guests + 1)); in create_fdt_imsic()
618 return g_strdup_printf("/soc/interrupt-controller@%lx", aplic_addr); in fdt_get_aplic_nodename()
642 qemu_fdt_add_subnode(ms->fdt, aplic_name); in create_fdt_one_aplic()
643 qemu_fdt_setprop_string_array(ms->fdt, aplic_name, "compatible", in create_fdt_one_aplic()
646 qemu_fdt_setprop_cell(ms->fdt, aplic_name, "#address-cells", in create_fdt_one_aplic()
648 qemu_fdt_setprop_cell(ms->fdt, aplic_name, in create_fdt_one_aplic()
649 "#interrupt-cells", FDT_APLIC_INT_CELLS); in create_fdt_one_aplic()
650 qemu_fdt_setprop(ms->fdt, aplic_name, "interrupt-controller", NULL, 0); in create_fdt_one_aplic()
652 if (s->aia_type == VIRT_AIA_TYPE_APLIC) { in create_fdt_one_aplic()
653 qemu_fdt_setprop(ms->fdt, aplic_name, "interrupts-extended", in create_fdt_one_aplic()
656 qemu_fdt_setprop_cell(ms->fdt, aplic_name, "msi-parent", msi_phandle); in create_fdt_one_aplic()
659 qemu_fdt_setprop_cells(ms->fdt, aplic_name, "reg", in create_fdt_one_aplic()
661 qemu_fdt_setprop_cell(ms->fdt, aplic_name, "riscv,num-sources", in create_fdt_one_aplic()
665 qemu_fdt_setprop_cell(ms->fdt, aplic_name, "riscv,children", in create_fdt_one_aplic()
667 qemu_fdt_setprop_cells(ms->fdt, aplic_name, "riscv,delegation", in create_fdt_one_aplic()
676 qemu_fdt_setprop_cells(ms->fdt, aplic_name, "riscv,delegate", in create_fdt_one_aplic()
682 qemu_fdt_setprop_cell(ms->fdt, aplic_name, "phandle", aplic_phandle); in create_fdt_one_aplic()
702 /* M-level APLIC node */ in create_fdt_socket_aplic()
703 aplic_addr = s->memmap[VIRT_APLIC_M].base + in create_fdt_socket_aplic()
704 (s->memmap[VIRT_APLIC_M].size * socket); in create_fdt_socket_aplic()
706 s->memmap[VIRT_APLIC_M].size, in create_fdt_socket_aplic()
712 /* S-level APLIC node */ in create_fdt_socket_aplic()
713 aplic_addr = s->memmap[VIRT_APLIC_S].base + in create_fdt_socket_aplic()
714 (s->memmap[VIRT_APLIC_S].size * socket); in create_fdt_socket_aplic()
715 create_fdt_one_aplic(s, socket, aplic_addr, s->memmap[VIRT_APLIC_S].size, in create_fdt_socket_aplic()
722 platform_bus_add_all_fdt_nodes(ms->fdt, aplic_name, in create_fdt_socket_aplic()
723 s->memmap[VIRT_PLATFORM_BUS].base, in create_fdt_socket_aplic()
724 s->memmap[VIRT_PLATFORM_BUS].size, in create_fdt_socket_aplic()
735 RISCVCPU hart = s->soc[0].harts[0]; in create_fdt_pmu()
737 qemu_fdt_add_subnode(ms->fdt, pmu_name); in create_fdt_pmu()
738 qemu_fdt_setprop_string(ms->fdt, pmu_name, "compatible", "riscv,pmu"); in create_fdt_pmu()
739 riscv_pmu_generate_fdt_node(ms->fdt, hart.pmu_avail_ctrs, pmu_name); in create_fdt_pmu()
756 qemu_fdt_add_subnode(ms->fdt, "/cpus"); in create_fdt_sockets()
757 qemu_fdt_setprop_cell(ms->fdt, "/cpus", "timebase-frequency", in create_fdt_sockets()
759 kvm_riscv_get_timebase_frequency(&s->soc->harts[0]) : in create_fdt_sockets()
761 qemu_fdt_setprop_cell(ms->fdt, "/cpus", "#size-cells", 0x0); in create_fdt_sockets()
762 qemu_fdt_setprop_cell(ms->fdt, "/cpus", "#address-cells", 0x1); in create_fdt_sockets()
763 qemu_fdt_add_subnode(ms->fdt, "/cpus/cpu-map"); in create_fdt_sockets()
765 intc_phandles = g_new0(uint32_t, ms->smp.cpus); in create_fdt_sockets()
767 phandle_pos = ms->smp.cpus; in create_fdt_sockets()
768 for (socket = (socket_count - 1); socket >= 0; socket--) { in create_fdt_sockets()
770 phandle_pos -= s->soc[socket].num_harts; in create_fdt_sockets()
772 clust_name = g_strdup_printf("/cpus/cpu-map/cluster%d", socket); in create_fdt_sockets()
773 qemu_fdt_add_subnode(ms->fdt, clust_name); in create_fdt_sockets()
780 if (virt_aclint_allowed() && s->have_aclint) { in create_fdt_sockets()
789 if (s->aia_type == VIRT_AIA_TYPE_APLIC_IMSIC) { in create_fdt_sockets()
796 * With KVM AIA aplic-imsic, using an irqchip without split in create_fdt_sockets()
799 if (!virt_use_emulated_aplic(s->aia_type)) { in create_fdt_sockets()
803 ms->smp.cpus); in create_fdt_sockets()
809 phandle_pos = ms->smp.cpus; in create_fdt_sockets()
810 for (socket = (socket_count - 1); socket >= 0; socket--) { in create_fdt_sockets()
811 phandle_pos -= s->soc[socket].num_harts; in create_fdt_sockets()
813 if (s->aia_type == VIRT_AIA_TYPE_NONE) { in create_fdt_sockets()
822 s->soc[socket].num_harts); in create_fdt_sockets()
849 hwaddr virtio_base = s->memmap[VIRT_VIRTIO].base; in create_fdt_virtio()
853 uint64_t size = s->memmap[VIRT_VIRTIO].size; in create_fdt_virtio()
858 qemu_fdt_add_subnode(ms->fdt, name); in create_fdt_virtio()
859 qemu_fdt_setprop_string(ms->fdt, name, "compatible", "virtio,mmio"); in create_fdt_virtio()
860 qemu_fdt_setprop_cells(ms->fdt, name, "reg", in create_fdt_virtio()
863 qemu_fdt_setprop_cell(ms->fdt, name, "interrupt-parent", in create_fdt_virtio()
865 if (s->aia_type == VIRT_AIA_TYPE_NONE) { in create_fdt_virtio()
866 qemu_fdt_setprop_cell(ms->fdt, name, "interrupts", in create_fdt_virtio()
869 qemu_fdt_setprop_cells(ms->fdt, name, "interrupts", in create_fdt_virtio()
884 s->memmap[VIRT_PCIE_ECAM].base); in create_fdt_pcie()
885 qemu_fdt_setprop_cell(ms->fdt, name, "#address-cells", in create_fdt_pcie()
887 qemu_fdt_setprop_cell(ms->fdt, name, "#interrupt-cells", in create_fdt_pcie()
889 qemu_fdt_setprop_cell(ms->fdt, name, "#size-cells", 0x2); in create_fdt_pcie()
890 qemu_fdt_setprop_string(ms->fdt, name, "compatible", in create_fdt_pcie()
891 "pci-host-ecam-generic"); in create_fdt_pcie()
892 qemu_fdt_setprop_string(ms->fdt, name, "device_type", "pci"); in create_fdt_pcie()
893 qemu_fdt_setprop_cell(ms->fdt, name, "linux,pci-domain", 0); in create_fdt_pcie()
894 qemu_fdt_setprop_cells(ms->fdt, name, "bus-range", 0, in create_fdt_pcie()
895 s->memmap[VIRT_PCIE_ECAM].size / PCIE_MMCFG_SIZE_MIN - 1); in create_fdt_pcie()
896 qemu_fdt_setprop(ms->fdt, name, "dma-coherent", NULL, 0); in create_fdt_pcie()
897 if (s->aia_type == VIRT_AIA_TYPE_APLIC_IMSIC) { in create_fdt_pcie()
898 qemu_fdt_setprop_cell(ms->fdt, name, "msi-parent", msi_pcie_phandle); in create_fdt_pcie()
900 qemu_fdt_setprop_cells(ms->fdt, name, "reg", 0, in create_fdt_pcie()
901 s->memmap[VIRT_PCIE_ECAM].base, 0, s->memmap[VIRT_PCIE_ECAM].size); in create_fdt_pcie()
902 qemu_fdt_setprop_sized_cells(ms->fdt, name, "ranges", in create_fdt_pcie()
904 2, s->memmap[VIRT_PCIE_PIO].base, 2, s->memmap[VIRT_PCIE_PIO].size, in create_fdt_pcie()
906 2, s->memmap[VIRT_PCIE_MMIO].base, in create_fdt_pcie()
907 2, s->memmap[VIRT_PCIE_MMIO].base, 2, s->memmap[VIRT_PCIE_MMIO].size, in create_fdt_pcie()
913 qemu_fdt_setprop_cells(ms->fdt, name, "iommu-map", in create_fdt_pcie()
918 create_pcie_irq_map(s, ms->fdt, name, irq_pcie_phandle); in create_fdt_pcie()
929 s->memmap[VIRT_TEST].base); in create_fdt_reset()
930 qemu_fdt_add_subnode(ms->fdt, name); in create_fdt_reset()
935 qemu_fdt_setprop_string_array(ms->fdt, name, "compatible", in create_fdt_reset()
938 qemu_fdt_setprop_cells(ms->fdt, name, "reg", in create_fdt_reset()
939 0x0, s->memmap[VIRT_TEST].base, 0x0, s->memmap[VIRT_TEST].size); in create_fdt_reset()
940 qemu_fdt_setprop_cell(ms->fdt, name, "phandle", test_phandle); in create_fdt_reset()
941 test_phandle = qemu_fdt_get_phandle(ms->fdt, name); in create_fdt_reset()
945 qemu_fdt_add_subnode(ms->fdt, name); in create_fdt_reset()
946 qemu_fdt_setprop_string(ms->fdt, name, "compatible", "syscon-reboot"); in create_fdt_reset()
947 qemu_fdt_setprop_cell(ms->fdt, name, "regmap", test_phandle); in create_fdt_reset()
948 qemu_fdt_setprop_cell(ms->fdt, name, "offset", 0x0); in create_fdt_reset()
949 qemu_fdt_setprop_cell(ms->fdt, name, "value", FINISHER_RESET); in create_fdt_reset()
953 qemu_fdt_add_subnode(ms->fdt, name); in create_fdt_reset()
954 qemu_fdt_setprop_string(ms->fdt, name, "compatible", "syscon-poweroff"); in create_fdt_reset()
955 qemu_fdt_setprop_cell(ms->fdt, name, "regmap", test_phandle); in create_fdt_reset()
956 qemu_fdt_setprop_cell(ms->fdt, name, "offset", 0x0); in create_fdt_reset()
957 qemu_fdt_setprop_cell(ms->fdt, name, "value", FINISHER_PASS); in create_fdt_reset()
968 s->memmap[VIRT_UART0].base); in create_fdt_uart()
969 qemu_fdt_add_subnode(ms->fdt, name); in create_fdt_uart()
970 qemu_fdt_setprop_string(ms->fdt, name, "compatible", "ns16550a"); in create_fdt_uart()
971 qemu_fdt_setprop_cells(ms->fdt, name, "reg", in create_fdt_uart()
972 0x0, s->memmap[VIRT_UART0].base, in create_fdt_uart()
973 0x0, s->memmap[VIRT_UART0].size); in create_fdt_uart()
974 qemu_fdt_setprop_cell(ms->fdt, name, "clock-frequency", 3686400); in create_fdt_uart()
975 qemu_fdt_setprop_cell(ms->fdt, name, "interrupt-parent", irq_mmio_phandle); in create_fdt_uart()
976 if (s->aia_type == VIRT_AIA_TYPE_NONE) { in create_fdt_uart()
977 qemu_fdt_setprop_cell(ms->fdt, name, "interrupts", UART0_IRQ); in create_fdt_uart()
979 qemu_fdt_setprop_cells(ms->fdt, name, "interrupts", UART0_IRQ, 0x4); in create_fdt_uart()
982 qemu_fdt_setprop_string(ms->fdt, "/chosen", "stdout-path", name); in create_fdt_uart()
983 qemu_fdt_setprop_string(ms->fdt, "/aliases", "serial0", name); in create_fdt_uart()
993 s->memmap[VIRT_RTC].base); in create_fdt_rtc()
994 qemu_fdt_add_subnode(ms->fdt, name); in create_fdt_rtc()
995 qemu_fdt_setprop_string(ms->fdt, name, "compatible", in create_fdt_rtc()
996 "google,goldfish-rtc"); in create_fdt_rtc()
997 qemu_fdt_setprop_cells(ms->fdt, name, "reg", in create_fdt_rtc()
998 0x0, s->memmap[VIRT_RTC].base, 0x0, s->memmap[VIRT_RTC].size); in create_fdt_rtc()
999 qemu_fdt_setprop_cell(ms->fdt, name, "interrupt-parent", in create_fdt_rtc()
1001 if (s->aia_type == VIRT_AIA_TYPE_NONE) { in create_fdt_rtc()
1002 qemu_fdt_setprop_cell(ms->fdt, name, "interrupts", RTC_IRQ); in create_fdt_rtc()
1004 qemu_fdt_setprop_cells(ms->fdt, name, "interrupts", RTC_IRQ, 0x4); in create_fdt_rtc()
1011 hwaddr flashsize = s->memmap[VIRT_FLASH].size / 2; in create_fdt_flash()
1012 hwaddr flashbase = s->memmap[VIRT_FLASH].base; in create_fdt_flash()
1015 qemu_fdt_add_subnode(ms->fdt, name); in create_fdt_flash()
1016 qemu_fdt_setprop_string(ms->fdt, name, "compatible", "cfi-flash"); in create_fdt_flash()
1017 qemu_fdt_setprop_sized_cells(ms->fdt, name, "reg", in create_fdt_flash()
1020 qemu_fdt_setprop_cell(ms->fdt, name, "bank-width", 4); in create_fdt_flash()
1026 hwaddr base = s->memmap[VIRT_FW_CFG].base; in create_fdt_fw_cfg()
1027 hwaddr size = s->memmap[VIRT_FW_CFG].size; in create_fdt_fw_cfg()
1028 g_autofree char *nodename = g_strdup_printf("/fw-cfg@%" PRIx64, base); in create_fdt_fw_cfg()
1030 qemu_fdt_add_subnode(ms->fdt, nodename); in create_fdt_fw_cfg()
1031 qemu_fdt_setprop_string(ms->fdt, nodename, in create_fdt_fw_cfg()
1032 "compatible", "qemu,fw-cfg-mmio"); in create_fdt_fw_cfg()
1033 qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", in create_fdt_fw_cfg()
1035 qemu_fdt_setprop(ms->fdt, nodename, "dma-coherent", NULL, 0); in create_fdt_fw_cfg()
1040 const char compat[] = "virtio,pci-iommu\0pci1af4,1057"; in create_fdt_virtio_iommu()
1041 void *fdt = MACHINE(s)->fdt; in create_fdt_virtio_iommu() local
1047 s->memmap[VIRT_PCIE_ECAM].base); in create_fdt_virtio_iommu()
1050 iommu_phandle = qemu_fdt_alloc_phandle(fdt); in create_fdt_virtio_iommu()
1052 qemu_fdt_add_subnode(fdt, iommu_node); in create_fdt_virtio_iommu()
1054 qemu_fdt_setprop(fdt, iommu_node, "compatible", compat, sizeof(compat)); in create_fdt_virtio_iommu()
1055 qemu_fdt_setprop_sized_cells(fdt, iommu_node, "reg", in create_fdt_virtio_iommu()
1058 qemu_fdt_setprop_cell(fdt, iommu_node, "#iommu-cells", 1); in create_fdt_virtio_iommu()
1059 qemu_fdt_setprop_cell(fdt, iommu_node, "phandle", iommu_phandle); in create_fdt_virtio_iommu()
1061 qemu_fdt_setprop_cells(fdt, pci_node, "iommu-map", in create_fdt_virtio_iommu()
1063 bdf + 1, iommu_phandle, bdf + 1, 0xffff - bdf); in create_fdt_virtio_iommu()
1071 void *fdt = MACHINE(s)->fdt; in create_fdt_iommu_sys() local
1074 hwaddr addr = s->memmap[VIRT_IOMMU_SYS].base; in create_fdt_iommu_sys()
1075 hwaddr size = s->memmap[VIRT_IOMMU_SYS].size; in create_fdt_iommu_sys()
1084 (unsigned int) s->memmap[VIRT_IOMMU_SYS].base); in create_fdt_iommu_sys()
1085 iommu_phandle = qemu_fdt_alloc_phandle(fdt); in create_fdt_iommu_sys()
1086 qemu_fdt_add_subnode(fdt, iommu_node); in create_fdt_iommu_sys()
1088 qemu_fdt_setprop(fdt, iommu_node, "compatible", comp, sizeof(comp)); in create_fdt_iommu_sys()
1089 qemu_fdt_setprop_cell(fdt, iommu_node, "#iommu-cells", 1); in create_fdt_iommu_sys()
1090 qemu_fdt_setprop_cell(fdt, iommu_node, "phandle", iommu_phandle); in create_fdt_iommu_sys()
1092 qemu_fdt_setprop_cells(fdt, iommu_node, "reg", in create_fdt_iommu_sys()
1094 qemu_fdt_setprop_cell(fdt, iommu_node, "interrupt-parent", irq_chip); in create_fdt_iommu_sys()
1096 qemu_fdt_setprop_cells(fdt, iommu_node, "interrupts", in create_fdt_iommu_sys()
1102 qemu_fdt_setprop_cell(fdt, iommu_node, "msi-parent", msi_phandle); in create_fdt_iommu_sys()
1109 const char comp[] = "riscv,pci-iommu"; in create_fdt_iommu()
1110 void *fdt = MACHINE(s)->fdt; in create_fdt_iommu() local
1116 s->memmap[VIRT_PCIE_ECAM].base); in create_fdt_iommu()
1118 iommu_phandle = qemu_fdt_alloc_phandle(fdt); in create_fdt_iommu()
1119 qemu_fdt_add_subnode(fdt, iommu_node); in create_fdt_iommu()
1121 qemu_fdt_setprop(fdt, iommu_node, "compatible", comp, sizeof(comp)); in create_fdt_iommu()
1122 qemu_fdt_setprop_cell(fdt, iommu_node, "#iommu-cells", 1); in create_fdt_iommu()
1123 qemu_fdt_setprop_cell(fdt, iommu_node, "phandle", iommu_phandle); in create_fdt_iommu()
1124 qemu_fdt_setprop_cells(fdt, iommu_node, "reg", in create_fdt_iommu()
1126 qemu_fdt_setprop_cells(fdt, pci_node, "iommu-map", in create_fdt_iommu()
1128 bdf + 1, iommu_phandle, bdf + 1, 0xffff - bdf); in create_fdt_iommu()
1129 s->pci_iommu_bdf = bdf; in create_fdt_iommu()
1164 ms->fdt = create_device_tree(&s->fdt_size); in create_fdt()
1165 if (!ms->fdt) { in create_fdt()
1170 qemu_fdt_setprop_string(ms->fdt, "/", "model", "riscv-virtio,qemu"); in create_fdt()
1171 qemu_fdt_setprop_string(ms->fdt, "/", "compatible", "riscv-virtio"); in create_fdt()
1172 qemu_fdt_setprop_cell(ms->fdt, "/", "#size-cells", 0x2); in create_fdt()
1173 qemu_fdt_setprop_cell(ms->fdt, "/", "#address-cells", 0x2); in create_fdt()
1175 qemu_fdt_add_subnode(ms->fdt, "/soc"); in create_fdt()
1176 qemu_fdt_setprop(ms->fdt, "/soc", "ranges", NULL, 0); in create_fdt()
1177 qemu_fdt_setprop_string(ms->fdt, "/soc", "compatible", "simple-bus"); in create_fdt()
1178 qemu_fdt_setprop_cell(ms->fdt, "/soc", "#size-cells", 0x2); in create_fdt()
1179 qemu_fdt_setprop_cell(ms->fdt, "/soc", "#address-cells", 0x2); in create_fdt()
1186 s->memmap[VIRT_PCIE_ECAM].base); in create_fdt()
1187 qemu_fdt_add_subnode(ms->fdt, name); in create_fdt()
1189 qemu_fdt_add_subnode(ms->fdt, "/chosen"); in create_fdt()
1193 qemu_fdt_setprop(ms->fdt, "/chosen", "rng-seed", in create_fdt()
1196 qemu_fdt_add_subnode(ms->fdt, "/aliases"); in create_fdt()
1210 hwaddr ecam_base = s->memmap[VIRT_PCIE_ECAM].base; in gpex_pcie_init()
1211 hwaddr ecam_size = s->memmap[VIRT_PCIE_ECAM].size; in gpex_pcie_init()
1212 hwaddr mmio_base = s->memmap[VIRT_PCIE_MMIO].base; in gpex_pcie_init()
1213 hwaddr mmio_size = s->memmap[VIRT_PCIE_MMIO].size; in gpex_pcie_init()
1216 hwaddr pio_base = s->memmap[VIRT_PCIE_PIO].base; in gpex_pcie_init()
1217 hwaddr pio_size = s->memmap[VIRT_PCIE_PIO].size; in gpex_pcie_init()
1245 memory_region_init_alias(ecam_alias, OBJECT(dev), "pcie-ecam", in gpex_pcie_init()
1251 memory_region_init_alias(mmio_alias, OBJECT(dev), "pcie-mmio", in gpex_pcie_init()
1257 memory_region_init_alias(high_mmio_alias, OBJECT(dev), "pcie-mmio-high", in gpex_pcie_init()
1271 GPEX_HOST(dev)->gpex_cfg.bus = PCI_HOST_BRIDGE(dev)->bus; in gpex_pcie_init()
1281 fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)ms->smp.cpus); in create_fw_cfg()
1291 /* Per-socket PLIC hart topology configuration string */ in virt_create_plic()
1294 /* Per-socket PLIC */ in virt_create_plic()
1299 ((1U << VIRT_IRQCHIP_NUM_PRIO_BITS) - 1), in virt_create_plic()
1320 /* Per-socket M-level IMSICs */ in virt_create_aia()
1330 /* Per-socket S-level IMSICs */ in virt_create_aia()
1341 /* Per-socket M-level APLIC */ in virt_create_aia()
1352 /* Per-socket S-level APLIC */ in virt_create_aia()
1377 dev->id = g_strdup(TYPE_PLATFORM_BUS_DEVICE); in create_platform_bus()
1379 qdev_prop_set_uint32(dev, "mmio_size", s->memmap[VIRT_PLATFORM_BUS].size); in create_platform_bus()
1381 s->platform_bus_dev = dev; in create_platform_bus()
1390 s->memmap[VIRT_PLATFORM_BUS].base, in create_platform_bus()
1407 smbios_set_defaults("QEMU", product, mc->name); in virt_build_smbios()
1409 if (riscv_is_32bit(&s->soc[0])) { in virt_build_smbios()
1416 mem_array.address = s->memmap[VIRT_DRAM].base; in virt_build_smbios()
1417 mem_array.length = ms->ram_size; in virt_build_smbios()
1426 fw_cfg_add_file(s->fw_cfg, "etc/smbios/smbios-tables", in virt_build_smbios()
1428 fw_cfg_add_file(s->fw_cfg, "etc/smbios/smbios-anchor", in virt_build_smbios()
1438 hwaddr start_addr = s->memmap[VIRT_DRAM].base; in virt_machine_done()
1440 const char *firmware_name = riscv_default_firmware_name(&s->soc[0]); in virt_machine_done()
1448 * dynamic sysbus devices. Our FDT needs to be finalized. in virt_machine_done()
1450 if (machine->dtb == NULL) { in virt_machine_done()
1456 * so the "-bios" parameter is not supported when KVM is enabled. in virt_machine_done()
1459 if (machine->firmware) { in virt_machine_done()
1460 if (strcmp(machine->firmware, "none")) { in virt_machine_done()
1466 machine->firmware = g_strdup("none"); in virt_machine_done()
1473 pflash_blk0 = pflash_cfi01_get_blk(s->flash[0]); in virt_machine_done()
1475 if (machine->firmware && !strcmp(machine->firmware, "none") && in virt_machine_done()
1482 start_addr = s->memmap[VIRT_FLASH].base; in virt_machine_done()
1486 * In this case, base of the flash would contain S-mode payload. in virt_machine_done()
1489 kernel_entry = s->memmap[VIRT_FLASH].base; in virt_machine_done()
1493 riscv_boot_info_init(&boot_info, &s->soc[0]); in virt_machine_done()
1495 if (machine->kernel_filename && !kernel_entry) { in virt_machine_done()
1503 fdt_load_addr = riscv_compute_fdt_addr(s->memmap[VIRT_DRAM].base, in virt_machine_done()
1504 s->memmap[VIRT_DRAM].size, in virt_machine_done()
1506 riscv_load_fdt(fdt_load_addr, machine->fdt); in virt_machine_done()
1509 riscv_setup_rom_reset_vec(machine, &s->soc[0], start_addr, in virt_machine_done()
1510 s->memmap[VIRT_MROM].base, in virt_machine_done()
1511 s->memmap[VIRT_MROM].size, kernel_entry, in virt_machine_done()
1516 * So here setup kernel start address and fdt address. in virt_machine_done()
1539 s->memmap = virt_memmap; in virt_machine_init()
1548 if (!virt_aclint_allowed() && s->have_aclint) { in virt_machine_init()
1575 object_initialize_child(OBJECT(machine), soc_name, &s->soc[i], in virt_machine_init()
1577 object_property_set_str(OBJECT(&s->soc[i]), "cpu-type", in virt_machine_init()
1578 machine->cpu_type, &error_abort); in virt_machine_init()
1579 object_property_set_int(OBJECT(&s->soc[i]), "hartid-base", in virt_machine_init()
1581 object_property_set_int(OBJECT(&s->soc[i]), "num-harts", in virt_machine_init()
1583 sysbus_realize(SYS_BUS_DEVICE(&s->soc[i]), &error_fatal); in virt_machine_init()
1585 if (virt_aclint_allowed() && s->have_aclint) { in virt_machine_init()
1586 if (s->aia_type == VIRT_AIA_TYPE_APLIC_IMSIC) { in virt_machine_init()
1587 /* Per-socket ACLINT MTIMER */ in virt_machine_init()
1588 riscv_aclint_mtimer_create(s->memmap[VIRT_CLINT].base + in virt_machine_init()
1596 /* Per-socket ACLINT MSWI, MTIMER, and SSWI */ in virt_machine_init()
1597 riscv_aclint_swi_create(s->memmap[VIRT_CLINT].base + in virt_machine_init()
1598 i * s->memmap[VIRT_CLINT].size, in virt_machine_init()
1600 riscv_aclint_mtimer_create(s->memmap[VIRT_CLINT].base + in virt_machine_init()
1601 i * s->memmap[VIRT_CLINT].size + in virt_machine_init()
1608 riscv_aclint_swi_create(s->memmap[VIRT_ACLINT_SSWI].base + in virt_machine_init()
1609 i * s->memmap[VIRT_ACLINT_SSWI].size, in virt_machine_init()
1613 /* Per-socket SiFive CLINT */ in virt_machine_init()
1615 s->memmap[VIRT_CLINT].base + i * s->memmap[VIRT_CLINT].size, in virt_machine_init()
1617 riscv_aclint_mtimer_create(s->memmap[VIRT_CLINT].base + in virt_machine_init()
1618 i * s->memmap[VIRT_CLINT].size + RISCV_ACLINT_SWI_SIZE, in virt_machine_init()
1624 /* Per-socket interrupt controller */ in virt_machine_init()
1625 if (s->aia_type == VIRT_AIA_TYPE_NONE) { in virt_machine_init()
1626 s->irqchip[i] = virt_create_plic(s->memmap, i, in virt_machine_init()
1629 s->irqchip[i] = virt_create_aia(s->aia_type, s->aia_guests, in virt_machine_init()
1630 s->memmap, i, base_hartid, in virt_machine_init()
1636 mmio_irqchip = s->irqchip[i]; in virt_machine_init()
1637 virtio_irqchip = s->irqchip[i]; in virt_machine_init()
1638 pcie_irqchip = s->irqchip[i]; in virt_machine_init()
1641 virtio_irqchip = s->irqchip[i]; in virt_machine_init()
1642 pcie_irqchip = s->irqchip[i]; in virt_machine_init()
1645 pcie_irqchip = s->irqchip[i]; in virt_machine_init()
1649 if (kvm_enabled() && virt_use_kvm_aia_aplic_imsic(s->aia_type)) { in virt_machine_init()
1652 s->memmap[VIRT_APLIC_S].base, in virt_machine_init()
1653 s->memmap[VIRT_IMSIC_S].base, in virt_machine_init()
1654 s->aia_guests); in virt_machine_init()
1657 if (riscv_is_32bit(&s->soc[0])) { in virt_machine_init()
1659 /* limit RAM size in a 32-bit system */ in virt_machine_init()
1660 if (machine->ram_size > 10 * GiB) { in virt_machine_init()
1661 machine->ram_size = 10 * GiB; in virt_machine_init()
1669 virt_high_pcie_memmap.base = s->memmap[VIRT_DRAM].base + in virt_machine_init()
1670 machine->ram_size; in virt_machine_init()
1676 memory_region_add_subregion(system_memory, s->memmap[VIRT_DRAM].base, in virt_machine_init()
1677 machine->ram); in virt_machine_init()
1681 s->memmap[VIRT_MROM].size, &error_fatal); in virt_machine_init()
1682 memory_region_add_subregion(system_memory, s->memmap[VIRT_MROM].base, in virt_machine_init()
1689 s->fw_cfg = create_fw_cfg(machine, s->memmap[VIRT_FW_CFG].base); in virt_machine_init()
1690 rom_set_fw(s->fw_cfg); in virt_machine_init()
1693 sifive_test_create(s->memmap[VIRT_TEST].base); in virt_machine_init()
1697 sysbus_create_simple("virtio-mmio", in virt_machine_init()
1698 s->memmap[VIRT_VIRTIO].base + i * s->memmap[VIRT_VIRTIO].size, in virt_machine_init()
1706 serial_mm_init(system_memory, s->memmap[VIRT_UART0].base, in virt_machine_init()
1710 sysbus_create_simple("goldfish_rtc", s->memmap[VIRT_RTC].base, in virt_machine_init()
1713 for (i = 0; i < ARRAY_SIZE(s->flash); i++) { in virt_machine_init()
1714 /* Map legacy -drive if=pflash to machine properties */ in virt_machine_init()
1715 pflash_cfi01_legacy_drive(s->flash[i], in virt_machine_init()
1721 if (machine->dtb) { in virt_machine_init()
1722 machine->fdt = load_device_tree(machine->dtb, &s->fdt_size); in virt_machine_init()
1723 if (!machine->fdt) { in virt_machine_init()
1735 s->memmap[VIRT_IOMMU_SYS].base, in virt_machine_init()
1737 object_property_set_uint(OBJECT(iommu_sys), "base-irq", in virt_machine_init()
1747 s->machine_done.notify = virt_machine_done; in virt_machine_init()
1748 qemu_add_machine_init_done_notifier(&s->machine_done); in virt_machine_init()
1757 s->oem_id = g_strndup(ACPI_BUILD_APPNAME6, 6); in virt_machine_instance_init()
1758 s->oem_table_id = g_strndup(ACPI_BUILD_APPNAME8, 8); in virt_machine_instance_init()
1759 s->acpi = ON_OFF_AUTO_AUTO; in virt_machine_instance_init()
1760 s->iommu_sys = ON_OFF_AUTO_AUTO; in virt_machine_instance_init()
1767 return g_strdup_printf("%d", s->aia_guests); in virt_get_aia_guests()
1774 s->aia_guests = atoi(val); in virt_set_aia_guests()
1775 if (s->aia_guests < 0 || s->aia_guests > VIRT_IRQCHIP_MAX_GUESTS) { in virt_set_aia_guests()
1787 switch (s->aia_type) { in virt_get_aia()
1792 val = "aplic-imsic"; in virt_get_aia()
1807 s->aia_type = VIRT_AIA_TYPE_NONE; in virt_set_aia()
1809 s->aia_type = VIRT_AIA_TYPE_APLIC; in virt_set_aia()
1810 } else if (!strcmp(val, "aplic-imsic")) { in virt_set_aia()
1811 s->aia_type = VIRT_AIA_TYPE_APLIC_IMSIC; in virt_set_aia()
1815 "aplic-imsic.\n"); in virt_set_aia()
1823 return s->have_aclint; in virt_get_aclint()
1830 s->have_aclint = value; in virt_set_aclint()
1835 return s->iommu_sys == ON_OFF_AUTO_ON; in virt_is_iommu_sys_enabled()
1842 OnOffAuto iommu_sys = s->iommu_sys; in virt_get_iommu_sys()
1852 visit_type_OnOffAuto(v, name, &s->iommu_sys, errp); in virt_set_iommu_sys()
1857 return s->acpi != ON_OFF_AUTO_OFF; in virt_is_acpi_enabled()
1864 OnOffAuto acpi = s->acpi; in virt_get_acpi()
1874 visit_type_OnOffAuto(v, name, &s->acpi, errp); in virt_set_acpi()
1886 s->iommu_sys = ON_OFF_AUTO_OFF; in virt_machine_get_hotplug_handler()
1898 if (s->platform_bus_dev) { in virt_machine_device_plug_cb()
1902 platform_bus_link_device(PLATFORM_BUS_DEVICE(s->platform_bus_dev), in virt_machine_device_plug_cb()
1913 s->iommu_sys = ON_OFF_AUTO_OFF; in virt_machine_device_plug_cb()
1922 mc->desc = "RISC-V VirtIO board"; in virt_machine_class_init()
1923 mc->init = virt_machine_init; in virt_machine_class_init()
1924 mc->max_cpus = VIRT_CPUS_MAX; in virt_machine_class_init()
1925 mc->default_cpu_type = TYPE_RISCV_CPU_BASE; in virt_machine_class_init()
1926 mc->block_default_type = IF_VIRTIO; in virt_machine_class_init()
1927 mc->no_cdrom = 1; in virt_machine_class_init()
1928 mc->pci_allow_0_address = true; in virt_machine_class_init()
1929 mc->possible_cpu_arch_ids = riscv_numa_possible_cpu_arch_ids; in virt_machine_class_init()
1930 mc->cpu_index_to_instance_props = riscv_numa_cpu_index_to_props; in virt_machine_class_init()
1931 mc->get_default_cpu_node_id = riscv_numa_get_default_cpu_node_id; in virt_machine_class_init()
1932 mc->numa_mem_supported = true; in virt_machine_class_init()
1934 mc->cpu_cluster_has_numa_boundary = true; in virt_machine_class_init()
1935 mc->default_ram_id = "riscv_virt_board.ram"; in virt_machine_class_init()
1936 assert(!mc->get_hotplug_handler); in virt_machine_class_init()
1937 mc->get_hotplug_handler = virt_machine_get_hotplug_handler; in virt_machine_class_init()
1939 hc->plug = virt_machine_device_plug_cb; in virt_machine_class_init()
1951 "enable/disable emulating " in virt_machine_class_init()
1959 "none, aplic, and aplic-imsic."); in virt_machine_class_init()
1961 object_class_property_add_str(oc, "aia-guests", in virt_machine_class_init()
1969 object_class_property_set_description(oc, "aia-guests", str); in virt_machine_class_init()
1978 object_class_property_add(oc, "iommu-sys", "OnOffAuto", in virt_machine_class_init()
1981 object_class_property_set_description(oc, "iommu-sys", in virt_machine_class_init()