Merge branch 'arm/queue' into 'master'

arm/arm64: Fixes, improvements, and prep for target-efi

See merge request kvm-unit-tests/kvm-unit-tests!6

arm/arm64: Remove dcache_line_size global variable

Compute the dcache line size when doing dcache maintenance instead of using
a global variable computed in setup(), which allows us to do dcache
mai

arm/arm64: Remove dcache_line_size global variable

Compute the dcache line size when doing dcache maintenance instead of using
a global variable computed in setup(), which allows us to do dcache
maintenance at any point in the boot process. This will be useful for
running as an EFI app and it also aligns our implementation to that of the
Linux kernel. As a result, the dcache_by_line_op assembly has been modified
to take a range described by start address and size, instead of start and
end addresses.

For consistency, the arm code has been similary modified.

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Alexandru Elisei <alexandru.elisei@arm.com>
Signed-off-by: Andrew Jones <drjones@redhat.com>

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arm/arm64: Read system registers to get the state of the MMU

When we are in EL1 we can directly tell if the local cpu's MMU is on
by reading a system register (SCTRL/SCTRL_EL1). In EL0, we use the
r

arm/arm64: Read system registers to get the state of the MMU

When we are in EL1 we can directly tell if the local cpu's MMU is on
by reading a system register (SCTRL/SCTRL_EL1). In EL0, we use the
relevant cpumask. This way we don't have to rely on the cpu id in
thread_info when we are in setup executing in EL1.

In addition, this change:
* Removes mmu_disabled_cpu_count as it is no longer necessary and
assumed that calls to mmu_mark_enabled()/mmu_mark_disabled() were
serialized. This is currently true but a future change could
easily break that assumption.
* Changes mmu_disabled_mask to mmu_enabled_mask and inverts the
logic to track in a more intuitive way that all CPUs start with
the MMU OFF and at some point, we turn them ON.

Reviewed-by: Alexandru Elisei <alexandru.elisei@arm.com>
Signed-off-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
[ Applied some code cleanups suggested by Alexandru Elisei ]
Signed-off-by: Andrew Jones <drjones@redhat.com>

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arm/arm64: Change dcache_line_size to ulong

dcache_line_size is treated like a long in assembly, so make it one.

Signed-off-by: Andrew Jones <drjones@redhat.com>
Message-Id: <20201014191444.136782-

arm/arm64: Change dcache_line_size to ulong

dcache_line_size is treated like a long in assembly, so make it one.

Signed-off-by: Andrew Jones <drjones@redhat.com>
Message-Id: <20201014191444.136782-4-drjones@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

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arm/arm64: gic: Introduce setup_irq() helper

ipi_enable() code would be reusable for other interrupts
than IPI. Let's rename it setup_irq() and pass an interrupt
handler pointer.

Signed-off-by: Eri

arm/arm64: gic: Introduce setup_irq() helper

ipi_enable() code would be reusable for other interrupts
than IPI. Let's rename it setup_irq() and pass an interrupt
handler pointer.

Signed-off-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Andrew Jones <drjones@redhat.com>

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arm/arm64: Perform dcache clean + invalidate after turning MMU off

When the MMU is off, data accesses are to Device nGnRnE memory on arm64 [1]
or to Strongly-Ordered memory on arm [2]. This means th

arm/arm64: Perform dcache clean + invalidate after turning MMU off

When the MMU is off, data accesses are to Device nGnRnE memory on arm64 [1]
or to Strongly-Ordered memory on arm [2]. This means that the accesses are
non-cacheable.

Perform a dcache clean to PoC so we can read the newer values from the
cache after we turn the MMU off, instead of the stale values from memory.

Perform an invalidation so we can access the data written to memory after
we turn the MMU back on. This prevents reading back the stale values we
cleaned from the cache when we turned the MMU off.

Data caches are PIPT and the VAs are translated using the current
translation tables, or an identity mapping (what Arm calls a "flat
mapping") when the MMU is off [1, 2]. Do the clean + invalidate when the
MMU is off so we don't depend on the current translation tables and we can
make sure that the operation applies to the entire physical memory.

The patch was tested by hacking arm/selftest.c:

+#include <alloc_page.h>
+#include <asm/mmu.h>
int main(int argc, char **argv)
{
+ int *x = alloc_page();
+
report_prefix_push("selftest");

+ *x = 0x42;
+ mmu_disable();
+ report(*x == 0x42, "read back value written with MMU on");
+ *x = 0x50;
+ mmu_enable(current_thread_info()->pgtable);
+ report(*x == 0x50, "read back value written with MMU off");
+
if (argc < 2)
report_abort("no test specified");

Without the fix, the first report fails, and the test usually hangs before
the second report. This is because mmu_enable pushes the LR register on the
stack when the MMU is off, which means that the value will be written to
memory. However, after asm_mmu_enable, the MMU is enabled, and we read it
back from the dcache, thus getting garbage.

With the fix, the two reports pass.

[1] ARM DDI 0487E.a, section D5.2.9
[2] ARM DDI 0406C.d, section B3.2.1

Signed-off-by: Alexandru Elisei <alexandru.elisei@arm.com>
Signed-off-by: Andrew Jones <drjones@redhat.com>

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Merge tag 'for-master' of https://github.com/rhdrjones/kvm-unit-tests into HEAD

arm/arm64 patches ready for master

arm/arm64: support 64-bit MPIDRs

Reported-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andrew Jones <drjones@redhat.com>

arm/arm64: irq enable/disable

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Andrew Jones <drjones@redhat.com>

arm/arm64: add some delay routines

Allow a thread to wait some specified amount of time. Can
specify in cycles, usecs, and msecs.

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by:

arm/arm64: add some delay routines

Allow a thread to wait some specified amount of time. Can
specify in cycles, usecs, and msecs.

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andrew Jones <drjones@redhat.com>

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arm/arm64: smp: support more than 8 cpus

By adding support for launching with gicv3 we can break the 8 vcpu
limit. This patch adds support to smp code and also selects the
vgic model corresponding t

arm/arm64: smp: support more than 8 cpus

By adding support for launching with gicv3 we can break the 8 vcpu
limit. This patch adds support to smp code and also selects the
vgic model corresponding to the host. The vgic model may also be
manually selected by adding e.g. -machine gic-version=3 to
extra_params.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Andrew Jones <drjones@redhat.com>

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arm: Add support for read_sysreg() and write_sysreg()

This patch adds two new macros to support read/write operations of ARMv7
and ARMv8 system registers. As part of the change, xstr() is revised to

arm: Add support for read_sysreg() and write_sysreg()

This patch adds two new macros to support read/write operations of ARMv7
and ARMv8 system registers. As part of the change, xstr() is revised to
support variable arguments. With it, ARMv7 system register can be defined
with __ACCESS_CP15() or __ACCESS_CP15_64() depending if it is 32-bit or
64-bit. get_mpidr() is re-written with new macros.

Suggested-by: Andrew Jones <drjones@redhat.com>
Signed-off-by: Wei Huang <wei@redhat.com>
Signed-off-by: Andrew Jones <drjones@redhat.com>

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arm/arm64: add per thread user_mode flag

While current_mode() == USR_MODE works on armv7 from PL0 to check
if we're in user mode, current_mode() would require reading a
privileged register on armv8.

arm/arm64: add per thread user_mode flag

While current_mode() == USR_MODE works on armv7 from PL0 to check
if we're in user mode, current_mode() would require reading a
privileged register on armv8. To work around this, on arm64 we
introduced a 'user_mode' variable. This variable needs to be per
thread now. Rather than starting to pollute thread_info with a
bunch of bools, create a flags field and a TIF_USER_MODE flag to
replace it. Use it on armv7 too for consistency. Also, now that
we need to create a thread_info initializer, add mpidr utilities
for setting thread_info->cpu.

Signed-off-by: Andrew Jones <drjones@redhat.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>

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arm/arm64: get rid of get_sp()

get_sp() only worked by accident, because gcc inlined calls
to it. It should have always been explicitly inlined. It was
also only added for debugging, and not in any

arm/arm64: get rid of get_sp()

get_sp() only worked by accident, because gcc inlined calls
to it. It should have always been explicitly inlined. It was
also only added for debugging, and not in any use now.
Furthermore, while we will have need for a "get_sp", we'll
add it back with a new name, current_stack_pointer, in order
to be consistent with Linux.

Signed-off-by: Andrew Jones <drjones@redhat.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>

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arm: use absolute headers

Files in lib/arm including "asm/someheader.h" will get
lib/arm/asm/someheader.h, not lib/asm/someheader.h. So we
need to use <> instead of "" in order to prepare for header

arm: use absolute headers

Files in lib/arm including "asm/someheader.h" will get
lib/arm/asm/someheader.h, not lib/asm/someheader.h. So we
need to use <> instead of "" in order to prepare for headers
of the same name, but for a different arch. We change all
'#include's of all arm files, as consistency looks better.

Signed-off-by: Andrew Jones <drjones@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

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Merge remote-tracking branch 'drjones/arm/v7-initial-drop'

arm: vectors support

Add support for tests to use exception handlers using
install_exception_handler(). This patch also adds start_usr(),
which can be used to start a function in USR mode, using a g

arm: vectors support

Add support for tests to use exception handlers using
install_exception_handler(). This patch also adds start_usr(),
which can be used to start a function in USR mode, using a given
stack pointer. start_usr() is used by a new selftest test that
checks the new vector support.

Signed-off-by: Andrew Jones <drjones@redhat.com>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
---
v7:
- selftest.c: s/alloc_aligned/memalign/
- lib/arm/processor.c remove unnecessary include "asm/setup.h"
v6: use alloc() for start_usr
v5: rebase change: replace __stringify with libcflat's new xstr
macro
v4: a couple tweaks to fit changes in the other patches,
vectors-usr test now has an 8K usr stack
v3:
- squashed in 'arm: Simplify exceptions_init in cstart.S'
[Christoffer Dall]
- suggested function name changes and comment additions
[Christoffer Dall]
- fix a bug with stack restore from usr mode exceptions that
Christoffer pointed out. Add a get_sp() accessor too.

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