hypervisor: mshv: Add x86_64 module

Add x86_64 specific definitions as we only plan
to support x86_64 for the moment.

Signed-off-by: Muminul Islam <muislam@microsoft.com>

hypervisor: Introduce mshv module in the hypervisor

This is the initial folder structure of the mshv module inside
the hypervisor crate. The aim of this module is to support Microsoft
Hyper-V as a s

hypervisor: Introduce mshv module in the hypervisor

This is the initial folder structure of the mshv module inside
the hypervisor crate. The aim of this module is to support Microsoft
Hyper-V as a supported Hypervisor.

Signed-off-by: Muminul Islam <muislam@microsoft.com>

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hypervisor, vmm: Feature guard KVM specific code

There are some code base and function which are purely KVM specific for
now and we don't have those supports in mshv at the moment but we have plan
f

hypervisor, vmm: Feature guard KVM specific code

There are some code base and function which are purely KVM specific for
now and we don't have those supports in mshv at the moment but we have plan
for the future. We are doing a feature guard with KVM. For example, KVM has
mp_state, cpu clock support, which we don't have for mshv. In order to build
those code we are making the code base for KVM specific compilation.

Signed-off-by: Muminul Islam <muislam@microsoft.com>

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hypervisor: x86: move RFLAGS bits to regs.rs

Signed-off-by: Wei Liu <liuwe@microsoft.com>

hypervisor: emulator: switch to use vec in MockVMM

The customized hashmap macro can't be lifted to common MockVMM code.
MockVMM only needs a collection to iterate over to get initial register
states

hypervisor: emulator: switch to use vec in MockVMM

The customized hashmap macro can't be lifted to common MockVMM code.
MockVMM only needs a collection to iterate over to get initial register
states. A vector is just as good as a hashmap.

Switch to use a vector to store initial register states. This allows us
to drop the hashmap macro everywhere.

Signed-off-by: Wei Liu <liuwe@microsoft.com>

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hypervisor: emulator: emulate CMP

Unfortunately Rust stable does not yet have inline ASM support the flag
calculation will have to be implemented in software.

Signed-off-by: Wei Liu <liuwe@microsof

hypervisor: emulator: emulate CMP

Unfortunately Rust stable does not yet have inline ASM support the flag
calculation will have to be implemented in software.

Signed-off-by: Wei Liu <liuwe@microsoft.com>

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hypervisor: emulator: drop imm_op macro

It is not needed anymore.

Signed-off-by: Wei Liu <liuwe@microsoft.com>

hypervisor: emulator: rewrite MOV emulation with get/set_op

Signed-off-by: Wei Liu <liuwe@microsoft.com>

hypervisor: emulator: introduce get/set_op

Provide two helpers to get and set operands. This reduces repetition.

Signed-off-by: Wei Liu <liuwe@microsoft.com>

hypervisor: x86: emulator: drop unneeded curly brackets

There is no need to have a pair of curly brackets for structures without
any member.

No functional change.

Signed-off-by: Wei Liu <liuwe@mic

hypervisor: x86: emulator: drop unneeded curly brackets

There is no need to have a pair of curly brackets for structures without
any member.

No functional change.

Signed-off-by: Wei Liu <liuwe@microsoft.com>

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hypervisor: emulator: drop InstructionMap

It is not needed anymore.

Signed-off-by: Wei Liu <liuwe@microsoft.com>

hypervisor: emulator: use static mapping to dispatch emulation

The mapping between code and its handler is static. We can drop the
HashMap in favour of a static match expression.

This has two benef

hypervisor: emulator: use static mapping to dispatch emulation

The mapping between code and its handler is static. We can drop the
HashMap in favour of a static match expression.

This has two benefits:
1. No more memory allocation and deallocation for the HashMap.
2. Shorter look-up time.

Signed-off-by: Wei Liu <liuwe@microsoft.com>

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misc: Use a more relaxed memory model when possible

When a total ordering between multiple atomic variables is not required
then use Ordering::Acquire with atomic loads and Ordering::Release with
at

misc: Use a more relaxed memory model when possible

When a total ordering between multiple atomic variables is not required
then use Ordering::Acquire with atomic loads and Ordering::Release with
atomic stores.

This will improve performance as this does not require a memory fence
on x86_64 which Ordering::SeqCst will use.

Add a comment to the code in the vCPU handling code where it operates on
multiple atomics to explain why Ordering::SeqCst is required.

Signed-off-by: Rob Bradford <robert.bradford@intel.com>

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hypervisor: emulator: Format instructions on error paths

Formatting instructions might be costly, so we only want to do that on
the emulation error paths.

Signed-off-by: Samuel Ortiz <sameo@linux.i

hypervisor: emulator: Format instructions on error paths

Formatting instructions might be costly, so we only want to do that on
the emulation error paths.

Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>

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hypervisor: x86: Make imm_op available to all emulated instructions

By moving it to the instructions root module.

Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>

hypervisor: x86: Extend the imm_op() macro

To support every kind of immediate operands.

Signed-off-by: Wei Liu <liuwe@microsoft.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>

hypervisor: emulator: Add a negative instruction fetch unit test

Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>

hypervisor: emulator: Fix logic bug in MockVMM

emulate_first_insn() really means we want only the first instruction to
be emulated.

Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>

hypervisor: emulator: Add initial fetch support

When the x86 instruction decoder tells us about some missing bytes from
the instruction stream, we call into the platform fetch method and
emulate one

hypervisor: emulator: Add initial fetch support

When the x86 instruction decoder tells us about some missing bytes from
the instruction stream, we call into the platform fetch method and
emulate one last instruction.

Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>

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hypervisor: emulator: Decoding loop restructuring

In preparation for the instruction fetching step, we modify the decoding
loop so that we can check what the last decoding error is.

We also switch

hypervisor: emulator: Decoding loop restructuring

In preparation for the instruction fetching step, we modify the decoding
loop so that we can check what the last decoding error is.

We also switch to explictly using decode_out() which removes a 32 bytes
copy compared to decode().

Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>

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hypervisor: x86: Add an address linearization method to CpuStateManager

From a CPU state and a segment, we can translate a logical (segmented)
address into a linear one.

Signed-off-by: Samuel Ortiz

hypervisor: x86: Add an address linearization method to CpuStateManager

From a CPU state and a segment, we can translate a logical (segmented)
address into a linear one.

Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>

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hypervisor: x86: Add a SegmentRegistorOps trait

In order to validate emulated memory accesses, we need to be able to get
all the segments descriptor attributes.

This is done by abstracting the Segm

hypervisor: x86: Add a SegmentRegistorOps trait

In order to validate emulated memory accesses, we need to be able to get
all the segments descriptor attributes.

This is done by abstracting the SegmentRegister attributes through a
trait that each hypervisor will have to implement.

Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>

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hypervisor: emulator: Add a CPU mode getter to CpuStateManager

We need to be able to build the CPU mode from its state in order to
start implementing mode related checks in the x86 emulator.

Signed

hypervisor: emulator: Add a CPU mode getter to CpuStateManager

We need to be able to build the CPU mode from its state in order to
start implementing mode related checks in the x86 emulator.

Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>

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hypervisor: Start moving register definitions to the hypervisor crate

Most of arch/src/x86_64/regs.rs will eventually move unde
hypervisor/src/x86/regs.rs.

Signed-off-by: Samuel Ortiz <sameo@linux.

hypervisor: Start moving register definitions to the hypervisor crate

Most of arch/src/x86_64/regs.rs will eventually move unde
hypervisor/src/x86/regs.rs.

Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>

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hypervisor: emulator: Clean the MockVMM initialization path

Separate the standalone _init_and_run() function into 2 MockVMM methods:
new() and emulate_insn().

Signed-off-by: Samuel Ortiz <sameo@lin

hypervisor: emulator: Clean the MockVMM initialization path

Separate the standalone _init_and_run() function into 2 MockVMM methods:
new() and emulate_insn().

Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>

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