58e6a289 | 21-Mar-2024 |
Jinank Jain <jinankjain@microsoft.com> |
hypervisor: mshv: Restrict MshvEmulator to x86
Current MSHV emulator only works for x86 instruction decoder. So, let's restrict its usage to x86.
Signed-off-by: Jinank Jain <jinankjain@microsoft.co
hypervisor: mshv: Restrict MshvEmulator to x86
Current MSHV emulator only works for x86 instruction decoder. So, let's restrict its usage to x86.
Signed-off-by: Jinank Jain <jinankjain@microsoft.com>
show more ...
|
7c6c4512 | 21-Mar-2024 |
Jinank Jain <jinankjain@microsoft.com> |
hypervisor: mshv: Move ClockData under x86 feature flag
ClockData enum is only defined for x86_64 architecture so let's use it just for that.
Signed-off-by: Jinank Jain <jinankjain@microsoft.com> |
fdcc8539 | 21-Mar-2024 |
Jinank Jain <jinankjain@microsoft.com> |
hypervisor: Don't restrict logger crate to just x86
Even aarch64 subsystem of hypervisor crate can use logging so don't restrict it just to x86.
Signed-off-by: Jinank Jain <jinankjain@microsoft.com> |
f7b9a6e5 | 21-Mar-2024 |
Jinank Jain <jinankjain@microsoft.com> |
hypervisor: mshv: Restrict unmapped GPA exit to x86
Current instruction emulator can only decode x86 instructions. Thus, restrict the exit handling for just x86 guests.
Signed-off-by: Jinank Jain <
hypervisor: mshv: Restrict unmapped GPA exit to x86
Current instruction emulator can only decode x86 instructions. Thus, restrict the exit handling for just x86 guests.
Signed-off-by: Jinank Jain <jinankjain@microsoft.com>
show more ...
|
c9e989de | 21-Mar-2024 |
Jinank Jain <jinankjain@microsoft.com> |
hypervisor: mshv: Restrict IO port exit to x86
IO ports exits can only happen on a x86 guest.
Signed-off-by: Jinank Jain <jinankjain@microsoft.com> |
2501426e | 21-Mar-2024 |
Jinank Jain <jinankjain@microsoft.com> |
hypervisor: mshv: Restrict APIC EOI message to x86
APIC controller is only available on x86 machine. ARM uses a different interrupt controller so those exit messages won't happen for ARM guests.
Si
hypervisor: mshv: Restrict APIC EOI message to x86
APIC controller is only available on x86 machine. ARM uses a different interrupt controller so those exit messages won't happen for ARM guests.
Signed-off-by: Jinank Jain <jinankjain@microsoft.com>
show more ...
|
dad1ab12 | 21-Mar-2024 |
Jinank Jain <jinankjain@microsoft.com> |
hypervisor: mshv: Restrict NMI injection to x86
NMI injection is only supported on x86 architecture.
Signed-off-by: Jinank Jain <jinankjain@microsoft.com> |
3a60c653 | 20-Mar-2024 |
Jinank Jain <jinankjain@microsoft.com> |
hypervisor: mshv: Reduce the visbility of get_supported_cpuid to x86
Supported CPUID could only be fetched for x86_64 guests.
Signed-off-by: Jinank Jain <jinankjain@microsoft.com> |
719cae21 | 20-Mar-2024 |
Jinank Jain <jinankjain@microsoft.com> |
hypervisor: mshv: Restrict MSR and CPUID visbility for MshvVcpu to x86
MSR and CPUID are limited to x86 architecture so, reduce the visbility of these two members inside struct MshvVcpu to just x86
hypervisor: mshv: Restrict MSR and CPUID visbility for MshvVcpu to x86
MSR and CPUID are limited to x86 architecture so, reduce the visbility of these two members inside struct MshvVcpu to just x86 architecture.
Signed-off-by: Jinank Jain <jinankjain@microsoft.com>
show more ...
|
c721c0d8 | 19-Mar-2024 |
Rob Bradford <rbradford@rivosinc.com> |
hypervisor: emulator: Remove unnecessary #![allow(unused_mut)]
clippy was flagging this up as a mixture of mixed attributes but that attribute is no longer necessary
warning: item has both inner an
hypervisor: emulator: Remove unnecessary #![allow(unused_mut)]
clippy was flagging this up as a mixture of mixed attributes but that attribute is no longer necessary
warning: item has both inner and outer attributes --> hypervisor/src/arch/x86/emulator/mod.rs:769:1 | 769 | / #[cfg(test)] 770 | | mod tests { 771 | | #![allow(unused_mut)] | |_________________________^ | = help: for further information visit https://rust-lang.github.io/rust-clippy/master/index.html#mixed_attributes_style = note: `#[warn(clippy::mixed_attributes_style)]` on by default
Signed-off-by: Rob Bradford <rbradford@rivosinc.com>
show more ...
|
1e3d21e5 | 19-Mar-2024 |
Rob Bradford <rbradford@rivosinc.com> |
hypervisor: kvm: aarch64: Remove redundant import
error: the item `kvm_bindings` is imported redundantly Error: --> hypervisor/src/kvm/aarch64/gic/mod.rs:9:18 | 9 | use crate::kvm::{kvm_bindings,
hypervisor: kvm: aarch64: Remove redundant import
error: the item `kvm_bindings` is imported redundantly Error: --> hypervisor/src/kvm/aarch64/gic/mod.rs:9:18 | 9 | use crate::kvm::{kvm_bindings, KvmVm}; | ^^^^^^^^^^^^ the item `kvm_bindings` is already defined by prelude | = note: `-D unused-imports` implied by `-D warnings` = help: to override `-D warnings` add `#[allow(unused_imports)]`
Signed-off-by: Rob Bradford <rbradford@rivosinc.com>
show more ...
|
72620295 | 19-Mar-2024 |
Rob Bradford <rbradford@rivosinc.com> |
hypervisor: Remove empty doc comment
warning: empty doc comment --> hypervisor/src/hypervisor.rs:24:1 | 24 | / /// 25 | | /// | |___^ | = help: consider removing or filling it = hel
hypervisor: Remove empty doc comment
warning: empty doc comment --> hypervisor/src/hypervisor.rs:24:1 | 24 | / /// 25 | | /// | |___^ | = help: consider removing or filling it = help: for further information visit https://rust-lang.github.io/rust-clippy/master/index.html#empty_docs = note: `#[warn(clippy::empty_docs)]` on by default
Signed-off-by: Rob Bradford <rbradford@rivosinc.com>
show more ...
|
67054bf7 | 19-Mar-2024 |
Rob Bradford <rbradford@rivosinc.com> |
hypervisor: Remove import of TryInto
This is already provided by the prelude.
Signed-off-by: Rob Bradford <rbradford@rivosinc.com> |
89ff0627 | 19-Mar-2024 |
Jinank Jain <jinankjain@microsoft.com> |
hypervisor: mshv: Reduce msrs visibility to x86_64
Model Specific Registers (MSRs) are usually available on x86 architecture. So, let's reduce the visibility of MSRs to just x86 architecture.
Signe
hypervisor: mshv: Reduce msrs visibility to x86_64
Model Specific Registers (MSRs) are usually available on x86 architecture. So, let's reduce the visibility of MSRs to just x86 architecture.
Signed-off-by: Jinank Jain <jinankjain@microsoft.com>
show more ...
|
2d6287d1 | 12-Mar-2024 |
Muminul Islam <muislam@microsoft.com> |
hypervisor: Fix boot failure on SNP guest
Current version can't boot a SNP guest while using more than one VCPU. It turns out that there is an issue in the Snp AP creation process. We should be writ
hypervisor: Fix boot failure on SNP guest
Current version can't boot a SNP guest while using more than one VCPU. It turns out that there is an issue in the Snp AP creation process. We should be writing to Software exitinfo1 instead of exitinfo2. This patch fixes the issue and we can boot multi vcpu SNP guest.
Signed-off-by: Muminul Islam <muislam@microsoft.com>
show more ...
|
cd116cb2 | 05-Mar-2024 |
Jinank Jain <jinankjain@microsoft.com> |
vmm: hypervisor: Add support for injecting NMI for MSHV guest
Currently, we only support injecting NMI for KVM guests but we can do the same for MSHV guests as well to have feature parity.
Signed-o
vmm: hypervisor: Add support for injecting NMI for MSHV guest
Currently, we only support injecting NMI for KVM guests but we can do the same for MSHV guests as well to have feature parity.
Signed-off-by: Jinank Jain <jinankjain@microsoft.com>
show more ...
|
da376a4b | 08-Feb-2024 |
Jinank Jain <jinankjain@microsoft.com> |
hypervisor: mshv: Add support to handle GPA Attribute Intercept
Microsoft Hypervisor raises this request to change the guest page visibility in case of SEV-SNP guest.
Signed-off-by: Jinank Jain <ji
hypervisor: mshv: Add support to handle GPA Attribute Intercept
Microsoft Hypervisor raises this request to change the guest page visibility in case of SEV-SNP guest.
Signed-off-by: Jinank Jain <jinankjain@microsoft.com> Signed-off-by: Nuno Das Neves <nudasnev@microsoft.com>
show more ...
|
c72bf0b3 | 11-Dec-2023 |
Yi Wang <foxywang@tencent.com> |
vmm: support injecting NMI
Inject NMI interrupt when needed, by call ioctl KVM_NMI.
Signed-off-by: Yi Wang <foxywang@tencent.com> |
9b722bbc | 20-Feb-2024 |
Jinank Jain <jinankjain@microsoft.com> |
hypervisor: mshv: Don't unregister ioevent in case of SEV-SNP guest
Since we don't register ioevents in case of SEV-SNP guests. Thus, we should not unregister it as well.
Signed-off-by: Jinank Jain
hypervisor: mshv: Don't unregister ioevent in case of SEV-SNP guest
Since we don't register ioevents in case of SEV-SNP guests. Thus, we should not unregister it as well.
Signed-off-by: Jinank Jain <jinankjain@microsoft.com>
show more ...
|
adb318f4 | 19-Feb-2024 |
Rob Bradford <rbradford@rivosinc.com> |
misc: Remove redundant "use" imports
With the nightly toolchain (2024-02-18) cargo check will flag up redundant imports either because they are pulled in by the prelude on earlier match.
Remove tho
misc: Remove redundant "use" imports
With the nightly toolchain (2024-02-18) cargo check will flag up redundant imports either because they are pulled in by the prelude on earlier match.
Remove those redundant imports.
Signed-off-by: Rob Bradford <rbradford@rivosinc.com>
show more ...
|
d0be450b | 05-Feb-2024 |
Jinank Jain <jinankjain@microsoft.com> |
hypervisor: Do not register ioevent for SEV-SNP
... enabled VMs. IOEvents are not supported in case of SEV-SNP VMs. All the IO events are delievered via GHCB protocol.
Signed-off-by: Jinank Jain <j
hypervisor: Do not register ioevent for SEV-SNP
... enabled VMs. IOEvents are not supported in case of SEV-SNP VMs. All the IO events are delievered via GHCB protocol.
Signed-off-by: Jinank Jain <jinankjain@microsoft.com> Signed-off-by: Muminul Islam <muislam@microsoft.com>
show more ...
|
3a683b54 | 05-Feb-2024 |
Jinank Jain <jinankjain@microsoft.com> |
hypervisor: Add a flag to identify sev-snp VM
This will help in identify whether a VM supports sev-snp and based on that disable/enable certain features.
Signed-off-by: Jinank Jain <jinankjain@micr
hypervisor: Add a flag to identify sev-snp VM
This will help in identify whether a VM supports sev-snp and based on that disable/enable certain features.
Signed-off-by: Jinank Jain <jinankjain@microsoft.com> Signed-off-by: Muminul Islam <muislam@microsoft.com>
show more ...
|
321d6f47 | 07-Feb-2024 |
Jinank Jain <jinankjain@microsoft.com> |
hypervisor: mshv: Add new memory region flag
GPA_MAP_ADJUSTABLE suggests hypervisor to adjust GPA permissions as required.
Signed-off-by: Jinank Jain <jinankjain@microsoft.com> |
50241f94 | 05-Feb-2024 |
Jinank Jain <jinankjain@microsoft.com> |
hypervisor: mshv: Add support to handle unaccepted GPA
Unaccepted GPA is usually thrown by Microsoft hypervisor in case of mismatch between GPA and GVA mappings. This is a fatal message from the hyp
hypervisor: mshv: Add support to handle unaccepted GPA
Unaccepted GPA is usually thrown by Microsoft hypervisor in case of mismatch between GPA and GVA mappings. This is a fatal message from the hypervisor perspective so we would need to error out from the vcpu run loop. Along with add some debug message to identify the broken mapping between GVA and GPA.
Signed-off-by: Jinank Jain <jinankjain@microsoft.com> Signed-off-by: Muminul Islam <muislam@microsoft.com>
show more ...
|
3ce0fef7 | 23-Jan-2024 |
Bo Chen <chen.bo@intel.com> |
build: Bump vmm-sys-util crate and its consumers
This patch bumps the following crates, including `kvm-bindings@0.7.0`*, `kvm-ioctls@0.16.0`**, `linux-loader@0.11.0`, `versionize@0.2.0`, `versionize
build: Bump vmm-sys-util crate and its consumers
This patch bumps the following crates, including `kvm-bindings@0.7.0`*, `kvm-ioctls@0.16.0`**, `linux-loader@0.11.0`, `versionize@0.2.0`, `versionize_derive@0.1.6`***, `vhost@0.10.0`, `vhost-user-backend@0.13.1`, `virtio-queue@0.11.0`, `vm-memory@0.14.0`, `vmm-sys-util@0.12.1`, and the latest of `vfio-bindings`, `vfio-ioctls`, `mshv-bindings`,`mshv-ioctls`, and `vfio-user`.
* A fork of the `kvm-bindings` crate is being used to support serialization of various structs for migration [1]. Also, code changes are made to accommodate the updated `struct xsave` from the Linux kernel. Note: these changes related to `struct xsave` break live-upgrade.
** The new `kvm-ioctls` crate introduced breaking changes for the `get/set_one_reg` API on `aarch64` [2], so code changes are made to the new APIs.
*** A fork of the `versionize_derive` crate is being used to support versionize on packed structs [3].
[1] https://github.com/cloud-hypervisor/kvm-bindings/tree/ch-v0.7.0 [2] https://github.com/rust-vmm/kvm-ioctls/pull/223 [3] https://github.com/cloud-hypervisor/versionize_derive/tree/ch-0.1.6
Fixes: #6072
Signed-off-by: Bo Chen <chen.bo@intel.com>
show more ...
|