hypervisor: mshv: Restrict APIC EOI message to x86

APIC controller is only available on x86 machine. ARM uses a different
interrupt controller so those exit messages won't happen for ARM guests.

Si

hypervisor: mshv: Restrict APIC EOI message to x86

APIC controller is only available on x86 machine. ARM uses a different
interrupt controller so those exit messages won't happen for ARM guests.

Signed-off-by: Jinank Jain <jinankjain@microsoft.com>

show more ...

hypervisor: mshv: Restrict NMI injection to x86

NMI injection is only supported on x86 architecture.

Signed-off-by: Jinank Jain <jinankjain@microsoft.com>

hypervisor: mshv: Reduce the visbility of get_supported_cpuid to x86

Supported CPUID could only be fetched for x86_64 guests.

Signed-off-by: Jinank Jain <jinankjain@microsoft.com>

hypervisor: mshv: Restrict MSR and CPUID visbility for MshvVcpu to x86

MSR and CPUID are limited to x86 architecture so, reduce the visbility
of these two members inside struct MshvVcpu to just x86

hypervisor: mshv: Restrict MSR and CPUID visbility for MshvVcpu to x86

MSR and CPUID are limited to x86 architecture so, reduce the visbility
of these two members inside struct MshvVcpu to just x86 architecture.

Signed-off-by: Jinank Jain <jinankjain@microsoft.com>

show more ...

hypervisor: emulator: Remove unnecessary #![allow(unused_mut)]

clippy was flagging this up as a mixture of mixed attributes but that
attribute is no longer necessary

warning: item has both inner an

hypervisor: emulator: Remove unnecessary #![allow(unused_mut)]

clippy was flagging this up as a mixture of mixed attributes but that
attribute is no longer necessary

warning: item has both inner and outer attributes
--> hypervisor/src/arch/x86/emulator/mod.rs:769:1
|
769 | / #[cfg(test)]
770 | | mod tests {
771 | | #![allow(unused_mut)]
| |_________________________^
|
= help: for further information visit https://rust-lang.github.io/rust-clippy/master/index.html#mixed_attributes_style
= note: `#[warn(clippy::mixed_attributes_style)]` on by default

Signed-off-by: Rob Bradford <rbradford@rivosinc.com>

show more ...

hypervisor: kvm: aarch64: Remove redundant import

error: the item `kvm_bindings` is imported redundantly
Error: --> hypervisor/src/kvm/aarch64/gic/mod.rs:9:18
|
9 | use crate::kvm::{kvm_bindings,

hypervisor: kvm: aarch64: Remove redundant import

error: the item `kvm_bindings` is imported redundantly
Error: --> hypervisor/src/kvm/aarch64/gic/mod.rs:9:18
|
9 | use crate::kvm::{kvm_bindings, KvmVm};
| ^^^^^^^^^^^^ the item `kvm_bindings` is already defined by prelude
|
= note: `-D unused-imports` implied by `-D warnings`
= help: to override `-D warnings` add `#[allow(unused_imports)]`

Signed-off-by: Rob Bradford <rbradford@rivosinc.com>

show more ...

hypervisor: Remove empty doc comment

warning: empty doc comment
--> hypervisor/src/hypervisor.rs:24:1
|
24 | / ///
25 | | ///
| |___^
|
= help: consider removing or filling it
= hel

hypervisor: Remove empty doc comment

warning: empty doc comment
--> hypervisor/src/hypervisor.rs:24:1
|
24 | / ///
25 | | ///
| |___^
|
= help: consider removing or filling it
= help: for further information visit https://rust-lang.github.io/rust-clippy/master/index.html#empty_docs
= note: `#[warn(clippy::empty_docs)]` on by default

Signed-off-by: Rob Bradford <rbradford@rivosinc.com>

show more ...

hypervisor: Remove import of TryInto

This is already provided by the prelude.

Signed-off-by: Rob Bradford <rbradford@rivosinc.com>

hypervisor: mshv: Reduce msrs visibility to x86_64

Model Specific Registers (MSRs) are usually available on x86
architecture. So, let's reduce the visibility of MSRs to just x86
architecture.

Signe

hypervisor: mshv: Reduce msrs visibility to x86_64

Model Specific Registers (MSRs) are usually available on x86
architecture. So, let's reduce the visibility of MSRs to just x86
architecture.

Signed-off-by: Jinank Jain <jinankjain@microsoft.com>

show more ...

hypervisor: Fix boot failure on SNP guest

Current version can't boot a SNP guest while using
more than one VCPU. It turns out that there is an
issue in the Snp AP creation process. We should be writ

hypervisor: Fix boot failure on SNP guest

Current version can't boot a SNP guest while using
more than one VCPU. It turns out that there is an
issue in the Snp AP creation process. We should be writing
to Software exitinfo1 instead of exitinfo2. This patch fixes
the issue and we can boot multi vcpu SNP guest.

Signed-off-by: Muminul Islam <muislam@microsoft.com>

show more ...

vmm: hypervisor: Add support for injecting NMI for MSHV guest

Currently, we only support injecting NMI for KVM guests but we can do
the same for MSHV guests as well to have feature parity.

Signed-o

vmm: hypervisor: Add support for injecting NMI for MSHV guest

Currently, we only support injecting NMI for KVM guests but we can do
the same for MSHV guests as well to have feature parity.

Signed-off-by: Jinank Jain <jinankjain@microsoft.com>

show more ...

hypervisor: mshv: Add support to handle GPA Attribute Intercept

Microsoft Hypervisor raises this request to change the guest page
visibility in case of SEV-SNP guest.

Signed-off-by: Jinank Jain <ji

hypervisor: mshv: Add support to handle GPA Attribute Intercept

Microsoft Hypervisor raises this request to change the guest page
visibility in case of SEV-SNP guest.

Signed-off-by: Jinank Jain <jinankjain@microsoft.com>
Signed-off-by: Nuno Das Neves <nudasnev@microsoft.com>

show more ...

vmm: support injecting NMI

Inject NMI interrupt when needed, by call ioctl KVM_NMI.

Signed-off-by: Yi Wang <foxywang@tencent.com>

hypervisor: mshv: Don't unregister ioevent in case of SEV-SNP guest

Since we don't register ioevents in case of SEV-SNP guests. Thus, we
should not unregister it as well.

Signed-off-by: Jinank Jain

hypervisor: mshv: Don't unregister ioevent in case of SEV-SNP guest

Since we don't register ioevents in case of SEV-SNP guests. Thus, we
should not unregister it as well.

Signed-off-by: Jinank Jain <jinankjain@microsoft.com>

show more ...

misc: Remove redundant "use" imports

With the nightly toolchain (2024-02-18) cargo check will flag up
redundant imports either because they are pulled in by the prelude on
earlier match.

Remove tho

misc: Remove redundant "use" imports

With the nightly toolchain (2024-02-18) cargo check will flag up
redundant imports either because they are pulled in by the prelude on
earlier match.

Remove those redundant imports.

Signed-off-by: Rob Bradford <rbradford@rivosinc.com>

show more ...

hypervisor: Do not register ioevent for SEV-SNP

... enabled VMs. IOEvents are not supported in case of SEV-SNP VMs. All
the IO events are delievered via GHCB protocol.

Signed-off-by: Jinank Jain <j

hypervisor: Do not register ioevent for SEV-SNP

... enabled VMs. IOEvents are not supported in case of SEV-SNP VMs. All
the IO events are delievered via GHCB protocol.

Signed-off-by: Jinank Jain <jinankjain@microsoft.com>
Signed-off-by: Muminul Islam <muislam@microsoft.com>

show more ...

hypervisor: Add a flag to identify sev-snp VM

This will help in identify whether a VM supports sev-snp and based on
that disable/enable certain features.

Signed-off-by: Jinank Jain <jinankjain@micr

hypervisor: Add a flag to identify sev-snp VM

This will help in identify whether a VM supports sev-snp and based on
that disable/enable certain features.

Signed-off-by: Jinank Jain <jinankjain@microsoft.com>
Signed-off-by: Muminul Islam <muislam@microsoft.com>

show more ...

hypervisor: mshv: Add new memory region flag

GPA_MAP_ADJUSTABLE suggests hypervisor to adjust GPA permissions as
required.

Signed-off-by: Jinank Jain <jinankjain@microsoft.com>

hypervisor: mshv: Add support to handle unaccepted GPA

Unaccepted GPA is usually thrown by Microsoft hypervisor in case of
mismatch between GPA and GVA mappings. This is a fatal message from the
hyp

hypervisor: mshv: Add support to handle unaccepted GPA

Unaccepted GPA is usually thrown by Microsoft hypervisor in case of
mismatch between GPA and GVA mappings. This is a fatal message from the
hypervisor perspective so we would need to error out from the vcpu run
loop. Along with add some debug message to identify the broken mapping
between GVA and GPA.

Signed-off-by: Jinank Jain <jinankjain@microsoft.com>
Signed-off-by: Muminul Islam <muislam@microsoft.com>

show more ...

build: Bump vmm-sys-util crate and its consumers

This patch bumps the following crates, including `kvm-bindings@0.7.0`*,
`kvm-ioctls@0.16.0`**, `linux-loader@0.11.0`, `versionize@0.2.0`,
`versionize

build: Bump vmm-sys-util crate and its consumers

This patch bumps the following crates, including `kvm-bindings@0.7.0`*,
`kvm-ioctls@0.16.0`**, `linux-loader@0.11.0`, `versionize@0.2.0`,
`versionize_derive@0.1.6`***, `vhost@0.10.0`,
`vhost-user-backend@0.13.1`, `virtio-queue@0.11.0`, `vm-memory@0.14.0`,
`vmm-sys-util@0.12.1`, and the latest of `vfio-bindings`, `vfio-ioctls`,
`mshv-bindings`,`mshv-ioctls`, and `vfio-user`.

* A fork of the `kvm-bindings` crate is being used to support
serialization of various structs for migration [1]. Also, code changes
are made to accommodate the updated `struct xsave` from the Linux
kernel. Note: these changes related to `struct xsave` break
live-upgrade.

** The new `kvm-ioctls` crate introduced breaking changes for
the `get/set_one_reg` API on `aarch64` [2], so code changes are made to
the new APIs.

*** A fork of the `versionize_derive` crate is being used to support
versionize on packed structs [3].

[1] https://github.com/cloud-hypervisor/kvm-bindings/tree/ch-v0.7.0
[2] https://github.com/rust-vmm/kvm-ioctls/pull/223
[3] https://github.com/cloud-hypervisor/versionize_derive/tree/ch-0.1.6

Fixes: #6072

Signed-off-by: Bo Chen <chen.bo@intel.com>

show more ...

hypervisor: Add api to set sev control register

This register configures the SEV feature control
state on a virtual processor.

Signed-off-by: Jinank Jain <jinankjain@microsoft.com>
Signed-off-by: M

hypervisor: Add api to set sev control register

This register configures the SEV feature control
state on a virtual processor.

Signed-off-by: Jinank Jain <jinankjain@microsoft.com>
Signed-off-by: Muminul Islam <muislam@microsoft.com>

show more ...

hypervisor: kvm: Import TDX vmcall structure

Consistent with the other data structures and constants used in TDX
support code import the necessary structures from the kernel for
accessing the vmcall

hypervisor: kvm: Import TDX vmcall structure

Consistent with the other data structures and constants used in TDX
support code import the necessary structures from the kernel for
accessing the vmcall structure.

Signed-off-by: Rob Bradford <rbradford@rivosinc.com>

show more ...

hypervisor: use right size of host_data

Use right and exact size 32 bytes for host data field
for completing the isolated import. This way OOB
can be avoided during a function call.

Signed-off-by:

hypervisor: use right size of host_data

Use right and exact size 32 bytes for host data field
for completing the isolated import. This way OOB
can be avoided during a function call.

Signed-off-by: Muminul Islam <muislam@microsoft.com>

show more ...

hypervisor: fix few typos and cosmetic issues

This patch adds missing new lines after functions,
fixes few typos in the comments, adds few missing
comments to SNP related functions.

Signed-off-by:

hypervisor: fix few typos and cosmetic issues

This patch adds missing new lines after functions,
fixes few typos in the comments, adds few missing
comments to SNP related functions.

Signed-off-by: Muminul Islam <muislam@microsoft.com>

show more ...

hypervisor: Add api to retrieve CPUID leaf

Add necessary API to retrieve cpuid leaf on MSHV.
This API is used to update cpuid information
during the parsing of the igvm file.

Microsoft hypervisor d

hypervisor: Add api to retrieve CPUID leaf

Add necessary API to retrieve cpuid leaf on MSHV.
This API is used to update cpuid information
during the parsing of the igvm file.

Microsoft hypervisor does not provide common
CpuID like KVM. That's why we need to call this API
during the IGVM parsing.

Signed-off-by: Muminul Islam <muislam@microsoft.com>

show more ...