hypervisor: Implement fmt::Display for CpuIdEntry

Signed-off-by: Rob Bradford <rbradford@rivosinc.com>

hypervisor: introduce an mshv_emulator feature

This will become useful when we build the fuzzing target for the
instruction emulator, because there is no need to pull in the rest of
the hypervisor c

hypervisor: introduce an mshv_emulator feature

This will become useful when we build the fuzzing target for the
instruction emulator, because there is no need to pull in the rest of
the hypervisor crate in that situation.

Signed-off-by: Wei Liu <liuwe@microsoft.com>

show more ...

misc: Adapt consistent import style formatting

Historically the Cloud Hypervisor coding style has been to ensure that
all imports are ordered and placed in a single group. Unfortunately
cargo fmt ha

misc: Adapt consistent import style formatting

Historically the Cloud Hypervisor coding style has been to ensure that
all imports are ordered and placed in a single group. Unfortunately
cargo fmt has no support for ensuring that all imports are in a single
group so if whitespace lines were added as part of the import statements
then they would only be odered correctly in the group.

By adopting "group_imports="StdExternalCrate" we can enforce a style
where imports are placed in at most three groups for std, external
crates and the crate itself. Choosing a style enforceable by the tooling
reduces the reviewer burden.

Signed-off-by: Rob Bradford <rbradford@rivosinc.com>

show more ...

hypervisor: Switch to use the new StandardRegisters

With this we are removing the CloudHypervisor definition of
StandardRegisters instead using an enum which contains different
variants of StandardR

hypervisor: Switch to use the new StandardRegisters

With this we are removing the CloudHypervisor definition of
StandardRegisters instead using an enum which contains different
variants of StandardRegisters coming from their bindigs crate.

Signed-off-by: Jinank Jain <jinankjain@microsoft.com>

show more ...

hypervisor: Remove derivations conditional on non-existant feature

The "with-serde" feature does not exist so these [#derive(..)]
statements are never compiled in.

Signed-off-by: Rob Bradford <rbra

hypervisor: Remove derivations conditional on non-existant feature

The "with-serde" feature does not exist so these [#derive(..)]
statements are never compiled in.

Signed-off-by: Rob Bradford <rbradford@rivosinc.com>

show more ...

build: Bump vmm-sys-util crate and its consumers

This patch bumps the following crates, including `kvm-bindings@0.7.0`*,
`kvm-ioctls@0.16.0`**, `linux-loader@0.11.0`, `versionize@0.2.0`,
`versionize

build: Bump vmm-sys-util crate and its consumers

This patch bumps the following crates, including `kvm-bindings@0.7.0`*,
`kvm-ioctls@0.16.0`**, `linux-loader@0.11.0`, `versionize@0.2.0`,
`versionize_derive@0.1.6`***, `vhost@0.10.0`,
`vhost-user-backend@0.13.1`, `virtio-queue@0.11.0`, `vm-memory@0.14.0`,
`vmm-sys-util@0.12.1`, and the latest of `vfio-bindings`, `vfio-ioctls`,
`mshv-bindings`,`mshv-ioctls`, and `vfio-user`.

* A fork of the `kvm-bindings` crate is being used to support
serialization of various structs for migration [1]. Also, code changes
are made to accommodate the updated `struct xsave` from the Linux
kernel. Note: these changes related to `struct xsave` break
live-upgrade.

** The new `kvm-ioctls` crate introduced breaking changes for
the `get/set_one_reg` API on `aarch64` [2], so code changes are made to
the new APIs.

*** A fork of the `versionize_derive` crate is being used to support
versionize on packed structs [3].

[1] https://github.com/cloud-hypervisor/kvm-bindings/tree/ch-v0.7.0
[2] https://github.com/rust-vmm/kvm-ioctls/pull/223
[3] https://github.com/cloud-hypervisor/versionize_derive/tree/ch-0.1.6

Fixes: #6072

Signed-off-by: Bo Chen <chen.bo@intel.com>

show more ...

hypervisor: x86: Emulator is only needed on `mshv`, not `kvm`

On x86-64, when the underlying hypervisor platform is KVM, no
instruction emulator is necessary. KVM handles instruction boundaries
inte

hypervisor: x86: Emulator is only needed on `mshv`, not `kvm`

On x86-64, when the underlying hypervisor platform is KVM, no
instruction emulator is necessary. KVM handles instruction boundaries
internally.

This change allows to skip the iced-x86 dependency on KVM, improving
build times, prunes the dependency graph and reduces network traffic
during the initial build.

For Hyper-V, the emulator is still necessary on x86-64, so nothing
changes there.

Signed-off-by: Christian Blichmann <cblichmann@google.com>

show more ...

misc: Remove unnecessary clippy directives

Clippy passes fine without these.

Signed-off-by: Rafael Mendonca <rafaelmendsr@gmail.com>

hypervisor: x86: add two safety comments

Signed-off-by: Wei Liu <liuwe@microsoft.com>

hypervisor: use serde_with with LapicState

Drop the hand-rolled serializer and deserializer.

Signed-off-by: Wei Liu <liuwe@microsoft.com>

hypervisor: simplify LapicState

Both KVM and MSHV share the same layout. We can drop one level of
indirection.

Signed-off-by: Wei Liu <liuwe@microsoft.com>

tree-wide: drop some unneeded allow clauses

Signed-off-by: Wei Liu <liuwe@microsoft.com>

hypervisor: x86: provide a generic MsrEntry structure

Signed-off-by: Wei Liu <liuwe@microsoft.com>

hypervisor x86: provide a generic LapicState structure

This requires making get/set_lapic_reg part of the type.

For the moment we cannot provide a default variant for the new type,
because picking

hypervisor x86: provide a generic LapicState structure

This requires making get/set_lapic_reg part of the type.

For the moment we cannot provide a default variant for the new type,
because picking one will be wrong for the other hypervisor, so I just
drop the test cases that requires LapicState::default().

Signed-off-by: Wei Liu <liuwe@microsoft.com>

show more ...

hypervisor: provide a generic FpuState structure

Signed-off-by: Wei Liu <liuwe@microsoft.com>

hypervisor: provide a generic CpudIdEntry structure

Signed-off-by: Wei Liu <liuwe@microsoft.com>

hypervisor: x86: provide a generic SpecialRegisters structure

Signed-off-by: Wei Liu <liuwe@microsoft.com>

hypervisor: x86: provide a generic DescriptorTable structure

Signed-off-by: Wei Liu <liuwe@microsoft.com>

hypervisor: x86: provide a generic SegmentRegister structure

And drop SegmentRegisterOps since it is no longer required.

Signed-off-by: Wei Liu <liuwe@microsoft.com>

hypervisor: x86: provide a generic StandardRegisters structure

We only need to do this for x86 since MSHV does not have aarch64 support
yet. This reduces unnecessary code churn.

Signed-off-by: Wei

hypervisor: x86: provide a generic StandardRegisters structure

We only need to do this for x86 since MSHV does not have aarch64 support
yet. This reduces unnecessary code churn.

Signed-off-by: Wei Liu <liuwe@microsoft.com>

show more ...

hypervisor: Address Rust 1.51.0 clippy issue (upper_case_acroynms)

warning: name `TranslateGVA` contains a capitalized acronym
--> hypervisor/src/arch/emulator/mod.rs:51:5
|
51 | TranslateG

hypervisor: Address Rust 1.51.0 clippy issue (upper_case_acroynms)

warning: name `TranslateGVA` contains a capitalized acronym
--> hypervisor/src/arch/emulator/mod.rs:51:5
|
51 | TranslateGVA(#[source] anyhow::Error),
| ^^^^^^^^^^^^ help: consider making the acronym lowercase, except the initial letter: `TranslateGva`
|
= note: `#[warn(clippy::upper_case_acronyms)]` on by default
= help: for further information visit https://rust-lang.github.io/rust-clippy/master/index.html#upper_case_acronyms

Signed-off-by: Rob Bradford <robert.bradford@intel.com>

show more ...

arch, arch_gen, hypervisor: Remove some unnecessary clippy attributes

Signed-off-by: Rob Bradford <robert.bradford@intel.com>

hypervisor: fix exception vector numbers

According to Intel SDM, #DE should be 0 and #DB should be 1.

Signed-off-by: Wei Liu <liuwe@microsoft.com>

hypervisor: Move msr and msr_data macro to arch/x86

Currently these two macros(msr, msr_data) reside both on kvm and mshv
module. Definition is same for both module. Moving them to arch/x86
module e

hypervisor: Move msr and msr_data macro to arch/x86

Currently these two macros(msr, msr_data) reside both on kvm and mshv
module. Definition is same for both module. Moving them to arch/x86
module eliminates redundancy and makes more sense.

Signed-off-by: Muminul Islam <muislam@microsoft.com>

show more ...

hypervisor: x86: Add a SegmentRegistorOps trait

In order to validate emulated memory accesses, we need to be able to get
all the segments descriptor attributes.

This is done by abstracting the Segm

hypervisor: x86: Add a SegmentRegistorOps trait

In order to validate emulated memory accesses, we need to be able to get
all the segments descriptor attributes.

This is done by abstracting the SegmentRegister attributes through a
trait that each hypervisor will have to implement.

Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>

show more ...