1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 2006 IronPort Systems
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28 /*-
29 * Copyright (c) 2007 LSI Corp.
30 * Copyright (c) 2007 Rajesh Prabhakaran.
31 * All rights reserved.
32 *
33 * Redistribution and use in source and binary forms, with or without
34 * modification, are permitted provided that the following conditions
35 * are met:
36 * 1. Redistributions of source code must retain the above copyright
37 * notice, this list of conditions and the following disclaimer.
38 * 2. Redistributions in binary form must reproduce the above copyright
39 * notice, this list of conditions and the following disclaimer in the
40 * documentation and/or other materials provided with the distribution.
41 *
42 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
43 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
44 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
45 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
46 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
47 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
48 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
49 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
50 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
51 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
52 * SUCH DAMAGE.
53 */
54
55 #include <sys/cdefs.h>
56 /* PCI/PCI-X/PCIe bus interface for the LSI MegaSAS controllers */
57
58 #include "opt_mfi.h"
59
60 #include <sys/param.h>
61 #include <sys/bio.h>
62 #include <sys/bus.h>
63 #include <sys/conf.h>
64 #include <sys/eventhandler.h>
65 #include <sys/kernel.h>
66 #include <sys/lock.h>
67 #include <sys/module.h>
68 #include <sys/malloc.h>
69 #include <sys/mutex.h>
70 #include <sys/selinfo.h>
71 #include <sys/sysctl.h>
72 #include <sys/systm.h>
73 #include <sys/uio.h>
74
75 #include <machine/bus.h>
76 #include <machine/resource.h>
77 #include <sys/rman.h>
78
79 #include <dev/pci/pcireg.h>
80 #include <dev/pci/pcivar.h>
81
82 #include <dev/mfi/mfireg.h>
83 #include <dev/mfi/mfi_ioctl.h>
84 #include <dev/mfi/mfivar.h>
85
86 static int mfi_pci_probe(device_t);
87 static int mfi_pci_attach(device_t);
88 static int mfi_pci_detach(device_t);
89 static int mfi_pci_suspend(device_t);
90 static int mfi_pci_resume(device_t);
91 static void mfi_pci_free(struct mfi_softc *);
92
93 static device_method_t mfi_methods[] = {
94 DEVMETHOD(device_probe, mfi_pci_probe),
95 DEVMETHOD(device_attach, mfi_pci_attach),
96 DEVMETHOD(device_detach, mfi_pci_detach),
97 DEVMETHOD(device_suspend, mfi_pci_suspend),
98 DEVMETHOD(device_resume, mfi_pci_resume),
99
100 DEVMETHOD_END
101 };
102
103 static driver_t mfi_pci_driver = {
104 "mfi",
105 mfi_methods,
106 sizeof(struct mfi_softc)
107 };
108
109 static int mfi_msi = 1;
110 SYSCTL_INT(_hw_mfi, OID_AUTO, msi, CTLFLAG_RDTUN, &mfi_msi, 0,
111 "Enable use of MSI interrupts");
112
113 static int mfi_mrsas_enable;
114 SYSCTL_INT(_hw_mfi, OID_AUTO, mrsas_enable, CTLFLAG_RDTUN, &mfi_mrsas_enable,
115 0, "Allow mrsas to take newer cards");
116
117 struct mfi_ident {
118 uint16_t vendor;
119 uint16_t device;
120 uint16_t subvendor;
121 uint16_t subdevice;
122 int flags;
123 const char *desc;
124 } mfi_identifiers[] = {
125 {0x1000, 0x005b, 0x1028, 0x1fc9, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Dell PERC H840 Adapter"},
126 {0x1000, 0x005b, 0x1028, 0x1f2d, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Dell PERC H810 Adapter"},
127 {0x1000, 0x005b, 0x1028, 0x1f30, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Dell PERC H710 Embedded"},
128 {0x1000, 0x005b, 0x1028, 0x1f31, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Dell PERC H710P Adapter"},
129 {0x1000, 0x005b, 0x1028, 0x1f33, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Dell PERC H710P Mini (blades)"},
130 {0x1000, 0x005b, 0x1028, 0x1f34, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Dell PERC H710P Mini (monolithics)"},
131 {0x1000, 0x005b, 0x1028, 0x1f35, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Dell PERC H710 Adapter"},
132 {0x1000, 0x005b, 0x1028, 0x1f37, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Dell PERC H710 Mini (blades)"},
133 {0x1000, 0x005b, 0x1028, 0x1f38, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Dell PERC H710 Mini (monolithics)"},
134 {0x1000, 0x005b, 0x1734, 0x11d3, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Fujitsu RAID Controller SAS 6Gbit/s 1GB (D3116)"},
135 {0x1000, 0x005b, 0x8086, 0x9265, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Intel (R) RAID Controller RS25DB080"},
136 {0x1000, 0x005b, 0x8086, 0x9285, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Intel (R) RAID Controller RS25NB008"},
137 {0x1000, 0x005b, 0xffff, 0xffff, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "ThunderBolt"},
138 {0x1000, 0x005d, 0xffff, 0xffff, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS| MFI_FLAGS_INVADER, "Invader"},
139 {0x1000, 0x005f, 0xffff, 0xffff, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS| MFI_FLAGS_FURY, "Fury"},
140 {0x1000, 0x0060, 0x1028, 0xffff, MFI_FLAGS_1078, "Dell PERC 6"},
141 {0x1000, 0x0060, 0xffff, 0xffff, MFI_FLAGS_1078, "LSI MegaSAS 1078"},
142 {0x1000, 0x0071, 0xffff, 0xffff, MFI_FLAGS_SKINNY, "Drake Skinny"},
143 {0x1000, 0x0073, 0xffff, 0xffff, MFI_FLAGS_SKINNY, "Drake Skinny"},
144 {0x1000, 0x0078, 0xffff, 0xffff, MFI_FLAGS_GEN2, "LSI MegaSAS Gen2"},
145 {0x1000, 0x0079, 0x1028, 0x1f15, MFI_FLAGS_GEN2, "Dell PERC H800 Adapter"},
146 {0x1000, 0x0079, 0x1028, 0x1f16, MFI_FLAGS_GEN2, "Dell PERC H700 Adapter"},
147 {0x1000, 0x0079, 0x1028, 0x1f17, MFI_FLAGS_GEN2, "Dell PERC H700 Integrated"},
148 {0x1000, 0x0079, 0x1028, 0x1f18, MFI_FLAGS_GEN2, "Dell PERC H700 Modular"},
149 {0x1000, 0x0079, 0x1028, 0x1f19, MFI_FLAGS_GEN2, "Dell PERC H700"},
150 {0x1000, 0x0079, 0x1028, 0x1f1a, MFI_FLAGS_GEN2, "Dell PERC H800 Proto Adapter"},
151 {0x1000, 0x0079, 0x1028, 0x1f1b, MFI_FLAGS_GEN2, "Dell PERC H800"},
152 {0x1000, 0x0079, 0x1028, 0xffff, MFI_FLAGS_GEN2, "Dell PERC Gen2"},
153 {0x1000, 0x0079, 0xffff, 0xffff, MFI_FLAGS_GEN2, "LSI MegaSAS Gen2"},
154 {0x1000, 0x007c, 0xffff, 0xffff, MFI_FLAGS_1078, "LSI MegaSAS 1078"},
155 {0x1000, 0x0411, 0xffff, 0xffff, MFI_FLAGS_1064R, "LSI MegaSAS 1064R"}, /* Brocton IOP */
156 {0x1000, 0x0413, 0xffff, 0xffff, MFI_FLAGS_1064R, "LSI MegaSAS 1064R"}, /* Verde ZCR */
157 {0x1028, 0x0015, 0xffff, 0xffff, MFI_FLAGS_1064R, "Dell PERC 5/i"},
158 {0, 0, 0, 0, 0, NULL}
159 };
160
161 DRIVER_MODULE(mfi, pci, mfi_pci_driver, 0, 0);
162 MODULE_PNP_INFO("U16:vendor;U16:device;U16:subvendor;U16:subdevice", pci, mfi,
163 mfi_identifiers, nitems(mfi_identifiers) - 1);
164 MODULE_VERSION(mfi, 1);
165
166 static struct mfi_ident *
mfi_find_ident(device_t dev)167 mfi_find_ident(device_t dev)
168 {
169 struct mfi_ident *m;
170
171 for (m = mfi_identifiers; m->vendor != 0; m++) {
172 if ((m->vendor == pci_get_vendor(dev)) &&
173 (m->device == pci_get_device(dev)) &&
174 ((m->subvendor == pci_get_subvendor(dev)) ||
175 (m->subvendor == 0xffff)) &&
176 ((m->subdevice == pci_get_subdevice(dev)) ||
177 (m->subdevice == 0xffff)))
178 return (m);
179 }
180
181 return (NULL);
182 }
183
184 static int
mfi_pci_probe(device_t dev)185 mfi_pci_probe(device_t dev)
186 {
187 struct mfi_ident *id;
188
189 if ((id = mfi_find_ident(dev)) != NULL) {
190 device_set_desc(dev, id->desc);
191
192 /* give priority to mrsas if tunable set */
193 if ((id->flags & MFI_FLAGS_MRSAS) && mfi_mrsas_enable)
194 return (BUS_PROBE_LOW_PRIORITY);
195 else
196 return (BUS_PROBE_DEFAULT);
197 }
198 return (ENXIO);
199 }
200
201 static int
mfi_pci_attach(device_t dev)202 mfi_pci_attach(device_t dev)
203 {
204 struct mfi_softc *sc;
205 struct mfi_ident *m;
206 int count, error;
207
208 sc = device_get_softc(dev);
209 bzero(sc, sizeof(*sc));
210 sc->mfi_dev = dev;
211 m = mfi_find_ident(dev);
212 sc->mfi_flags = m->flags;
213
214 /* Ensure busmastering is enabled */
215 pci_enable_busmaster(dev);
216
217 /* Allocate PCI registers */
218 if ((sc->mfi_flags & MFI_FLAGS_1064R) ||
219 (sc->mfi_flags & MFI_FLAGS_1078)) {
220 /* 1068/1078: Memory mapped BAR is at offset 0x10 */
221 sc->mfi_regs_rid = PCIR_BAR(0);
222 }
223 else if ((sc->mfi_flags & MFI_FLAGS_GEN2) ||
224 (sc->mfi_flags & MFI_FLAGS_SKINNY) ||
225 (sc->mfi_flags & MFI_FLAGS_TBOLT)) {
226 /* Gen2/Skinny: Memory mapped BAR is at offset 0x14 */
227 sc->mfi_regs_rid = PCIR_BAR(1);
228 }
229 if ((sc->mfi_regs_resource = bus_alloc_resource_any(sc->mfi_dev,
230 SYS_RES_MEMORY, &sc->mfi_regs_rid, RF_ACTIVE)) == NULL) {
231 device_printf(dev, "Cannot allocate PCI registers\n");
232 return (ENXIO);
233 }
234 sc->mfi_btag = rman_get_bustag(sc->mfi_regs_resource);
235 sc->mfi_bhandle = rman_get_bushandle(sc->mfi_regs_resource);
236
237 error = ENOMEM;
238
239 /* Allocate parent DMA tag */
240 if (bus_dma_tag_create( bus_get_dma_tag(dev), /* PCI parent */
241 1, 0, /* algnmnt, boundary */
242 BUS_SPACE_MAXADDR, /* lowaddr */
243 BUS_SPACE_MAXADDR, /* highaddr */
244 NULL, NULL, /* filter, filterarg */
245 BUS_SPACE_MAXSIZE_32BIT,/* maxsize */
246 BUS_SPACE_UNRESTRICTED, /* nsegments */
247 BUS_SPACE_MAXSIZE_32BIT,/* maxsegsize */
248 0, /* flags */
249 NULL, NULL, /* lockfunc, lockarg */
250 &sc->mfi_parent_dmat)) {
251 device_printf(dev, "Cannot allocate parent DMA tag\n");
252 goto out;
253 }
254
255 /* Allocate IRQ resource. */
256 sc->mfi_irq_rid = 0;
257 count = 1;
258 if (mfi_msi && pci_alloc_msi(sc->mfi_dev, &count) == 0) {
259 device_printf(sc->mfi_dev, "Using MSI\n");
260 sc->mfi_irq_rid = 1;
261 }
262 if ((sc->mfi_irq = bus_alloc_resource_any(sc->mfi_dev, SYS_RES_IRQ,
263 &sc->mfi_irq_rid, RF_SHAREABLE | RF_ACTIVE)) == NULL) {
264 device_printf(sc->mfi_dev, "Cannot allocate interrupt\n");
265 error = EINVAL;
266 goto out;
267 }
268
269 error = mfi_attach(sc);
270 out:
271 if (error) {
272 mfi_free(sc);
273 mfi_pci_free(sc);
274 }
275
276 return (error);
277 }
278
279 static int
mfi_pci_detach(device_t dev)280 mfi_pci_detach(device_t dev)
281 {
282 struct mfi_softc *sc;
283 int error;
284
285 sc = device_get_softc(dev);
286
287 sx_xlock(&sc->mfi_config_lock);
288 mtx_lock(&sc->mfi_io_lock);
289 if ((sc->mfi_flags & MFI_FLAGS_OPEN) != 0) {
290 mtx_unlock(&sc->mfi_io_lock);
291 sx_xunlock(&sc->mfi_config_lock);
292 return (EBUSY);
293 }
294 sc->mfi_detaching = 1;
295 mtx_unlock(&sc->mfi_io_lock);
296
297 error = bus_generic_detach(sc->mfi_dev);
298 if (error != 0) {
299 sx_xunlock(&sc->mfi_config_lock);
300 return error;
301 }
302 sx_xunlock(&sc->mfi_config_lock);
303
304 EVENTHANDLER_DEREGISTER(shutdown_final, sc->mfi_eh);
305
306 mfi_shutdown(sc);
307 mfi_free(sc);
308 mfi_pci_free(sc);
309 return (0);
310 }
311
312 static void
mfi_pci_free(struct mfi_softc * sc)313 mfi_pci_free(struct mfi_softc *sc)
314 {
315
316 if (sc->mfi_regs_resource != NULL) {
317 bus_release_resource(sc->mfi_dev, SYS_RES_MEMORY,
318 sc->mfi_regs_rid, sc->mfi_regs_resource);
319 }
320 if (sc->mfi_irq_rid != 0)
321 pci_release_msi(sc->mfi_dev);
322
323 return;
324 }
325
326 static int
mfi_pci_suspend(device_t dev)327 mfi_pci_suspend(device_t dev)
328 {
329
330 return (EINVAL);
331 }
332
333 static int
mfi_pci_resume(device_t dev)334 mfi_pci_resume(device_t dev)
335 {
336
337 return (EINVAL);
338 }
339