1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2019-2020 Realtek Corporation
3 */
4
5 #if defined(__FreeBSD__)
6 #define LINUXKPI_PARAM_PREFIX rtw89_
7 #endif
8
9 #include <linux/ip.h>
10 #include <linux/sort.h>
11 #include <linux/udp.h>
12
13 #include "cam.h"
14 #include "chan.h"
15 #include "coex.h"
16 #include "core.h"
17 #include "efuse.h"
18 #include "fw.h"
19 #include "mac.h"
20 #include "phy.h"
21 #include "ps.h"
22 #include "reg.h"
23 #include "sar.h"
24 #include "ser.h"
25 #include "txrx.h"
26 #include "util.h"
27 #include "wow.h"
28
29 static bool rtw89_disable_ps_mode;
30 module_param_named(disable_ps_mode, rtw89_disable_ps_mode, bool, 0644);
31 MODULE_PARM_DESC(disable_ps_mode, "Set Y to disable low power mode");
32
33 #if defined(__FreeBSD__)
34 static bool rtw_ht_support = false;
35 module_param_named(support_ht, rtw_ht_support, bool, 0644);
36 MODULE_PARM_DESC(support_ht, "Set to Y to enable HT support");
37
38 static bool rtw_vht_support = false;
39 module_param_named(support_vht, rtw_vht_support, bool, 0644);
40 MODULE_PARM_DESC(support_vht, "Set to Y to enable VHT support");
41
42 static bool rtw_eht_support = false;
43 module_param_named(support_eht, rtw_eht_support, bool, 0644);
44 MODULE_PARM_DESC(support_eht, "Set to Y to enable EHT support");
45 #endif
46
47
48 #define RTW89_DEF_CHAN(_freq, _hw_val, _flags, _band) \
49 { .center_freq = _freq, .hw_value = _hw_val, .flags = _flags, .band = _band, }
50 #define RTW89_DEF_CHAN_2G(_freq, _hw_val) \
51 RTW89_DEF_CHAN(_freq, _hw_val, 0, NL80211_BAND_2GHZ)
52 #define RTW89_DEF_CHAN_5G(_freq, _hw_val) \
53 RTW89_DEF_CHAN(_freq, _hw_val, 0, NL80211_BAND_5GHZ)
54 #define RTW89_DEF_CHAN_5G_NO_HT40MINUS(_freq, _hw_val) \
55 RTW89_DEF_CHAN(_freq, _hw_val, IEEE80211_CHAN_NO_HT40MINUS, NL80211_BAND_5GHZ)
56 #define RTW89_DEF_CHAN_6G(_freq, _hw_val) \
57 RTW89_DEF_CHAN(_freq, _hw_val, 0, NL80211_BAND_6GHZ)
58
59 static struct ieee80211_channel rtw89_channels_2ghz[] = {
60 RTW89_DEF_CHAN_2G(2412, 1),
61 RTW89_DEF_CHAN_2G(2417, 2),
62 RTW89_DEF_CHAN_2G(2422, 3),
63 RTW89_DEF_CHAN_2G(2427, 4),
64 RTW89_DEF_CHAN_2G(2432, 5),
65 RTW89_DEF_CHAN_2G(2437, 6),
66 RTW89_DEF_CHAN_2G(2442, 7),
67 RTW89_DEF_CHAN_2G(2447, 8),
68 RTW89_DEF_CHAN_2G(2452, 9),
69 RTW89_DEF_CHAN_2G(2457, 10),
70 RTW89_DEF_CHAN_2G(2462, 11),
71 RTW89_DEF_CHAN_2G(2467, 12),
72 RTW89_DEF_CHAN_2G(2472, 13),
73 RTW89_DEF_CHAN_2G(2484, 14),
74 };
75
76 static struct ieee80211_channel rtw89_channels_5ghz[] = {
77 RTW89_DEF_CHAN_5G(5180, 36),
78 RTW89_DEF_CHAN_5G(5200, 40),
79 RTW89_DEF_CHAN_5G(5220, 44),
80 RTW89_DEF_CHAN_5G(5240, 48),
81 RTW89_DEF_CHAN_5G(5260, 52),
82 RTW89_DEF_CHAN_5G(5280, 56),
83 RTW89_DEF_CHAN_5G(5300, 60),
84 RTW89_DEF_CHAN_5G(5320, 64),
85 RTW89_DEF_CHAN_5G(5500, 100),
86 RTW89_DEF_CHAN_5G(5520, 104),
87 RTW89_DEF_CHAN_5G(5540, 108),
88 RTW89_DEF_CHAN_5G(5560, 112),
89 RTW89_DEF_CHAN_5G(5580, 116),
90 RTW89_DEF_CHAN_5G(5600, 120),
91 RTW89_DEF_CHAN_5G(5620, 124),
92 RTW89_DEF_CHAN_5G(5640, 128),
93 RTW89_DEF_CHAN_5G(5660, 132),
94 RTW89_DEF_CHAN_5G(5680, 136),
95 RTW89_DEF_CHAN_5G(5700, 140),
96 RTW89_DEF_CHAN_5G(5720, 144),
97 RTW89_DEF_CHAN_5G(5745, 149),
98 RTW89_DEF_CHAN_5G(5765, 153),
99 RTW89_DEF_CHAN_5G(5785, 157),
100 RTW89_DEF_CHAN_5G(5805, 161),
101 RTW89_DEF_CHAN_5G_NO_HT40MINUS(5825, 165),
102 RTW89_DEF_CHAN_5G(5845, 169),
103 RTW89_DEF_CHAN_5G(5865, 173),
104 RTW89_DEF_CHAN_5G(5885, 177),
105 };
106
107 static_assert(RTW89_5GHZ_UNII4_START_INDEX + RTW89_5GHZ_UNII4_CHANNEL_NUM ==
108 ARRAY_SIZE(rtw89_channels_5ghz));
109
110 static struct ieee80211_channel rtw89_channels_6ghz[] = {
111 RTW89_DEF_CHAN_6G(5955, 1),
112 RTW89_DEF_CHAN_6G(5975, 5),
113 RTW89_DEF_CHAN_6G(5995, 9),
114 RTW89_DEF_CHAN_6G(6015, 13),
115 RTW89_DEF_CHAN_6G(6035, 17),
116 RTW89_DEF_CHAN_6G(6055, 21),
117 RTW89_DEF_CHAN_6G(6075, 25),
118 RTW89_DEF_CHAN_6G(6095, 29),
119 RTW89_DEF_CHAN_6G(6115, 33),
120 RTW89_DEF_CHAN_6G(6135, 37),
121 RTW89_DEF_CHAN_6G(6155, 41),
122 RTW89_DEF_CHAN_6G(6175, 45),
123 RTW89_DEF_CHAN_6G(6195, 49),
124 RTW89_DEF_CHAN_6G(6215, 53),
125 RTW89_DEF_CHAN_6G(6235, 57),
126 RTW89_DEF_CHAN_6G(6255, 61),
127 RTW89_DEF_CHAN_6G(6275, 65),
128 RTW89_DEF_CHAN_6G(6295, 69),
129 RTW89_DEF_CHAN_6G(6315, 73),
130 RTW89_DEF_CHAN_6G(6335, 77),
131 RTW89_DEF_CHAN_6G(6355, 81),
132 RTW89_DEF_CHAN_6G(6375, 85),
133 RTW89_DEF_CHAN_6G(6395, 89),
134 RTW89_DEF_CHAN_6G(6415, 93),
135 RTW89_DEF_CHAN_6G(6435, 97),
136 RTW89_DEF_CHAN_6G(6455, 101),
137 RTW89_DEF_CHAN_6G(6475, 105),
138 RTW89_DEF_CHAN_6G(6495, 109),
139 RTW89_DEF_CHAN_6G(6515, 113),
140 RTW89_DEF_CHAN_6G(6535, 117),
141 RTW89_DEF_CHAN_6G(6555, 121),
142 RTW89_DEF_CHAN_6G(6575, 125),
143 RTW89_DEF_CHAN_6G(6595, 129),
144 RTW89_DEF_CHAN_6G(6615, 133),
145 RTW89_DEF_CHAN_6G(6635, 137),
146 RTW89_DEF_CHAN_6G(6655, 141),
147 RTW89_DEF_CHAN_6G(6675, 145),
148 RTW89_DEF_CHAN_6G(6695, 149),
149 RTW89_DEF_CHAN_6G(6715, 153),
150 RTW89_DEF_CHAN_6G(6735, 157),
151 RTW89_DEF_CHAN_6G(6755, 161),
152 RTW89_DEF_CHAN_6G(6775, 165),
153 RTW89_DEF_CHAN_6G(6795, 169),
154 RTW89_DEF_CHAN_6G(6815, 173),
155 RTW89_DEF_CHAN_6G(6835, 177),
156 RTW89_DEF_CHAN_6G(6855, 181),
157 RTW89_DEF_CHAN_6G(6875, 185),
158 RTW89_DEF_CHAN_6G(6895, 189),
159 RTW89_DEF_CHAN_6G(6915, 193),
160 RTW89_DEF_CHAN_6G(6935, 197),
161 RTW89_DEF_CHAN_6G(6955, 201),
162 RTW89_DEF_CHAN_6G(6975, 205),
163 RTW89_DEF_CHAN_6G(6995, 209),
164 RTW89_DEF_CHAN_6G(7015, 213),
165 RTW89_DEF_CHAN_6G(7035, 217),
166 RTW89_DEF_CHAN_6G(7055, 221),
167 RTW89_DEF_CHAN_6G(7075, 225),
168 RTW89_DEF_CHAN_6G(7095, 229),
169 RTW89_DEF_CHAN_6G(7115, 233),
170 };
171
172 static struct ieee80211_rate rtw89_bitrates[] = {
173 { .bitrate = 10, .hw_value = 0x00, },
174 { .bitrate = 20, .hw_value = 0x01, },
175 { .bitrate = 55, .hw_value = 0x02, },
176 { .bitrate = 110, .hw_value = 0x03, },
177 { .bitrate = 60, .hw_value = 0x04, },
178 { .bitrate = 90, .hw_value = 0x05, },
179 { .bitrate = 120, .hw_value = 0x06, },
180 { .bitrate = 180, .hw_value = 0x07, },
181 { .bitrate = 240, .hw_value = 0x08, },
182 { .bitrate = 360, .hw_value = 0x09, },
183 { .bitrate = 480, .hw_value = 0x0a, },
184 { .bitrate = 540, .hw_value = 0x0b, },
185 };
186
187 static const struct ieee80211_iface_limit rtw89_iface_limits[] = {
188 {
189 .max = 1,
190 .types = BIT(NL80211_IFTYPE_STATION),
191 },
192 {
193 .max = 1,
194 .types = BIT(NL80211_IFTYPE_P2P_CLIENT) |
195 BIT(NL80211_IFTYPE_P2P_GO) |
196 BIT(NL80211_IFTYPE_AP),
197 },
198 };
199
200 static const struct ieee80211_iface_limit rtw89_iface_limits_mcc[] = {
201 {
202 .max = 1,
203 .types = BIT(NL80211_IFTYPE_STATION),
204 },
205 {
206 .max = 1,
207 .types = BIT(NL80211_IFTYPE_P2P_CLIENT) |
208 BIT(NL80211_IFTYPE_P2P_GO),
209 },
210 };
211
212 static const struct ieee80211_iface_combination rtw89_iface_combs[] = {
213 {
214 .limits = rtw89_iface_limits,
215 .n_limits = ARRAY_SIZE(rtw89_iface_limits),
216 .max_interfaces = RTW89_MAX_INTERFACE_NUM,
217 .num_different_channels = 1,
218 },
219 {
220 .limits = rtw89_iface_limits_mcc,
221 .n_limits = ARRAY_SIZE(rtw89_iface_limits_mcc),
222 .max_interfaces = RTW89_MAX_INTERFACE_NUM,
223 .num_different_channels = 2,
224 },
225 };
226
227 static const u8 rtw89_ext_capa_sta[] = {
228 [0] = WLAN_EXT_CAPA1_EXT_CHANNEL_SWITCHING,
229 [2] = WLAN_EXT_CAPA3_MULTI_BSSID_SUPPORT,
230 [7] = WLAN_EXT_CAPA8_OPMODE_NOTIF,
231 };
232
233 static const struct wiphy_iftype_ext_capab rtw89_iftypes_ext_capa[] = {
234 {
235 .iftype = NL80211_IFTYPE_STATION,
236 .extended_capabilities = rtw89_ext_capa_sta,
237 .extended_capabilities_mask = rtw89_ext_capa_sta,
238 .extended_capabilities_len = sizeof(rtw89_ext_capa_sta),
239 /* relevant only if EHT is supported */
240 .eml_capabilities = 0,
241 .mld_capa_and_ops = 0,
242 },
243 };
244
245 #define RTW89_6GHZ_SPAN_HEAD 6145
246 #define RTW89_6GHZ_SPAN_IDX(center_freq) \
247 ((((int)(center_freq) - RTW89_6GHZ_SPAN_HEAD) / 5) / 2)
248
249 #define RTW89_DECL_6GHZ_SPAN(center_freq, subband_l, subband_h) \
250 [RTW89_6GHZ_SPAN_IDX(center_freq)] = { \
251 .sar_subband_low = RTW89_SAR_6GHZ_ ## subband_l, \
252 .sar_subband_high = RTW89_SAR_6GHZ_ ## subband_h, \
253 .acpi_sar_subband_low = RTW89_ACPI_SAR_6GHZ_ ## subband_l, \
254 .acpi_sar_subband_high = RTW89_ACPI_SAR_6GHZ_ ## subband_h, \
255 .ant_gain_subband_low = RTW89_ANT_GAIN_6GHZ_ ## subband_l, \
256 .ant_gain_subband_high = RTW89_ANT_GAIN_6GHZ_ ## subband_h, \
257 }
258
259 /* Since 6GHz subbands are not edge aligned, some cases span two subbands.
260 * In the following, we describe each of them with rtw89_6ghz_span.
261 */
262 static const struct rtw89_6ghz_span rtw89_overlapping_6ghz[] = {
263 RTW89_DECL_6GHZ_SPAN(6145, SUBBAND_5_L, SUBBAND_5_H),
264 RTW89_DECL_6GHZ_SPAN(6165, SUBBAND_5_L, SUBBAND_5_H),
265 RTW89_DECL_6GHZ_SPAN(6185, SUBBAND_5_L, SUBBAND_5_H),
266 RTW89_DECL_6GHZ_SPAN(6505, SUBBAND_6, SUBBAND_7_L),
267 RTW89_DECL_6GHZ_SPAN(6525, SUBBAND_6, SUBBAND_7_L),
268 RTW89_DECL_6GHZ_SPAN(6545, SUBBAND_6, SUBBAND_7_L),
269 RTW89_DECL_6GHZ_SPAN(6665, SUBBAND_7_L, SUBBAND_7_H),
270 RTW89_DECL_6GHZ_SPAN(6705, SUBBAND_7_L, SUBBAND_7_H),
271 RTW89_DECL_6GHZ_SPAN(6825, SUBBAND_7_H, SUBBAND_8),
272 RTW89_DECL_6GHZ_SPAN(6865, SUBBAND_7_H, SUBBAND_8),
273 RTW89_DECL_6GHZ_SPAN(6875, SUBBAND_7_H, SUBBAND_8),
274 RTW89_DECL_6GHZ_SPAN(6885, SUBBAND_7_H, SUBBAND_8),
275 };
276
277 const struct rtw89_6ghz_span *
rtw89_get_6ghz_span(struct rtw89_dev * rtwdev,u32 center_freq)278 rtw89_get_6ghz_span(struct rtw89_dev *rtwdev, u32 center_freq)
279 {
280 int idx;
281
282 if (center_freq >= RTW89_6GHZ_SPAN_HEAD) {
283 idx = RTW89_6GHZ_SPAN_IDX(center_freq);
284 /* To decrease size of rtw89_overlapping_6ghz[],
285 * RTW89_6GHZ_SPAN_IDX() truncates the leading NULLs
286 * to make first span as index 0 of the table. So, if center
287 * frequency is less than the first one, it will get netative.
288 */
289 if (idx >= 0 && idx < ARRAY_SIZE(rtw89_overlapping_6ghz))
290 return &rtw89_overlapping_6ghz[idx];
291 }
292
293 return NULL;
294 }
295
rtw89_legacy_rate_to_bitrate(struct rtw89_dev * rtwdev,u8 legacy_rate,u16 * bitrate)296 bool rtw89_legacy_rate_to_bitrate(struct rtw89_dev *rtwdev, u8 legacy_rate, u16 *bitrate)
297 {
298 const struct ieee80211_rate *rate;
299
300 if (unlikely(legacy_rate >= ARRAY_SIZE(rtw89_bitrates))) {
301 rtw89_debug(rtwdev, RTW89_DBG_UNEXP,
302 "invalid legacy rate %d\n", legacy_rate);
303 return false;
304 }
305
306 rate = &rtw89_bitrates[legacy_rate];
307 *bitrate = rate->bitrate;
308
309 return true;
310 }
311
312 static const struct ieee80211_supported_band rtw89_sband_2ghz = {
313 .band = NL80211_BAND_2GHZ,
314 .channels = rtw89_channels_2ghz,
315 .n_channels = ARRAY_SIZE(rtw89_channels_2ghz),
316 .bitrates = rtw89_bitrates,
317 .n_bitrates = ARRAY_SIZE(rtw89_bitrates),
318 .ht_cap = {0},
319 .vht_cap = {0},
320 };
321
322 static const struct ieee80211_supported_band rtw89_sband_5ghz = {
323 .band = NL80211_BAND_5GHZ,
324 .channels = rtw89_channels_5ghz,
325 .n_channels = ARRAY_SIZE(rtw89_channels_5ghz),
326
327 /* 5G has no CCK rates, 1M/2M/5.5M/11M */
328 .bitrates = rtw89_bitrates + 4,
329 .n_bitrates = ARRAY_SIZE(rtw89_bitrates) - 4,
330 .ht_cap = {0},
331 .vht_cap = {0},
332 };
333
334 static const struct ieee80211_supported_band rtw89_sband_6ghz = {
335 .band = NL80211_BAND_6GHZ,
336 .channels = rtw89_channels_6ghz,
337 .n_channels = ARRAY_SIZE(rtw89_channels_6ghz),
338
339 /* 6G has no CCK rates, 1M/2M/5.5M/11M */
340 .bitrates = rtw89_bitrates + 4,
341 .n_bitrates = ARRAY_SIZE(rtw89_bitrates) - 4,
342 };
343
344 static const struct rtw89_hw_rate_def {
345 enum rtw89_hw_rate ht;
346 enum rtw89_hw_rate vht[RTW89_NSS_NUM];
347 } rtw89_hw_rate[RTW89_CHIP_GEN_NUM] = {
348 [RTW89_CHIP_AX] = {
349 .ht = RTW89_HW_RATE_MCS0,
350 .vht = {RTW89_HW_RATE_VHT_NSS1_MCS0,
351 RTW89_HW_RATE_VHT_NSS2_MCS0,
352 RTW89_HW_RATE_VHT_NSS3_MCS0,
353 RTW89_HW_RATE_VHT_NSS4_MCS0},
354 },
355 [RTW89_CHIP_BE] = {
356 .ht = RTW89_HW_RATE_V1_MCS0,
357 .vht = {RTW89_HW_RATE_V1_VHT_NSS1_MCS0,
358 RTW89_HW_RATE_V1_VHT_NSS2_MCS0,
359 RTW89_HW_RATE_V1_VHT_NSS3_MCS0,
360 RTW89_HW_RATE_V1_VHT_NSS4_MCS0},
361 },
362 };
363
__rtw89_traffic_stats_accu(struct rtw89_traffic_stats * stats,struct sk_buff * skb,bool tx)364 static void __rtw89_traffic_stats_accu(struct rtw89_traffic_stats *stats,
365 struct sk_buff *skb, bool tx)
366 {
367 if (tx) {
368 stats->tx_cnt++;
369 stats->tx_unicast += skb->len;
370 } else {
371 stats->rx_cnt++;
372 stats->rx_unicast += skb->len;
373 }
374 }
375
rtw89_traffic_stats_accu(struct rtw89_dev * rtwdev,struct rtw89_vif * rtwvif,struct sk_buff * skb,bool accu_dev,bool tx)376 static void rtw89_traffic_stats_accu(struct rtw89_dev *rtwdev,
377 struct rtw89_vif *rtwvif,
378 struct sk_buff *skb,
379 bool accu_dev, bool tx)
380 {
381 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
382
383 if (!ieee80211_is_data(hdr->frame_control))
384 return;
385
386 if (is_broadcast_ether_addr(hdr->addr1) ||
387 is_multicast_ether_addr(hdr->addr1))
388 return;
389
390 if (accu_dev)
391 __rtw89_traffic_stats_accu(&rtwdev->stats, skb, tx);
392
393 if (rtwvif) {
394 __rtw89_traffic_stats_accu(&rtwvif->stats, skb, tx);
395 __rtw89_traffic_stats_accu(&rtwvif->stats_ps, skb, tx);
396 }
397 }
398
rtw89_get_default_chandef(struct cfg80211_chan_def * chandef)399 void rtw89_get_default_chandef(struct cfg80211_chan_def *chandef)
400 {
401 cfg80211_chandef_create(chandef, &rtw89_channels_2ghz[0],
402 NL80211_CHAN_NO_HT);
403 }
404
rtw89_get_channel_params(const struct cfg80211_chan_def * chandef,struct rtw89_chan * chan)405 void rtw89_get_channel_params(const struct cfg80211_chan_def *chandef,
406 struct rtw89_chan *chan)
407 {
408 struct ieee80211_channel *channel = chandef->chan;
409 enum nl80211_chan_width width = chandef->width;
410 u32 primary_freq, center_freq;
411 u8 center_chan;
412 u8 bandwidth = RTW89_CHANNEL_WIDTH_20;
413 u32 offset;
414 u8 band;
415
416 center_chan = channel->hw_value;
417 primary_freq = channel->center_freq;
418 center_freq = chandef->center_freq1;
419
420 switch (width) {
421 case NL80211_CHAN_WIDTH_20_NOHT:
422 case NL80211_CHAN_WIDTH_20:
423 bandwidth = RTW89_CHANNEL_WIDTH_20;
424 break;
425 case NL80211_CHAN_WIDTH_40:
426 bandwidth = RTW89_CHANNEL_WIDTH_40;
427 if (primary_freq > center_freq) {
428 center_chan -= 2;
429 } else {
430 center_chan += 2;
431 }
432 break;
433 case NL80211_CHAN_WIDTH_80:
434 case NL80211_CHAN_WIDTH_160:
435 bandwidth = nl_to_rtw89_bandwidth(width);
436 if (primary_freq > center_freq) {
437 offset = (primary_freq - center_freq - 10) / 20;
438 center_chan -= 2 + offset * 4;
439 } else {
440 offset = (center_freq - primary_freq - 10) / 20;
441 center_chan += 2 + offset * 4;
442 }
443 break;
444 default:
445 center_chan = 0;
446 break;
447 }
448
449 switch (channel->band) {
450 default:
451 case NL80211_BAND_2GHZ:
452 band = RTW89_BAND_2G;
453 break;
454 case NL80211_BAND_5GHZ:
455 band = RTW89_BAND_5G;
456 break;
457 case NL80211_BAND_6GHZ:
458 band = RTW89_BAND_6G;
459 break;
460 }
461
462 rtw89_chan_create(chan, center_chan, channel->hw_value, band, bandwidth);
463 }
464
__rtw89_core_set_chip_txpwr(struct rtw89_dev * rtwdev,const struct rtw89_chan * chan,enum rtw89_phy_idx phy_idx)465 static void __rtw89_core_set_chip_txpwr(struct rtw89_dev *rtwdev,
466 const struct rtw89_chan *chan,
467 enum rtw89_phy_idx phy_idx)
468 {
469 const struct rtw89_chip_info *chip = rtwdev->chip;
470 bool entity_active;
471
472 entity_active = rtw89_get_entity_state(rtwdev, phy_idx);
473 if (!entity_active)
474 return;
475
476 chip->ops->set_txpwr(rtwdev, chan, phy_idx);
477 }
478
rtw89_core_set_chip_txpwr(struct rtw89_dev * rtwdev)479 void rtw89_core_set_chip_txpwr(struct rtw89_dev *rtwdev)
480 {
481 const struct rtw89_chan *chan;
482
483 chan = rtw89_mgnt_chan_get(rtwdev, 0);
484 __rtw89_core_set_chip_txpwr(rtwdev, chan, RTW89_PHY_0);
485
486 if (!rtwdev->support_mlo)
487 return;
488
489 chan = rtw89_mgnt_chan_get(rtwdev, 1);
490 __rtw89_core_set_chip_txpwr(rtwdev, chan, RTW89_PHY_1);
491 }
492
rtw89_chip_rfk_channel_for_pure_mon_vif(struct rtw89_dev * rtwdev,enum rtw89_phy_idx phy_idx)493 static void rtw89_chip_rfk_channel_for_pure_mon_vif(struct rtw89_dev *rtwdev,
494 enum rtw89_phy_idx phy_idx)
495 {
496 struct rtw89_vif *rtwvif = rtwdev->pure_monitor_mode_vif;
497 struct rtw89_vif_link *rtwvif_link;
498
499 if (!rtwvif)
500 return;
501
502 rtwvif_link = rtw89_vif_get_link_inst(rtwvif, phy_idx);
503 if (!rtwvif_link)
504 return;
505
506 rtw89_chip_rfk_channel(rtwdev, rtwvif_link);
507 }
508
__rtw89_set_channel(struct rtw89_dev * rtwdev,const struct rtw89_chan * chan,enum rtw89_mac_idx mac_idx,enum rtw89_phy_idx phy_idx)509 static void __rtw89_set_channel(struct rtw89_dev *rtwdev,
510 const struct rtw89_chan *chan,
511 enum rtw89_mac_idx mac_idx,
512 enum rtw89_phy_idx phy_idx)
513 {
514 const struct rtw89_chip_info *chip = rtwdev->chip;
515 const struct rtw89_chan_rcd *chan_rcd;
516 struct rtw89_channel_help_params bak;
517 bool entity_active;
518
519 entity_active = rtw89_get_entity_state(rtwdev, phy_idx);
520
521 chan_rcd = rtw89_chan_rcd_get_by_chan(chan);
522
523 rtw89_chip_set_channel_prepare(rtwdev, &bak, chan, mac_idx, phy_idx);
524
525 chip->ops->set_channel(rtwdev, chan, mac_idx, phy_idx);
526
527 chip->ops->set_txpwr(rtwdev, chan, phy_idx);
528
529 rtw89_chip_set_channel_done(rtwdev, &bak, chan, mac_idx, phy_idx);
530
531 if (!entity_active || chan_rcd->band_changed) {
532 rtw89_btc_ntfy_switch_band(rtwdev, phy_idx, chan->band_type);
533 rtw89_chip_rfk_band_changed(rtwdev, phy_idx, chan);
534 }
535
536 rtw89_set_entity_state(rtwdev, phy_idx, true);
537
538 rtw89_chip_rfk_channel_for_pure_mon_vif(rtwdev, phy_idx);
539 }
540
rtw89_set_channel(struct rtw89_dev * rtwdev)541 int rtw89_set_channel(struct rtw89_dev *rtwdev)
542 {
543 const struct rtw89_chan *chan;
544 enum rtw89_entity_mode mode;
545
546 mode = rtw89_entity_recalc(rtwdev);
547 if (mode < 0 || mode >= NUM_OF_RTW89_ENTITY_MODE) {
548 WARN(1, "Invalid ent mode: %d\n", mode);
549 return -EINVAL;
550 }
551
552 chan = rtw89_mgnt_chan_get(rtwdev, 0);
553 __rtw89_set_channel(rtwdev, chan, RTW89_MAC_0, RTW89_PHY_0);
554
555 if (!rtwdev->support_mlo)
556 return 0;
557
558 chan = rtw89_mgnt_chan_get(rtwdev, 1);
559 __rtw89_set_channel(rtwdev, chan, RTW89_MAC_1, RTW89_PHY_1);
560
561 return 0;
562 }
563
564 static enum rtw89_core_tx_type
rtw89_core_get_tx_type(struct rtw89_dev * rtwdev,struct sk_buff * skb)565 rtw89_core_get_tx_type(struct rtw89_dev *rtwdev,
566 struct sk_buff *skb)
567 {
568 struct ieee80211_hdr *hdr = (void *)skb->data;
569 __le16 fc = hdr->frame_control;
570
571 if (ieee80211_is_mgmt(fc) || ieee80211_is_nullfunc(fc))
572 return RTW89_CORE_TX_TYPE_MGMT;
573
574 return RTW89_CORE_TX_TYPE_DATA;
575 }
576
577 static void
rtw89_core_tx_update_ampdu_info(struct rtw89_dev * rtwdev,struct rtw89_core_tx_request * tx_req,enum btc_pkt_type pkt_type)578 rtw89_core_tx_update_ampdu_info(struct rtw89_dev *rtwdev,
579 struct rtw89_core_tx_request *tx_req,
580 enum btc_pkt_type pkt_type)
581 {
582 struct rtw89_sta_link *rtwsta_link = tx_req->rtwsta_link;
583 struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info;
584 struct ieee80211_link_sta *link_sta;
585 struct sk_buff *skb = tx_req->skb;
586 struct rtw89_sta *rtwsta;
587 u8 ampdu_num;
588 u8 tid;
589
590 if (pkt_type == PACKET_EAPOL) {
591 desc_info->bk = true;
592 return;
593 }
594
595 if (!(IEEE80211_SKB_CB(skb)->flags & IEEE80211_TX_CTL_AMPDU))
596 return;
597
598 if (!rtwsta_link) {
599 rtw89_warn(rtwdev, "cannot set ampdu info without sta\n");
600 return;
601 }
602
603 tid = skb->priority & IEEE80211_QOS_CTL_TAG1D_MASK;
604 rtwsta = rtwsta_link->rtwsta;
605
606 rcu_read_lock();
607
608 link_sta = rtw89_sta_rcu_dereference_link(rtwsta_link, false);
609 ampdu_num = (u8)((rtwsta->ampdu_params[tid].agg_num ?
610 rtwsta->ampdu_params[tid].agg_num :
611 4 << link_sta->ht_cap.ampdu_factor) - 1);
612
613 desc_info->agg_en = true;
614 desc_info->ampdu_density = link_sta->ht_cap.ampdu_density;
615 desc_info->ampdu_num = ampdu_num;
616
617 rcu_read_unlock();
618 }
619
620 static void
rtw89_core_tx_update_sec_key(struct rtw89_dev * rtwdev,struct rtw89_core_tx_request * tx_req)621 rtw89_core_tx_update_sec_key(struct rtw89_dev *rtwdev,
622 struct rtw89_core_tx_request *tx_req)
623 {
624 struct rtw89_cam_info *cam_info = &rtwdev->cam_info;
625 const struct rtw89_chip_info *chip = rtwdev->chip;
626 const struct rtw89_sec_cam_entry *sec_cam;
627 struct ieee80211_tx_info *info;
628 struct ieee80211_key_conf *key;
629 struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info;
630 struct sk_buff *skb = tx_req->skb;
631 u8 sec_type = RTW89_SEC_KEY_TYPE_NONE;
632 u8 sec_cam_idx;
633 u64 pn64;
634
635 info = IEEE80211_SKB_CB(skb);
636 key = info->control.hw_key;
637 sec_cam_idx = key->hw_key_idx;
638 sec_cam = cam_info->sec_entries[sec_cam_idx];
639 if (!sec_cam) {
640 rtw89_warn(rtwdev, "sec cam entry is empty\n");
641 return;
642 }
643
644 switch (key->cipher) {
645 case WLAN_CIPHER_SUITE_WEP40:
646 sec_type = RTW89_SEC_KEY_TYPE_WEP40;
647 break;
648 case WLAN_CIPHER_SUITE_WEP104:
649 sec_type = RTW89_SEC_KEY_TYPE_WEP104;
650 break;
651 case WLAN_CIPHER_SUITE_TKIP:
652 sec_type = RTW89_SEC_KEY_TYPE_TKIP;
653 break;
654 case WLAN_CIPHER_SUITE_CCMP:
655 sec_type = RTW89_SEC_KEY_TYPE_CCMP128;
656 break;
657 case WLAN_CIPHER_SUITE_CCMP_256:
658 sec_type = RTW89_SEC_KEY_TYPE_CCMP256;
659 break;
660 case WLAN_CIPHER_SUITE_GCMP:
661 sec_type = RTW89_SEC_KEY_TYPE_GCMP128;
662 break;
663 case WLAN_CIPHER_SUITE_GCMP_256:
664 sec_type = RTW89_SEC_KEY_TYPE_GCMP256;
665 break;
666 default:
667 rtw89_warn(rtwdev, "key cipher not supported %d\n", key->cipher);
668 return;
669 }
670
671 desc_info->sec_en = true;
672 desc_info->sec_keyid = key->keyidx;
673 desc_info->sec_type = sec_type;
674 desc_info->sec_cam_idx = sec_cam->sec_cam_idx;
675
676 if (!chip->hw_sec_hdr)
677 return;
678
679 pn64 = atomic64_inc_return(&key->tx_pn);
680 desc_info->sec_seq[0] = pn64;
681 desc_info->sec_seq[1] = pn64 >> 8;
682 desc_info->sec_seq[2] = pn64 >> 16;
683 desc_info->sec_seq[3] = pn64 >> 24;
684 desc_info->sec_seq[4] = pn64 >> 32;
685 desc_info->sec_seq[5] = pn64 >> 40;
686 desc_info->wp_offset = 1; /* in unit of 8 bytes for security header */
687 }
688
rtw89_core_get_mgmt_rate(struct rtw89_dev * rtwdev,struct rtw89_core_tx_request * tx_req,const struct rtw89_chan * chan)689 static u16 rtw89_core_get_mgmt_rate(struct rtw89_dev *rtwdev,
690 struct rtw89_core_tx_request *tx_req,
691 const struct rtw89_chan *chan)
692 {
693 struct sk_buff *skb = tx_req->skb;
694 struct rtw89_vif_link *rtwvif_link = tx_req->rtwvif_link;
695 struct rtw89_sta_link *rtwsta_link = tx_req->rtwsta_link;
696 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
697 struct ieee80211_vif *vif = tx_info->control.vif;
698 struct ieee80211_bss_conf *bss_conf;
699 u16 lowest_rate;
700 u16 rate;
701
702 if (tx_info->flags & IEEE80211_TX_CTL_NO_CCK_RATE ||
703 (vif && vif->p2p))
704 lowest_rate = RTW89_HW_RATE_OFDM6;
705 else if (chan->band_type == RTW89_BAND_2G)
706 lowest_rate = RTW89_HW_RATE_CCK1;
707 else
708 lowest_rate = RTW89_HW_RATE_OFDM6;
709
710 if (!rtwvif_link)
711 return lowest_rate;
712
713 rcu_read_lock();
714
715 bss_conf = rtw89_vif_rcu_dereference_link(rtwvif_link, false);
716 if (!bss_conf->basic_rates || !rtwsta_link) {
717 rate = lowest_rate;
718 goto out;
719 }
720
721 rate = __ffs(bss_conf->basic_rates) + lowest_rate;
722
723 out:
724 rcu_read_unlock();
725
726 return rate;
727 }
728
rtw89_core_tx_get_mac_id(struct rtw89_dev * rtwdev,struct rtw89_core_tx_request * tx_req)729 static u8 rtw89_core_tx_get_mac_id(struct rtw89_dev *rtwdev,
730 struct rtw89_core_tx_request *tx_req)
731 {
732 struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info;
733 struct rtw89_vif_link *rtwvif_link = tx_req->rtwvif_link;
734 struct rtw89_sta_link *rtwsta_link = tx_req->rtwsta_link;
735
736 if (desc_info->mlo && !desc_info->sw_mld) {
737 if (rtwsta_link)
738 return rtw89_sta_get_main_macid(rtwsta_link->rtwsta);
739 else
740 return rtw89_vif_get_main_macid(rtwvif_link->rtwvif);
741 }
742
743 if (!rtwsta_link)
744 return rtwvif_link->mac_id;
745
746 return rtwsta_link->mac_id;
747 }
748
rtw89_core_tx_update_llc_hdr(struct rtw89_dev * rtwdev,struct rtw89_tx_desc_info * desc_info,struct sk_buff * skb)749 static void rtw89_core_tx_update_llc_hdr(struct rtw89_dev *rtwdev,
750 struct rtw89_tx_desc_info *desc_info,
751 struct sk_buff *skb)
752 {
753 struct ieee80211_hdr *hdr = (void *)skb->data;
754 __le16 fc = hdr->frame_control;
755
756 desc_info->hdr_llc_len = ieee80211_hdrlen(fc);
757 desc_info->hdr_llc_len >>= 1; /* in unit of 2 bytes */
758 }
759
rtw89_core_get_ch_dma(struct rtw89_dev * rtwdev,u8 qsel)760 u8 rtw89_core_get_ch_dma(struct rtw89_dev *rtwdev, u8 qsel)
761 {
762 switch (qsel) {
763 default:
764 rtw89_warn(rtwdev, "Cannot map qsel to dma: %d\n", qsel);
765 fallthrough;
766 case RTW89_TX_QSEL_BE_0:
767 case RTW89_TX_QSEL_BE_1:
768 case RTW89_TX_QSEL_BE_2:
769 case RTW89_TX_QSEL_BE_3:
770 return RTW89_TXCH_ACH0;
771 case RTW89_TX_QSEL_BK_0:
772 case RTW89_TX_QSEL_BK_1:
773 case RTW89_TX_QSEL_BK_2:
774 case RTW89_TX_QSEL_BK_3:
775 return RTW89_TXCH_ACH1;
776 case RTW89_TX_QSEL_VI_0:
777 case RTW89_TX_QSEL_VI_1:
778 case RTW89_TX_QSEL_VI_2:
779 case RTW89_TX_QSEL_VI_3:
780 return RTW89_TXCH_ACH2;
781 case RTW89_TX_QSEL_VO_0:
782 case RTW89_TX_QSEL_VO_1:
783 case RTW89_TX_QSEL_VO_2:
784 case RTW89_TX_QSEL_VO_3:
785 return RTW89_TXCH_ACH3;
786 case RTW89_TX_QSEL_B0_MGMT:
787 return RTW89_TXCH_CH8;
788 case RTW89_TX_QSEL_B0_HI:
789 return RTW89_TXCH_CH9;
790 case RTW89_TX_QSEL_B1_MGMT:
791 return RTW89_TXCH_CH10;
792 case RTW89_TX_QSEL_B1_HI:
793 return RTW89_TXCH_CH11;
794 }
795 }
796 EXPORT_SYMBOL(rtw89_core_get_ch_dma);
797
rtw89_core_get_ch_dma_v1(struct rtw89_dev * rtwdev,u8 qsel)798 u8 rtw89_core_get_ch_dma_v1(struct rtw89_dev *rtwdev, u8 qsel)
799 {
800 switch (qsel) {
801 default:
802 rtw89_warn(rtwdev, "Cannot map qsel to dma v1: %d\n", qsel);
803 fallthrough;
804 case RTW89_TX_QSEL_BE_0:
805 case RTW89_TX_QSEL_BK_0:
806 return RTW89_TXCH_ACH0;
807 case RTW89_TX_QSEL_VI_0:
808 case RTW89_TX_QSEL_VO_0:
809 return RTW89_TXCH_ACH2;
810 case RTW89_TX_QSEL_B0_MGMT:
811 case RTW89_TX_QSEL_B0_HI:
812 return RTW89_TXCH_CH8;
813 case RTW89_TX_QSEL_B1_MGMT:
814 case RTW89_TX_QSEL_B1_HI:
815 return RTW89_TXCH_CH10;
816 }
817 }
818 EXPORT_SYMBOL(rtw89_core_get_ch_dma_v1);
819
rtw89_core_get_ch_dma_v2(struct rtw89_dev * rtwdev,u8 qsel)820 u8 rtw89_core_get_ch_dma_v2(struct rtw89_dev *rtwdev, u8 qsel)
821 {
822 switch (qsel) {
823 default:
824 rtw89_warn(rtwdev, "Cannot map qsel to dma v2: %d\n", qsel);
825 fallthrough;
826 case RTW89_TX_QSEL_BE_0:
827 case RTW89_TX_QSEL_VO_0:
828 return RTW89_TXCH_ACH0;
829 case RTW89_TX_QSEL_BK_0:
830 case RTW89_TX_QSEL_VI_0:
831 return RTW89_TXCH_ACH2;
832 case RTW89_TX_QSEL_B0_MGMT:
833 case RTW89_TX_QSEL_B0_HI:
834 return RTW89_TXCH_CH8;
835 }
836 }
837 EXPORT_SYMBOL(rtw89_core_get_ch_dma_v2);
838
839 static void
rtw89_core_tx_update_mgmt_info(struct rtw89_dev * rtwdev,struct rtw89_core_tx_request * tx_req)840 rtw89_core_tx_update_mgmt_info(struct rtw89_dev *rtwdev,
841 struct rtw89_core_tx_request *tx_req)
842 {
843 const struct rtw89_chip_info *chip = rtwdev->chip;
844 struct rtw89_vif_link *rtwvif_link = tx_req->rtwvif_link;
845 struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info;
846 const struct rtw89_chan *chan = rtw89_chan_get(rtwdev,
847 rtwvif_link->chanctx_idx);
848 struct sk_buff *skb = tx_req->skb;
849 u8 qsel, ch_dma;
850
851 qsel = rtw89_core_get_qsel_mgmt(rtwdev, tx_req);
852 ch_dma = rtw89_chip_get_ch_dma(rtwdev, qsel);
853
854 desc_info->qsel = qsel;
855 desc_info->ch_dma = ch_dma;
856 desc_info->port = desc_info->hiq ? rtwvif_link->port : 0;
857 desc_info->mac_id = rtw89_core_tx_get_mac_id(rtwdev, tx_req);
858 desc_info->hw_ssn_sel = RTW89_MGMT_HW_SSN_SEL;
859 desc_info->hw_seq_mode = RTW89_MGMT_HW_SEQ_MODE;
860
861 /* fixed data rate for mgmt frames */
862 desc_info->en_wd_info = true;
863 desc_info->use_rate = true;
864 desc_info->dis_data_fb = true;
865 desc_info->data_rate = rtw89_core_get_mgmt_rate(rtwdev, tx_req, chan);
866
867 if (chip->hw_mgmt_tx_encrypt && IEEE80211_SKB_CB(skb)->control.hw_key) {
868 rtw89_core_tx_update_sec_key(rtwdev, tx_req);
869 rtw89_core_tx_update_llc_hdr(rtwdev, desc_info, skb);
870 }
871
872 rtw89_debug(rtwdev, RTW89_DBG_TXRX,
873 "tx mgmt frame with rate 0x%x on channel %d (band %d, bw %d)\n",
874 desc_info->data_rate, chan->channel, chan->band_type,
875 chan->band_width);
876 }
877
878 static void
rtw89_core_tx_update_h2c_info(struct rtw89_dev * rtwdev,struct rtw89_core_tx_request * tx_req)879 rtw89_core_tx_update_h2c_info(struct rtw89_dev *rtwdev,
880 struct rtw89_core_tx_request *tx_req)
881 {
882 struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info;
883
884 desc_info->is_bmc = false;
885 desc_info->wd_page = false;
886 desc_info->ch_dma = RTW89_DMA_H2C;
887 }
888
rtw89_core_get_no_ul_ofdma_htc(struct rtw89_dev * rtwdev,__le32 * htc,const struct rtw89_chan * chan)889 static void rtw89_core_get_no_ul_ofdma_htc(struct rtw89_dev *rtwdev, __le32 *htc,
890 const struct rtw89_chan *chan)
891 {
892 static const u8 rtw89_bandwidth_to_om[] = {
893 [RTW89_CHANNEL_WIDTH_20] = HTC_OM_CHANNEL_WIDTH_20,
894 [RTW89_CHANNEL_WIDTH_40] = HTC_OM_CHANNEL_WIDTH_40,
895 [RTW89_CHANNEL_WIDTH_80] = HTC_OM_CHANNEL_WIDTH_80,
896 [RTW89_CHANNEL_WIDTH_160] = HTC_OM_CHANNEL_WIDTH_160_OR_80_80,
897 [RTW89_CHANNEL_WIDTH_80_80] = HTC_OM_CHANNEL_WIDTH_160_OR_80_80,
898 };
899 const struct rtw89_chip_info *chip = rtwdev->chip;
900 struct rtw89_hal *hal = &rtwdev->hal;
901 u8 om_bandwidth;
902
903 if (!chip->dis_2g_40m_ul_ofdma ||
904 chan->band_type != RTW89_BAND_2G ||
905 chan->band_width != RTW89_CHANNEL_WIDTH_40)
906 return;
907
908 om_bandwidth = chan->band_width < ARRAY_SIZE(rtw89_bandwidth_to_om) ?
909 rtw89_bandwidth_to_om[chan->band_width] : 0;
910 *htc = le32_encode_bits(RTW89_HTC_VARIANT_HE, RTW89_HTC_MASK_VARIANT) |
911 le32_encode_bits(RTW89_HTC_VARIANT_HE_CID_OM, RTW89_HTC_MASK_CTL_ID) |
912 le32_encode_bits(hal->rx_nss - 1, RTW89_HTC_MASK_HTC_OM_RX_NSS) |
913 le32_encode_bits(om_bandwidth, RTW89_HTC_MASK_HTC_OM_CH_WIDTH) |
914 le32_encode_bits(1, RTW89_HTC_MASK_HTC_OM_UL_MU_DIS) |
915 le32_encode_bits(hal->tx_nss - 1, RTW89_HTC_MASK_HTC_OM_TX_NSTS) |
916 le32_encode_bits(0, RTW89_HTC_MASK_HTC_OM_ER_SU_DIS) |
917 le32_encode_bits(0, RTW89_HTC_MASK_HTC_OM_DL_MU_MIMO_RR) |
918 le32_encode_bits(0, RTW89_HTC_MASK_HTC_OM_UL_MU_DATA_DIS);
919 }
920
921 static bool
__rtw89_core_tx_check_he_qos_htc(struct rtw89_dev * rtwdev,struct rtw89_core_tx_request * tx_req,enum btc_pkt_type pkt_type)922 __rtw89_core_tx_check_he_qos_htc(struct rtw89_dev *rtwdev,
923 struct rtw89_core_tx_request *tx_req,
924 enum btc_pkt_type pkt_type)
925 {
926 struct rtw89_sta_link *rtwsta_link = tx_req->rtwsta_link;
927 struct sk_buff *skb = tx_req->skb;
928 struct ieee80211_hdr *hdr = (void *)skb->data;
929 struct ieee80211_link_sta *link_sta;
930 __le16 fc = hdr->frame_control;
931
932 /* AP IOT issue with EAPoL, ARP and DHCP */
933 if (pkt_type < PACKET_MAX)
934 return false;
935
936 if (!rtwsta_link)
937 return false;
938
939 rcu_read_lock();
940
941 link_sta = rtw89_sta_rcu_dereference_link(rtwsta_link, false);
942 if (!link_sta->he_cap.has_he) {
943 rcu_read_unlock();
944 return false;
945 }
946
947 rcu_read_unlock();
948
949 if (!ieee80211_is_data_qos(fc))
950 return false;
951
952 if (skb_headroom(skb) < IEEE80211_HT_CTL_LEN)
953 return false;
954
955 if (rtwsta_link && rtwsta_link->ra_report.might_fallback_legacy)
956 return false;
957
958 return true;
959 }
960
961 static void
__rtw89_core_tx_adjust_he_qos_htc(struct rtw89_dev * rtwdev,struct rtw89_core_tx_request * tx_req)962 __rtw89_core_tx_adjust_he_qos_htc(struct rtw89_dev *rtwdev,
963 struct rtw89_core_tx_request *tx_req)
964 {
965 struct rtw89_sta_link *rtwsta_link = tx_req->rtwsta_link;
966 struct sk_buff *skb = tx_req->skb;
967 struct ieee80211_hdr *hdr = (void *)skb->data;
968 __le16 fc = hdr->frame_control;
969 void *data;
970 __le32 *htc;
971 u8 *qc;
972 int hdr_len;
973
974 hdr_len = ieee80211_has_a4(fc) ? 32 : 26;
975 data = skb_push(skb, IEEE80211_HT_CTL_LEN);
976 #if defined(__linux__)
977 memmove(data, data + IEEE80211_HT_CTL_LEN, hdr_len);
978 #elif defined(__FreeBSD__)
979 memmove(data, (u8 *)data + IEEE80211_HT_CTL_LEN, hdr_len);
980 #endif
981
982 hdr = data;
983 #if defined(__linux__)
984 htc = data + hdr_len;
985 #elif defined(__FreeBSD__)
986 htc = (__le32 *)((u8 *)data + hdr_len);
987 #endif
988 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_ORDER);
989 *htc = rtwsta_link->htc_template ? rtwsta_link->htc_template :
990 le32_encode_bits(RTW89_HTC_VARIANT_HE, RTW89_HTC_MASK_VARIANT) |
991 le32_encode_bits(RTW89_HTC_VARIANT_HE_CID_CAS, RTW89_HTC_MASK_CTL_ID);
992
993 #if defined(__linux__)
994 qc = data + hdr_len - IEEE80211_QOS_CTL_LEN;
995 #elif defined(__FreeBSD__)
996 qc = (u8 *)data + hdr_len - IEEE80211_QOS_CTL_LEN;
997 #endif
998 qc[0] |= IEEE80211_QOS_CTL_EOSP;
999 }
1000
1001 static void
rtw89_core_tx_update_he_qos_htc(struct rtw89_dev * rtwdev,struct rtw89_core_tx_request * tx_req,enum btc_pkt_type pkt_type)1002 rtw89_core_tx_update_he_qos_htc(struct rtw89_dev *rtwdev,
1003 struct rtw89_core_tx_request *tx_req,
1004 enum btc_pkt_type pkt_type)
1005 {
1006 struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info;
1007 struct rtw89_vif_link *rtwvif_link = tx_req->rtwvif_link;
1008
1009 if (!__rtw89_core_tx_check_he_qos_htc(rtwdev, tx_req, pkt_type))
1010 goto desc_bk;
1011
1012 __rtw89_core_tx_adjust_he_qos_htc(rtwdev, tx_req);
1013
1014 desc_info->pkt_size += IEEE80211_HT_CTL_LEN;
1015 desc_info->a_ctrl_bsr = true;
1016
1017 desc_bk:
1018 if (!rtwvif_link || rtwvif_link->last_a_ctrl == desc_info->a_ctrl_bsr)
1019 return;
1020
1021 rtwvif_link->last_a_ctrl = desc_info->a_ctrl_bsr;
1022 desc_info->bk = true;
1023 }
1024
rtw89_core_get_data_rate(struct rtw89_dev * rtwdev,struct rtw89_core_tx_request * tx_req)1025 static u16 rtw89_core_get_data_rate(struct rtw89_dev *rtwdev,
1026 struct rtw89_core_tx_request *tx_req)
1027 {
1028 struct rtw89_vif_link *rtwvif_link = tx_req->rtwvif_link;
1029 struct rtw89_sta_link *rtwsta_link = tx_req->rtwsta_link;
1030 struct ieee80211_vif *vif = rtwvif_link_to_vif(rtwvif_link);
1031 struct rtw89_phy_rate_pattern *rate_pattern = &rtwvif_link->rate_pattern;
1032 enum rtw89_chanctx_idx idx = rtwvif_link->chanctx_idx;
1033 const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, idx);
1034 struct ieee80211_link_sta *link_sta;
1035 u16 lowest_rate;
1036 u16 rate;
1037
1038 if (rate_pattern->enable)
1039 return rate_pattern->rate;
1040
1041 if (vif->p2p)
1042 lowest_rate = RTW89_HW_RATE_OFDM6;
1043 else if (chan->band_type == RTW89_BAND_2G)
1044 lowest_rate = RTW89_HW_RATE_CCK1;
1045 else
1046 lowest_rate = RTW89_HW_RATE_OFDM6;
1047
1048 if (!rtwsta_link)
1049 return lowest_rate;
1050
1051 rcu_read_lock();
1052
1053 link_sta = rtw89_sta_rcu_dereference_link(rtwsta_link, false);
1054 if (!link_sta->supp_rates[chan->band_type]) {
1055 rate = lowest_rate;
1056 goto out;
1057 }
1058
1059 rate = __ffs(link_sta->supp_rates[chan->band_type]) + lowest_rate;
1060
1061 out:
1062 rcu_read_unlock();
1063
1064 return rate;
1065 }
1066
1067 static void
rtw89_core_tx_update_data_info(struct rtw89_dev * rtwdev,struct rtw89_core_tx_request * tx_req)1068 rtw89_core_tx_update_data_info(struct rtw89_dev *rtwdev,
1069 struct rtw89_core_tx_request *tx_req)
1070 {
1071 struct rtw89_vif_link *rtwvif_link = tx_req->rtwvif_link;
1072 struct rtw89_sta_link *rtwsta_link = tx_req->rtwsta_link;
1073 struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info;
1074 struct sk_buff *skb = tx_req->skb;
1075 u8 tid, tid_indicate;
1076 u8 qsel, ch_dma;
1077
1078 tid = skb->priority & IEEE80211_QOS_CTL_TAG1D_MASK;
1079 tid_indicate = rtw89_core_get_tid_indicate(rtwdev, tid);
1080 qsel = desc_info->hiq ? RTW89_TX_QSEL_B0_HI : rtw89_core_get_qsel(rtwdev, tid);
1081 ch_dma = rtw89_chip_get_ch_dma(rtwdev, qsel);
1082
1083 desc_info->ch_dma = ch_dma;
1084 desc_info->tid_indicate = tid_indicate;
1085 desc_info->qsel = qsel;
1086 desc_info->mac_id = rtw89_core_tx_get_mac_id(rtwdev, tx_req);
1087 desc_info->port = desc_info->hiq ? rtwvif_link->port : 0;
1088 desc_info->er_cap = rtwsta_link ? rtwsta_link->er_cap : false;
1089 desc_info->stbc = rtwsta_link ? rtwsta_link->ra.stbc_cap : false;
1090 desc_info->ldpc = rtwsta_link ? rtwsta_link->ra.ldpc_cap : false;
1091
1092 /* enable wd_info for AMPDU */
1093 desc_info->en_wd_info = true;
1094
1095 if (IEEE80211_SKB_CB(skb)->control.hw_key)
1096 rtw89_core_tx_update_sec_key(rtwdev, tx_req);
1097
1098 desc_info->data_retry_lowest_rate = rtw89_core_get_data_rate(rtwdev, tx_req);
1099 }
1100
1101 static enum btc_pkt_type
rtw89_core_tx_btc_spec_pkt_notify(struct rtw89_dev * rtwdev,struct rtw89_core_tx_request * tx_req)1102 rtw89_core_tx_btc_spec_pkt_notify(struct rtw89_dev *rtwdev,
1103 struct rtw89_core_tx_request *tx_req)
1104 {
1105 struct wiphy *wiphy = rtwdev->hw->wiphy;
1106 struct sk_buff *skb = tx_req->skb;
1107 struct udphdr *udphdr;
1108
1109 if (IEEE80211_SKB_CB(skb)->control.flags & IEEE80211_TX_CTRL_PORT_CTRL_PROTO) {
1110 wiphy_work_queue(wiphy, &rtwdev->btc.eapol_notify_work);
1111 return PACKET_EAPOL;
1112 }
1113
1114 if (skb->protocol == htons(ETH_P_ARP)) {
1115 wiphy_work_queue(wiphy, &rtwdev->btc.arp_notify_work);
1116 return PACKET_ARP;
1117 }
1118
1119 if (skb->protocol == htons(ETH_P_IP) &&
1120 ip_hdr(skb)->protocol == IPPROTO_UDP) {
1121 udphdr = udp_hdr(skb);
1122 if (((udphdr->source == htons(67) && udphdr->dest == htons(68)) ||
1123 (udphdr->source == htons(68) && udphdr->dest == htons(67))) &&
1124 skb->len > 282) {
1125 wiphy_work_queue(wiphy, &rtwdev->btc.dhcp_notify_work);
1126 return PACKET_DHCP;
1127 }
1128 }
1129
1130 if (skb->protocol == htons(ETH_P_IP) &&
1131 ip_hdr(skb)->protocol == IPPROTO_ICMP) {
1132 wiphy_work_queue(wiphy, &rtwdev->btc.icmp_notify_work);
1133 return PACKET_ICMP;
1134 }
1135
1136 return PACKET_MAX;
1137 }
1138
1139 static void
rtw89_core_tx_wake(struct rtw89_dev * rtwdev,struct rtw89_core_tx_request * tx_req)1140 rtw89_core_tx_wake(struct rtw89_dev *rtwdev,
1141 struct rtw89_core_tx_request *tx_req)
1142 {
1143 const struct rtw89_chip_info *chip = rtwdev->chip;
1144
1145 if (!RTW89_CHK_FW_FEATURE(TX_WAKE, &rtwdev->fw))
1146 return;
1147
1148 switch (chip->chip_id) {
1149 case RTL8852BT:
1150 if (test_bit(RTW89_FLAG_LEISURE_PS, rtwdev->flags))
1151 goto notify;
1152 break;
1153 case RTL8852C:
1154 if (test_bit(RTW89_FLAG_LOW_POWER_MODE, rtwdev->flags))
1155 goto notify;
1156 break;
1157 default:
1158 if (test_bit(RTW89_FLAG_LOW_POWER_MODE, rtwdev->flags) &&
1159 tx_req->tx_type == RTW89_CORE_TX_TYPE_MGMT)
1160 goto notify;
1161 break;
1162 }
1163
1164 return;
1165
1166 notify:
1167 rtw89_mac_notify_wake(rtwdev);
1168 }
1169
rtw89_core_tx_update_injection(struct rtw89_dev * rtwdev,struct rtw89_core_tx_request * tx_req,struct ieee80211_tx_info * info)1170 static void rtw89_core_tx_update_injection(struct rtw89_dev *rtwdev,
1171 struct rtw89_core_tx_request *tx_req,
1172 struct ieee80211_tx_info *info)
1173 {
1174 const struct rtw89_hw_rate_def *hw_rate = &rtw89_hw_rate[rtwdev->chip->chip_gen];
1175 enum mac80211_rate_control_flags flags = info->control.rates[0].flags;
1176 struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info;
1177 const struct rtw89_chan *chan;
1178 u8 idx = info->control.rates[0].idx;
1179 u8 nss, mcs;
1180
1181 desc_info->use_rate = true;
1182 desc_info->dis_data_fb = true;
1183
1184 if (flags & IEEE80211_TX_RC_160_MHZ_WIDTH)
1185 desc_info->data_bw = 3;
1186 else if (flags & IEEE80211_TX_RC_80_MHZ_WIDTH)
1187 desc_info->data_bw = 2;
1188 else if (flags & IEEE80211_TX_RC_40_MHZ_WIDTH)
1189 desc_info->data_bw = 1;
1190
1191 if (flags & IEEE80211_TX_RC_SHORT_GI)
1192 desc_info->gi_ltf = 1;
1193
1194 if (flags & IEEE80211_TX_RC_VHT_MCS) {
1195 nss = umin(idx >> 4, ARRAY_SIZE(hw_rate->vht) - 1);
1196 mcs = idx & 0xf;
1197 desc_info->data_rate = hw_rate->vht[nss] + mcs;
1198 } else if (flags & IEEE80211_TX_RC_MCS) {
1199 desc_info->data_rate = hw_rate->ht + idx;
1200 } else {
1201 chan = rtw89_chan_get(rtwdev, tx_req->rtwvif_link->chanctx_idx);
1202
1203 desc_info->data_rate = idx + (chan->band_type == RTW89_BAND_2G ?
1204 RTW89_HW_RATE_CCK1 : RTW89_HW_RATE_OFDM6);
1205 }
1206 }
1207
1208 static void
rtw89_core_tx_update_desc_info(struct rtw89_dev * rtwdev,struct rtw89_core_tx_request * tx_req)1209 rtw89_core_tx_update_desc_info(struct rtw89_dev *rtwdev,
1210 struct rtw89_core_tx_request *tx_req)
1211 {
1212 struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info;
1213 struct sk_buff *skb = tx_req->skb;
1214 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1215 struct ieee80211_hdr *hdr = (void *)skb->data;
1216 struct rtw89_addr_cam_entry *addr_cam;
1217 enum btc_pkt_type pkt_type;
1218 bool upd_wlan_hdr = false;
1219 bool is_bmc;
1220 u16 seq;
1221
1222 desc_info->pkt_size = skb->len;
1223
1224 if (unlikely(tx_req->tx_type == RTW89_CORE_TX_TYPE_FWCMD)) {
1225 rtw89_core_tx_update_h2c_info(rtwdev, tx_req);
1226 return;
1227 }
1228
1229 tx_req->tx_type = rtw89_core_get_tx_type(rtwdev, skb);
1230
1231 if (tx_req->sta)
1232 desc_info->mlo = tx_req->sta->mlo;
1233 else if (tx_req->vif)
1234 desc_info->mlo = ieee80211_vif_is_mld(tx_req->vif);
1235
1236 seq = (le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4;
1237 addr_cam = rtw89_get_addr_cam_of(tx_req->rtwvif_link,
1238 tx_req->rtwsta_link);
1239 if (addr_cam->valid && desc_info->mlo)
1240 upd_wlan_hdr = true;
1241
1242 if (rtw89_is_tx_rpt_skb(rtwdev, tx_req->skb))
1243 rtw89_tx_rpt_init(rtwdev, tx_req);
1244
1245 is_bmc = (is_broadcast_ether_addr(hdr->addr1) ||
1246 is_multicast_ether_addr(hdr->addr1));
1247
1248 desc_info->seq = seq;
1249 desc_info->is_bmc = is_bmc;
1250 desc_info->wd_page = true;
1251 desc_info->hiq = info->flags & IEEE80211_TX_CTL_SEND_AFTER_DTIM;
1252 desc_info->upd_wlan_hdr = upd_wlan_hdr;
1253
1254 switch (tx_req->tx_type) {
1255 case RTW89_CORE_TX_TYPE_MGMT:
1256 rtw89_core_tx_update_mgmt_info(rtwdev, tx_req);
1257 break;
1258 case RTW89_CORE_TX_TYPE_DATA:
1259 rtw89_core_tx_update_data_info(rtwdev, tx_req);
1260 pkt_type = rtw89_core_tx_btc_spec_pkt_notify(rtwdev, tx_req);
1261 rtw89_core_tx_update_he_qos_htc(rtwdev, tx_req, pkt_type);
1262 rtw89_core_tx_update_ampdu_info(rtwdev, tx_req, pkt_type);
1263 rtw89_core_tx_update_llc_hdr(rtwdev, desc_info, skb);
1264 break;
1265 default:
1266 break;
1267 }
1268
1269 if (unlikely(info->flags & IEEE80211_TX_CTL_INJECTED))
1270 rtw89_core_tx_update_injection(rtwdev, tx_req, info);
1271 }
1272
rtw89_tx_wait_work(struct wiphy * wiphy,struct wiphy_work * work)1273 static void rtw89_tx_wait_work(struct wiphy *wiphy, struct wiphy_work *work)
1274 {
1275 struct rtw89_dev *rtwdev = container_of(work, struct rtw89_dev,
1276 tx_wait_work.work);
1277
1278 rtw89_tx_wait_list_clear(rtwdev);
1279 }
1280
rtw89_core_tx_kick_off(struct rtw89_dev * rtwdev,u8 qsel)1281 void rtw89_core_tx_kick_off(struct rtw89_dev *rtwdev, u8 qsel)
1282 {
1283 u8 ch_dma;
1284
1285 ch_dma = rtw89_chip_get_ch_dma(rtwdev, qsel);
1286
1287 rtw89_hci_tx_kick_off(rtwdev, ch_dma);
1288 }
1289
rtw89_core_tx_kick_off_and_wait(struct rtw89_dev * rtwdev,struct sk_buff * skb,struct rtw89_tx_wait_info * wait,int qsel,unsigned int timeout)1290 int rtw89_core_tx_kick_off_and_wait(struct rtw89_dev *rtwdev, struct sk_buff *skb,
1291 struct rtw89_tx_wait_info *wait, int qsel,
1292 unsigned int timeout)
1293 {
1294 unsigned long time_left;
1295 int ret = 0;
1296
1297 lockdep_assert_wiphy(rtwdev->hw->wiphy);
1298
1299 rtw89_core_tx_kick_off(rtwdev, qsel);
1300 time_left = wait_for_completion_timeout(&wait->completion,
1301 msecs_to_jiffies(timeout));
1302
1303 if (time_left == 0) {
1304 ret = -ETIMEDOUT;
1305 list_add_tail(&wait->list, &rtwdev->tx_waits);
1306 wiphy_delayed_work_queue(rtwdev->hw->wiphy, &rtwdev->tx_wait_work,
1307 RTW89_TX_WAIT_WORK_TIMEOUT);
1308 } else {
1309 if (!wait->tx_done)
1310 ret = -EAGAIN;
1311 rtw89_tx_wait_release(wait);
1312 }
1313
1314 return ret;
1315 }
1316
rtw89_h2c_tx(struct rtw89_dev * rtwdev,struct sk_buff * skb,bool fwdl)1317 int rtw89_h2c_tx(struct rtw89_dev *rtwdev,
1318 struct sk_buff *skb, bool fwdl)
1319 {
1320 struct rtw89_core_tx_request tx_req = {0};
1321 u32 cnt;
1322 int ret;
1323
1324 if (!test_bit(RTW89_FLAG_POWERON, rtwdev->flags)) {
1325 rtw89_debug(rtwdev, RTW89_DBG_FW,
1326 "ignore h2c due to power is off with firmware state=%d\n",
1327 test_bit(RTW89_FLAG_FW_RDY, rtwdev->flags));
1328 dev_kfree_skb(skb);
1329 return 0;
1330 }
1331
1332 tx_req.skb = skb;
1333 tx_req.tx_type = RTW89_CORE_TX_TYPE_FWCMD;
1334 if (fwdl)
1335 tx_req.desc_info.fw_dl = true;
1336
1337 rtw89_core_tx_update_desc_info(rtwdev, &tx_req);
1338
1339 if (!fwdl)
1340 rtw89_hex_dump(rtwdev, RTW89_DBG_FW, "H2C: ", skb->data, skb->len);
1341
1342 cnt = rtw89_hci_check_and_reclaim_tx_resource(rtwdev, RTW89_TXCH_CH12);
1343 if (cnt == 0) {
1344 rtw89_err(rtwdev, "no tx fwcmd resource\n");
1345 return -ENOSPC;
1346 }
1347
1348 ret = rtw89_hci_tx_write(rtwdev, &tx_req);
1349 if (ret) {
1350 rtw89_err(rtwdev, "failed to transmit skb to HCI\n");
1351 return ret;
1352 }
1353 rtw89_hci_tx_kick_off(rtwdev, RTW89_TXCH_CH12);
1354
1355 return 0;
1356 }
1357
rtw89_core_tx_write_link(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link,struct rtw89_sta_link * rtwsta_link,struct sk_buff * skb,int * qsel,bool sw_mld,struct rtw89_tx_wait_info * wait)1358 static int rtw89_core_tx_write_link(struct rtw89_dev *rtwdev,
1359 struct rtw89_vif_link *rtwvif_link,
1360 struct rtw89_sta_link *rtwsta_link,
1361 struct sk_buff *skb, int *qsel, bool sw_mld,
1362 struct rtw89_tx_wait_info *wait)
1363 {
1364 struct ieee80211_sta *sta = rtwsta_link_to_sta_safe(rtwsta_link);
1365 struct ieee80211_vif *vif = rtwvif_link_to_vif(rtwvif_link);
1366 struct rtw89_tx_skb_data *skb_data = RTW89_TX_SKB_CB(skb);
1367 struct rtw89_vif *rtwvif = rtwvif_link->rtwvif;
1368 struct rtw89_core_tx_request tx_req = {};
1369 int ret;
1370
1371 tx_req.skb = skb;
1372 tx_req.vif = vif;
1373 tx_req.sta = sta;
1374 tx_req.rtwvif_link = rtwvif_link;
1375 tx_req.rtwsta_link = rtwsta_link;
1376 tx_req.desc_info.sw_mld = sw_mld;
1377 rcu_assign_pointer(skb_data->wait, wait);
1378
1379 rtw89_traffic_stats_accu(rtwdev, rtwvif, skb, true, true);
1380 rtw89_wow_parse_akm(rtwdev, skb);
1381 rtw89_core_tx_update_desc_info(rtwdev, &tx_req);
1382 rtw89_core_tx_wake(rtwdev, &tx_req);
1383
1384 ret = rtw89_hci_tx_write(rtwdev, &tx_req);
1385 if (ret) {
1386 rtw89_err(rtwdev, "failed to transmit skb to HCI\n");
1387 return ret;
1388 }
1389
1390 if (qsel)
1391 *qsel = tx_req.desc_info.qsel;
1392
1393 return 0;
1394 }
1395
rtw89_core_tx_write(struct rtw89_dev * rtwdev,struct ieee80211_vif * vif,struct ieee80211_sta * sta,struct sk_buff * skb,int * qsel)1396 int rtw89_core_tx_write(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif,
1397 struct ieee80211_sta *sta, struct sk_buff *skb, int *qsel)
1398 {
1399 struct rtw89_sta *rtwsta = sta_to_rtwsta_safe(sta);
1400 struct rtw89_vif *rtwvif = vif_to_rtwvif(vif);
1401 struct rtw89_sta_link *rtwsta_link = NULL;
1402 struct rtw89_vif_link *rtwvif_link;
1403
1404 if (rtwsta) {
1405 rtwsta_link = rtw89_get_designated_link(rtwsta);
1406 if (unlikely(!rtwsta_link)) {
1407 rtw89_err(rtwdev, "tx: find no sta designated link\n");
1408 return -ENOLINK;
1409 }
1410
1411 rtwvif_link = rtwsta_link->rtwvif_link;
1412 } else {
1413 rtwvif_link = rtw89_get_designated_link(rtwvif);
1414 if (unlikely(!rtwvif_link)) {
1415 rtw89_err(rtwdev, "tx: find no vif designated link\n");
1416 return -ENOLINK;
1417 }
1418 }
1419
1420 return rtw89_core_tx_write_link(rtwdev, rtwvif_link, rtwsta_link, skb, qsel, false,
1421 NULL);
1422 }
1423
rtw89_build_txwd_body0(struct rtw89_tx_desc_info * desc_info)1424 static __le32 rtw89_build_txwd_body0(struct rtw89_tx_desc_info *desc_info)
1425 {
1426 u32 dword = FIELD_PREP(RTW89_TXWD_BODY0_WP_OFFSET, desc_info->wp_offset) |
1427 FIELD_PREP(RTW89_TXWD_BODY0_WD_INFO_EN, desc_info->en_wd_info) |
1428 FIELD_PREP(RTW89_TXWD_BODY0_CHANNEL_DMA, desc_info->ch_dma) |
1429 FIELD_PREP(RTW89_TXWD_BODY0_HDR_LLC_LEN, desc_info->hdr_llc_len) |
1430 FIELD_PREP(RTW89_TXWD_BODY0_WD_PAGE, desc_info->wd_page) |
1431 FIELD_PREP(RTW89_TXWD_BODY0_FW_DL, desc_info->fw_dl) |
1432 FIELD_PREP(RTW89_TXWD_BODY0_HW_SSN_SEL, desc_info->hw_ssn_sel) |
1433 FIELD_PREP(RTW89_TXWD_BODY0_HW_SSN_MODE, desc_info->hw_seq_mode);
1434
1435 return cpu_to_le32(dword);
1436 }
1437
rtw89_build_txwd_body0_v1(struct rtw89_tx_desc_info * desc_info)1438 static __le32 rtw89_build_txwd_body0_v1(struct rtw89_tx_desc_info *desc_info)
1439 {
1440 u32 dword = FIELD_PREP(RTW89_TXWD_BODY0_WP_OFFSET_V1, desc_info->wp_offset) |
1441 FIELD_PREP(RTW89_TXWD_BODY0_WD_INFO_EN, desc_info->en_wd_info) |
1442 FIELD_PREP(RTW89_TXWD_BODY0_CHANNEL_DMA, desc_info->ch_dma) |
1443 FIELD_PREP(RTW89_TXWD_BODY0_HDR_LLC_LEN, desc_info->hdr_llc_len) |
1444 FIELD_PREP(RTW89_TXWD_BODY0_WD_PAGE, desc_info->wd_page) |
1445 FIELD_PREP(RTW89_TXWD_BODY0_FW_DL, desc_info->fw_dl);
1446
1447 return cpu_to_le32(dword);
1448 }
1449
rtw89_build_txwd_body1_v1(struct rtw89_tx_desc_info * desc_info)1450 static __le32 rtw89_build_txwd_body1_v1(struct rtw89_tx_desc_info *desc_info)
1451 {
1452 u32 dword = FIELD_PREP(RTW89_TXWD_BODY1_ADDR_INFO_NUM, desc_info->addr_info_nr) |
1453 FIELD_PREP(RTW89_TXWD_BODY1_SEC_KEYID, desc_info->sec_keyid) |
1454 FIELD_PREP(RTW89_TXWD_BODY1_SEC_TYPE, desc_info->sec_type);
1455
1456 return cpu_to_le32(dword);
1457 }
1458
rtw89_build_txwd_body2(struct rtw89_tx_desc_info * desc_info)1459 static __le32 rtw89_build_txwd_body2(struct rtw89_tx_desc_info *desc_info)
1460 {
1461 u32 dword = FIELD_PREP(RTW89_TXWD_BODY2_TID_INDICATE, desc_info->tid_indicate) |
1462 FIELD_PREP(RTW89_TXWD_BODY2_QSEL, desc_info->qsel) |
1463 FIELD_PREP(RTW89_TXWD_BODY2_TXPKT_SIZE, desc_info->pkt_size) |
1464 FIELD_PREP(RTW89_TXWD_BODY2_MACID, desc_info->mac_id);
1465
1466 return cpu_to_le32(dword);
1467 }
1468
rtw89_build_txwd_body3(struct rtw89_tx_desc_info * desc_info)1469 static __le32 rtw89_build_txwd_body3(struct rtw89_tx_desc_info *desc_info)
1470 {
1471 u32 dword = FIELD_PREP(RTW89_TXWD_BODY3_SW_SEQ, desc_info->seq) |
1472 FIELD_PREP(RTW89_TXWD_BODY3_AGG_EN, desc_info->agg_en) |
1473 FIELD_PREP(RTW89_TXWD_BODY3_BK, desc_info->bk);
1474
1475 return cpu_to_le32(dword);
1476 }
1477
rtw89_build_txwd_body4(struct rtw89_tx_desc_info * desc_info)1478 static __le32 rtw89_build_txwd_body4(struct rtw89_tx_desc_info *desc_info)
1479 {
1480 u32 dword = FIELD_PREP(RTW89_TXWD_BODY4_SEC_IV_L0, desc_info->sec_seq[0]) |
1481 FIELD_PREP(RTW89_TXWD_BODY4_SEC_IV_L1, desc_info->sec_seq[1]);
1482
1483 return cpu_to_le32(dword);
1484 }
1485
rtw89_build_txwd_body5(struct rtw89_tx_desc_info * desc_info)1486 static __le32 rtw89_build_txwd_body5(struct rtw89_tx_desc_info *desc_info)
1487 {
1488 u32 dword = FIELD_PREP(RTW89_TXWD_BODY5_SEC_IV_H2, desc_info->sec_seq[2]) |
1489 FIELD_PREP(RTW89_TXWD_BODY5_SEC_IV_H3, desc_info->sec_seq[3]) |
1490 FIELD_PREP(RTW89_TXWD_BODY5_SEC_IV_H4, desc_info->sec_seq[4]) |
1491 FIELD_PREP(RTW89_TXWD_BODY5_SEC_IV_H5, desc_info->sec_seq[5]);
1492
1493 return cpu_to_le32(dword);
1494 }
1495
rtw89_build_txwd_body7_v1(struct rtw89_tx_desc_info * desc_info)1496 static __le32 rtw89_build_txwd_body7_v1(struct rtw89_tx_desc_info *desc_info)
1497 {
1498 u32 dword = FIELD_PREP(RTW89_TXWD_BODY7_USE_RATE_V1, desc_info->use_rate) |
1499 FIELD_PREP(RTW89_TXWD_BODY7_DATA_BW, desc_info->data_bw) |
1500 FIELD_PREP(RTW89_TXWD_BODY7_GI_LTF, desc_info->gi_ltf) |
1501 FIELD_PREP(RTW89_TXWD_BODY7_DATA_RATE, desc_info->data_rate);
1502
1503 return cpu_to_le32(dword);
1504 }
1505
rtw89_build_txwd_info0(struct rtw89_tx_desc_info * desc_info)1506 static __le32 rtw89_build_txwd_info0(struct rtw89_tx_desc_info *desc_info)
1507 {
1508 u32 dword = FIELD_PREP(RTW89_TXWD_INFO0_USE_RATE, desc_info->use_rate) |
1509 FIELD_PREP(RTW89_TXWD_INFO0_DATA_BW, desc_info->data_bw) |
1510 FIELD_PREP(RTW89_TXWD_INFO0_GI_LTF, desc_info->gi_ltf) |
1511 FIELD_PREP(RTW89_TXWD_INFO0_DATA_RATE, desc_info->data_rate) |
1512 FIELD_PREP(RTW89_TXWD_INFO0_DATA_STBC, desc_info->stbc) |
1513 FIELD_PREP(RTW89_TXWD_INFO0_DATA_LDPC, desc_info->ldpc) |
1514 FIELD_PREP(RTW89_TXWD_INFO0_DISDATAFB, desc_info->dis_data_fb) |
1515 FIELD_PREP(RTW89_TXWD_INFO0_MULTIPORT_ID, desc_info->port);
1516
1517 return cpu_to_le32(dword);
1518 }
1519
rtw89_build_txwd_info0_v1(struct rtw89_tx_desc_info * desc_info)1520 static __le32 rtw89_build_txwd_info0_v1(struct rtw89_tx_desc_info *desc_info)
1521 {
1522 u32 dword = FIELD_PREP(RTW89_TXWD_INFO0_DATA_STBC, desc_info->stbc) |
1523 FIELD_PREP(RTW89_TXWD_INFO0_DATA_LDPC, desc_info->ldpc) |
1524 FIELD_PREP(RTW89_TXWD_INFO0_DISDATAFB, desc_info->dis_data_fb) |
1525 FIELD_PREP(RTW89_TXWD_INFO0_MULTIPORT_ID, desc_info->port) |
1526 FIELD_PREP(RTW89_TXWD_INFO0_DATA_ER, desc_info->er_cap) |
1527 FIELD_PREP(RTW89_TXWD_INFO0_DATA_BW_ER, 0);
1528
1529 return cpu_to_le32(dword);
1530 }
1531
rtw89_build_txwd_info1(struct rtw89_tx_desc_info * desc_info)1532 static __le32 rtw89_build_txwd_info1(struct rtw89_tx_desc_info *desc_info)
1533 {
1534 u32 dword = FIELD_PREP(RTW89_TXWD_INFO1_MAX_AGGNUM, desc_info->ampdu_num) |
1535 FIELD_PREP(RTW89_TXWD_INFO1_A_CTRL_BSR, desc_info->a_ctrl_bsr) |
1536 FIELD_PREP(RTW89_TXWD_INFO1_DATA_RTY_LOWEST_RATE,
1537 desc_info->data_retry_lowest_rate) |
1538 FIELD_PREP(RTW89_TXWD_INFO1_DATA_TXCNT_LMT_SEL,
1539 desc_info->tx_cnt_lmt_en) |
1540 FIELD_PREP(RTW89_TXWD_INFO1_DATA_TXCNT_LMT, desc_info->tx_cnt_lmt);
1541
1542 return cpu_to_le32(dword);
1543 }
1544
rtw89_build_txwd_info2(struct rtw89_tx_desc_info * desc_info)1545 static __le32 rtw89_build_txwd_info2(struct rtw89_tx_desc_info *desc_info)
1546 {
1547 u32 dword = FIELD_PREP(RTW89_TXWD_INFO2_AMPDU_DENSITY, desc_info->ampdu_density) |
1548 FIELD_PREP(RTW89_TXWD_INFO2_SEC_TYPE, desc_info->sec_type) |
1549 FIELD_PREP(RTW89_TXWD_INFO2_SEC_HW_ENC, desc_info->sec_en) |
1550 FIELD_PREP(RTW89_TXWD_INFO2_SEC_CAM_IDX, desc_info->sec_cam_idx);
1551
1552 return cpu_to_le32(dword);
1553 }
1554
rtw89_build_txwd_info2_v1(struct rtw89_tx_desc_info * desc_info)1555 static __le32 rtw89_build_txwd_info2_v1(struct rtw89_tx_desc_info *desc_info)
1556 {
1557 u32 dword = FIELD_PREP(RTW89_TXWD_INFO2_AMPDU_DENSITY, desc_info->ampdu_density) |
1558 FIELD_PREP(RTW89_TXWD_INFO2_FORCE_KEY_EN, desc_info->sec_en) |
1559 FIELD_PREP(RTW89_TXWD_INFO2_SEC_CAM_IDX, desc_info->sec_cam_idx);
1560
1561 return cpu_to_le32(dword);
1562 }
1563
rtw89_build_txwd_info3(struct rtw89_tx_desc_info * desc_info)1564 static __le32 rtw89_build_txwd_info3(struct rtw89_tx_desc_info *desc_info)
1565 {
1566 u32 dword = FIELD_PREP(RTW89_TXWD_INFO3_SPE_RPT, desc_info->report);
1567
1568 return cpu_to_le32(dword);
1569 }
1570
rtw89_build_txwd_info4(struct rtw89_tx_desc_info * desc_info)1571 static __le32 rtw89_build_txwd_info4(struct rtw89_tx_desc_info *desc_info)
1572 {
1573 bool rts_en = !desc_info->is_bmc;
1574 u32 dword = FIELD_PREP(RTW89_TXWD_INFO4_RTS_EN, rts_en) |
1575 FIELD_PREP(RTW89_TXWD_INFO4_HW_RTS_EN, 1) |
1576 FIELD_PREP(RTW89_TXWD_INFO4_SW_DEFINE, desc_info->sn);
1577
1578 return cpu_to_le32(dword);
1579 }
1580
rtw89_core_fill_txdesc(struct rtw89_dev * rtwdev,struct rtw89_tx_desc_info * desc_info,void * txdesc)1581 void rtw89_core_fill_txdesc(struct rtw89_dev *rtwdev,
1582 struct rtw89_tx_desc_info *desc_info,
1583 void *txdesc)
1584 {
1585 struct rtw89_txwd_body *txwd_body = (struct rtw89_txwd_body *)txdesc;
1586 struct rtw89_txwd_info *txwd_info;
1587
1588 txwd_body->dword0 = rtw89_build_txwd_body0(desc_info);
1589 txwd_body->dword2 = rtw89_build_txwd_body2(desc_info);
1590 txwd_body->dword3 = rtw89_build_txwd_body3(desc_info);
1591
1592 if (!desc_info->en_wd_info)
1593 return;
1594
1595 txwd_info = (struct rtw89_txwd_info *)(txwd_body + 1);
1596 txwd_info->dword0 = rtw89_build_txwd_info0(desc_info);
1597 txwd_info->dword1 = rtw89_build_txwd_info1(desc_info);
1598 txwd_info->dword2 = rtw89_build_txwd_info2(desc_info);
1599 txwd_info->dword3 = rtw89_build_txwd_info3(desc_info);
1600 txwd_info->dword4 = rtw89_build_txwd_info4(desc_info);
1601
1602 }
1603 EXPORT_SYMBOL(rtw89_core_fill_txdesc);
1604
rtw89_core_fill_txdesc_v1(struct rtw89_dev * rtwdev,struct rtw89_tx_desc_info * desc_info,void * txdesc)1605 void rtw89_core_fill_txdesc_v1(struct rtw89_dev *rtwdev,
1606 struct rtw89_tx_desc_info *desc_info,
1607 void *txdesc)
1608 {
1609 struct rtw89_txwd_body_v1 *txwd_body = (struct rtw89_txwd_body_v1 *)txdesc;
1610 struct rtw89_txwd_info *txwd_info;
1611
1612 txwd_body->dword0 = rtw89_build_txwd_body0_v1(desc_info);
1613 txwd_body->dword1 = rtw89_build_txwd_body1_v1(desc_info);
1614 txwd_body->dword2 = rtw89_build_txwd_body2(desc_info);
1615 txwd_body->dword3 = rtw89_build_txwd_body3(desc_info);
1616 if (desc_info->sec_en) {
1617 txwd_body->dword4 = rtw89_build_txwd_body4(desc_info);
1618 txwd_body->dword5 = rtw89_build_txwd_body5(desc_info);
1619 }
1620 txwd_body->dword7 = rtw89_build_txwd_body7_v1(desc_info);
1621
1622 if (!desc_info->en_wd_info)
1623 return;
1624
1625 txwd_info = (struct rtw89_txwd_info *)(txwd_body + 1);
1626 txwd_info->dword0 = rtw89_build_txwd_info0_v1(desc_info);
1627 txwd_info->dword1 = rtw89_build_txwd_info1(desc_info);
1628 txwd_info->dword2 = rtw89_build_txwd_info2_v1(desc_info);
1629 txwd_info->dword3 = rtw89_build_txwd_info3(desc_info);
1630 txwd_info->dword4 = rtw89_build_txwd_info4(desc_info);
1631 }
1632 EXPORT_SYMBOL(rtw89_core_fill_txdesc_v1);
1633
rtw89_build_txwd_body0_v2(struct rtw89_tx_desc_info * desc_info)1634 static __le32 rtw89_build_txwd_body0_v2(struct rtw89_tx_desc_info *desc_info)
1635 {
1636 u32 dword = FIELD_PREP(BE_TXD_BODY0_WP_OFFSET_V1, desc_info->wp_offset) |
1637 FIELD_PREP(BE_TXD_BODY0_WDINFO_EN, desc_info->en_wd_info) |
1638 FIELD_PREP(BE_TXD_BODY0_CH_DMA, desc_info->ch_dma) |
1639 FIELD_PREP(BE_TXD_BODY0_HDR_LLC_LEN, desc_info->hdr_llc_len) |
1640 FIELD_PREP(BE_TXD_BODY0_WD_PAGE, desc_info->wd_page);
1641
1642 return cpu_to_le32(dword);
1643 }
1644
rtw89_build_txwd_body1_v2(struct rtw89_tx_desc_info * desc_info)1645 static __le32 rtw89_build_txwd_body1_v2(struct rtw89_tx_desc_info *desc_info)
1646 {
1647 u32 dword = FIELD_PREP(BE_TXD_BODY1_ADDR_INFO_NUM, desc_info->addr_info_nr) |
1648 FIELD_PREP(BE_TXD_BODY1_SEC_KEYID, desc_info->sec_keyid) |
1649 FIELD_PREP(BE_TXD_BODY1_SEC_TYPE, desc_info->sec_type);
1650
1651 return cpu_to_le32(dword);
1652 }
1653
rtw89_build_txwd_body2_v2(struct rtw89_tx_desc_info * desc_info)1654 static __le32 rtw89_build_txwd_body2_v2(struct rtw89_tx_desc_info *desc_info)
1655 {
1656 u32 dword = FIELD_PREP(BE_TXD_BODY2_TID_IND, desc_info->tid_indicate) |
1657 FIELD_PREP(BE_TXD_BODY2_QSEL, desc_info->qsel) |
1658 FIELD_PREP(BE_TXD_BODY2_TXPKTSIZE, desc_info->pkt_size) |
1659 FIELD_PREP(BE_TXD_BODY2_AGG_EN, desc_info->agg_en) |
1660 FIELD_PREP(BE_TXD_BODY2_BK, desc_info->bk) |
1661 FIELD_PREP(BE_TXD_BODY2_MACID, desc_info->mac_id);
1662
1663 return cpu_to_le32(dword);
1664 }
1665
rtw89_build_txwd_body3_v2(struct rtw89_tx_desc_info * desc_info)1666 static __le32 rtw89_build_txwd_body3_v2(struct rtw89_tx_desc_info *desc_info)
1667 {
1668 u32 dword = FIELD_PREP(BE_TXD_BODY3_WIFI_SEQ, desc_info->seq) |
1669 FIELD_PREP(BE_TXD_BODY3_MLO_FLAG, desc_info->mlo) |
1670 FIELD_PREP(BE_TXD_BODY3_IS_MLD_SW_EN, desc_info->sw_mld);
1671
1672 return cpu_to_le32(dword);
1673 }
1674
rtw89_build_txwd_body4_v2(struct rtw89_tx_desc_info * desc_info)1675 static __le32 rtw89_build_txwd_body4_v2(struct rtw89_tx_desc_info *desc_info)
1676 {
1677 u32 dword = FIELD_PREP(BE_TXD_BODY4_SEC_IV_L0, desc_info->sec_seq[0]) |
1678 FIELD_PREP(BE_TXD_BODY4_SEC_IV_L1, desc_info->sec_seq[1]);
1679
1680 return cpu_to_le32(dword);
1681 }
1682
rtw89_build_txwd_body5_v2(struct rtw89_tx_desc_info * desc_info)1683 static __le32 rtw89_build_txwd_body5_v2(struct rtw89_tx_desc_info *desc_info)
1684 {
1685 u32 dword = FIELD_PREP(BE_TXD_BODY5_SEC_IV_H2, desc_info->sec_seq[2]) |
1686 FIELD_PREP(BE_TXD_BODY5_SEC_IV_H3, desc_info->sec_seq[3]) |
1687 FIELD_PREP(BE_TXD_BODY5_SEC_IV_H4, desc_info->sec_seq[4]) |
1688 FIELD_PREP(BE_TXD_BODY5_SEC_IV_H5, desc_info->sec_seq[5]);
1689
1690 return cpu_to_le32(dword);
1691 }
1692
rtw89_build_txwd_body6_v2(struct rtw89_tx_desc_info * desc_info)1693 static __le32 rtw89_build_txwd_body6_v2(struct rtw89_tx_desc_info *desc_info)
1694 {
1695 u32 dword = FIELD_PREP(BE_TXD_BODY6_UPD_WLAN_HDR, desc_info->upd_wlan_hdr);
1696
1697 return cpu_to_le32(dword);
1698 }
1699
rtw89_build_txwd_body7_v2(struct rtw89_tx_desc_info * desc_info)1700 static __le32 rtw89_build_txwd_body7_v2(struct rtw89_tx_desc_info *desc_info)
1701 {
1702 u32 dword = FIELD_PREP(BE_TXD_BODY7_USERATE_SEL, desc_info->use_rate) |
1703 FIELD_PREP(BE_TXD_BODY7_DATA_BW, desc_info->data_bw) |
1704 FIELD_PREP(BE_TXD_BODY7_GI_LTF, desc_info->gi_ltf) |
1705 FIELD_PREP(BE_TXD_BODY7_DATA_ER, desc_info->er_cap) |
1706 FIELD_PREP(BE_TXD_BODY7_DATA_BW_ER, 0) |
1707 FIELD_PREP(BE_TXD_BODY7_DATARATE, desc_info->data_rate);
1708
1709 return cpu_to_le32(dword);
1710 }
1711
rtw89_build_txwd_info0_v2(struct rtw89_tx_desc_info * desc_info)1712 static __le32 rtw89_build_txwd_info0_v2(struct rtw89_tx_desc_info *desc_info)
1713 {
1714 u32 dword = FIELD_PREP(BE_TXD_INFO0_DATA_STBC, desc_info->stbc) |
1715 FIELD_PREP(BE_TXD_INFO0_DATA_LDPC, desc_info->ldpc) |
1716 FIELD_PREP(BE_TXD_INFO0_DISDATAFB, desc_info->dis_data_fb) |
1717 FIELD_PREP(BE_TXD_INFO0_MULTIPORT_ID, desc_info->port) |
1718 FIELD_PREP(BE_TXD_INFO0_DATA_TXCNT_LMT_SEL,
1719 desc_info->tx_cnt_lmt_en) |
1720 FIELD_PREP(BE_TXD_INFO0_DATA_TXCNT_LMT, desc_info->tx_cnt_lmt);
1721
1722 return cpu_to_le32(dword);
1723 }
1724
rtw89_build_txwd_info1_v2(struct rtw89_tx_desc_info * desc_info)1725 static __le32 rtw89_build_txwd_info1_v2(struct rtw89_tx_desc_info *desc_info)
1726 {
1727 u32 dword = FIELD_PREP(BE_TXD_INFO1_MAX_AGG_NUM, desc_info->ampdu_num) |
1728 FIELD_PREP(BE_TXD_INFO1_A_CTRL_BSR, desc_info->a_ctrl_bsr) |
1729 FIELD_PREP(BE_TXD_INFO1_DATA_RTY_LOWEST_RATE,
1730 desc_info->data_retry_lowest_rate) |
1731 FIELD_PREP(BE_TXD_INFO1_SW_DEFINE, desc_info->sn);
1732
1733 return cpu_to_le32(dword);
1734 }
1735
rtw89_build_txwd_info2_v2(struct rtw89_tx_desc_info * desc_info)1736 static __le32 rtw89_build_txwd_info2_v2(struct rtw89_tx_desc_info *desc_info)
1737 {
1738 u32 dword = FIELD_PREP(BE_TXD_INFO2_AMPDU_DENSITY, desc_info->ampdu_density) |
1739 FIELD_PREP(BE_TXD_INFO2_FORCE_KEY_EN, desc_info->sec_en) |
1740 FIELD_PREP(BE_TXD_INFO2_SEC_CAM_IDX, desc_info->sec_cam_idx) |
1741 FIELD_PREP(BE_TXD_INFO2_SPE_RPT_V1, desc_info->report);
1742
1743 return cpu_to_le32(dword);
1744 }
1745
rtw89_build_txwd_info4_v2(struct rtw89_tx_desc_info * desc_info)1746 static __le32 rtw89_build_txwd_info4_v2(struct rtw89_tx_desc_info *desc_info)
1747 {
1748 bool rts_en = !desc_info->is_bmc;
1749 u32 dword = FIELD_PREP(BE_TXD_INFO4_RTS_EN, rts_en) |
1750 FIELD_PREP(BE_TXD_INFO4_HW_RTS_EN, 1);
1751
1752 return cpu_to_le32(dword);
1753 }
1754
rtw89_core_fill_txdesc_v2(struct rtw89_dev * rtwdev,struct rtw89_tx_desc_info * desc_info,void * txdesc)1755 void rtw89_core_fill_txdesc_v2(struct rtw89_dev *rtwdev,
1756 struct rtw89_tx_desc_info *desc_info,
1757 void *txdesc)
1758 {
1759 struct rtw89_txwd_body_v2 *txwd_body = txdesc;
1760 struct rtw89_txwd_info_v2 *txwd_info;
1761
1762 txwd_body->dword0 = rtw89_build_txwd_body0_v2(desc_info);
1763 txwd_body->dword1 = rtw89_build_txwd_body1_v2(desc_info);
1764 txwd_body->dword2 = rtw89_build_txwd_body2_v2(desc_info);
1765 txwd_body->dword3 = rtw89_build_txwd_body3_v2(desc_info);
1766 if (desc_info->sec_en) {
1767 txwd_body->dword4 = rtw89_build_txwd_body4_v2(desc_info);
1768 txwd_body->dword5 = rtw89_build_txwd_body5_v2(desc_info);
1769 }
1770 txwd_body->dword6 = rtw89_build_txwd_body6_v2(desc_info);
1771 txwd_body->dword7 = rtw89_build_txwd_body7_v2(desc_info);
1772
1773 if (!desc_info->en_wd_info)
1774 return;
1775
1776 txwd_info = (struct rtw89_txwd_info_v2 *)(txwd_body + 1);
1777 txwd_info->dword0 = rtw89_build_txwd_info0_v2(desc_info);
1778 txwd_info->dword1 = rtw89_build_txwd_info1_v2(desc_info);
1779 txwd_info->dword2 = rtw89_build_txwd_info2_v2(desc_info);
1780 txwd_info->dword4 = rtw89_build_txwd_info4_v2(desc_info);
1781 }
1782 EXPORT_SYMBOL(rtw89_core_fill_txdesc_v2);
1783
rtw89_build_txwd_fwcmd0_v1(struct rtw89_tx_desc_info * desc_info)1784 static __le32 rtw89_build_txwd_fwcmd0_v1(struct rtw89_tx_desc_info *desc_info)
1785 {
1786 u32 dword = FIELD_PREP(AX_RXD_RPKT_LEN_MASK, desc_info->pkt_size) |
1787 FIELD_PREP(AX_RXD_RPKT_TYPE_MASK, desc_info->fw_dl ?
1788 RTW89_CORE_RX_TYPE_FWDL :
1789 RTW89_CORE_RX_TYPE_H2C);
1790
1791 return cpu_to_le32(dword);
1792 }
1793
rtw89_core_fill_txdesc_fwcmd_v1(struct rtw89_dev * rtwdev,struct rtw89_tx_desc_info * desc_info,void * txdesc)1794 void rtw89_core_fill_txdesc_fwcmd_v1(struct rtw89_dev *rtwdev,
1795 struct rtw89_tx_desc_info *desc_info,
1796 void *txdesc)
1797 {
1798 struct rtw89_rxdesc_short *txwd_v1 = (struct rtw89_rxdesc_short *)txdesc;
1799
1800 txwd_v1->dword0 = rtw89_build_txwd_fwcmd0_v1(desc_info);
1801 }
1802 EXPORT_SYMBOL(rtw89_core_fill_txdesc_fwcmd_v1);
1803
rtw89_build_txwd_fwcmd0_v2(struct rtw89_tx_desc_info * desc_info)1804 static __le32 rtw89_build_txwd_fwcmd0_v2(struct rtw89_tx_desc_info *desc_info)
1805 {
1806 u32 dword = FIELD_PREP(BE_RXD_RPKT_LEN_MASK, desc_info->pkt_size) |
1807 FIELD_PREP(BE_RXD_RPKT_TYPE_MASK, desc_info->fw_dl ?
1808 RTW89_CORE_RX_TYPE_FWDL :
1809 RTW89_CORE_RX_TYPE_H2C);
1810
1811 return cpu_to_le32(dword);
1812 }
1813
rtw89_core_fill_txdesc_fwcmd_v2(struct rtw89_dev * rtwdev,struct rtw89_tx_desc_info * desc_info,void * txdesc)1814 void rtw89_core_fill_txdesc_fwcmd_v2(struct rtw89_dev *rtwdev,
1815 struct rtw89_tx_desc_info *desc_info,
1816 void *txdesc)
1817 {
1818 struct rtw89_rxdesc_short_v2 *txwd_v2 = (struct rtw89_rxdesc_short_v2 *)txdesc;
1819
1820 txwd_v2->dword0 = rtw89_build_txwd_fwcmd0_v2(desc_info);
1821 }
1822 EXPORT_SYMBOL(rtw89_core_fill_txdesc_fwcmd_v2);
1823
rtw89_core_rx_process_mac_ppdu(struct rtw89_dev * rtwdev,struct sk_buff * skb,struct rtw89_rx_phy_ppdu * phy_ppdu)1824 static int rtw89_core_rx_process_mac_ppdu(struct rtw89_dev *rtwdev,
1825 struct sk_buff *skb,
1826 struct rtw89_rx_phy_ppdu *phy_ppdu)
1827 {
1828 const struct rtw89_chip_info *chip = rtwdev->chip;
1829 const struct rtw89_rxinfo *rxinfo = (const struct rtw89_rxinfo *)skb->data;
1830 const struct rtw89_rxinfo_user *user;
1831 enum rtw89_chip_gen chip_gen = rtwdev->chip->chip_gen;
1832 int rx_cnt_size = RTW89_PPDU_MAC_RX_CNT_SIZE;
1833 bool rx_cnt_valid = false;
1834 bool invalid = false;
1835 u8 plcp_size = 0;
1836 u8 *phy_sts;
1837 u8 usr_num;
1838 int i;
1839
1840 if (chip_gen == RTW89_CHIP_BE) {
1841 invalid = le32_get_bits(rxinfo->w0, RTW89_RXINFO_W0_INVALID_V1);
1842 rx_cnt_size = RTW89_PPDU_MAC_RX_CNT_SIZE_V1;
1843 }
1844
1845 if (invalid)
1846 return -EINVAL;
1847
1848 rx_cnt_valid = le32_get_bits(rxinfo->w0, RTW89_RXINFO_W0_RX_CNT_VLD);
1849 if (chip_gen == RTW89_CHIP_BE) {
1850 plcp_size = le32_get_bits(rxinfo->w0, RTW89_RXINFO_W0_PLCP_LEN_V1) << 3;
1851 usr_num = le32_get_bits(rxinfo->w0, RTW89_RXINFO_W0_USR_NUM_V1);
1852 } else {
1853 plcp_size = le32_get_bits(rxinfo->w1, RTW89_RXINFO_W1_PLCP_LEN) << 3;
1854 usr_num = le32_get_bits(rxinfo->w0, RTW89_RXINFO_W0_USR_NUM);
1855 }
1856 if (usr_num > chip->ppdu_max_usr) {
1857 rtw89_warn(rtwdev, "Invalid user number (%d) in mac info\n",
1858 usr_num);
1859 return -EINVAL;
1860 }
1861
1862 for (i = 0; i < usr_num; i++) {
1863 user = &rxinfo->user[i];
1864 if (!le32_get_bits(user->w0, RTW89_RXINFO_USER_MAC_ID_VALID))
1865 continue;
1866 /* For WiFi 7 chips, RXWD.mac_id of PPDU status is not set
1867 * by hardware, so update mac_id by rxinfo_user[].mac_id.
1868 */
1869 if (chip->chip_id == RTL8922A)
1870 phy_ppdu->mac_id =
1871 le32_get_bits(user->w0, RTW89_RXINFO_USER_MACID);
1872 else if (chip->chip_id == RTL8922D)
1873 phy_ppdu->mac_id =
1874 le32_get_bits(user->w0, RTW89_RXINFO_USER_MACID_V1);
1875
1876 phy_ppdu->has_data =
1877 le32_get_bits(user->w0, RTW89_RXINFO_USER_DATA);
1878 phy_ppdu->has_bcn =
1879 le32_get_bits(user->w0, RTW89_RXINFO_USER_BCN);
1880 break;
1881 }
1882
1883 phy_sts = skb->data + RTW89_PPDU_MAC_INFO_SIZE;
1884 phy_sts += usr_num * RTW89_PPDU_MAC_INFO_USR_SIZE;
1885 /* 8-byte alignment */
1886 if (usr_num & BIT(0))
1887 phy_sts += RTW89_PPDU_MAC_INFO_USR_SIZE;
1888 if (rx_cnt_valid)
1889 phy_sts += rx_cnt_size;
1890 phy_sts += plcp_size;
1891
1892 if (phy_sts > skb->data + skb->len)
1893 return -EINVAL;
1894
1895 phy_ppdu->buf = phy_sts;
1896 phy_ppdu->len = skb->data + skb->len - phy_sts;
1897
1898 return 0;
1899 }
1900
rtw89_get_data_rate_nss(struct rtw89_dev * rtwdev,u16 data_rate)1901 static u8 rtw89_get_data_rate_nss(struct rtw89_dev *rtwdev, u16 data_rate)
1902 {
1903 u8 data_rate_mode;
1904
1905 data_rate_mode = rtw89_get_data_rate_mode(rtwdev, data_rate);
1906 switch (data_rate_mode) {
1907 case DATA_RATE_MODE_NON_HT:
1908 return 1;
1909 case DATA_RATE_MODE_HT:
1910 return rtw89_get_data_ht_nss(rtwdev, data_rate) + 1;
1911 case DATA_RATE_MODE_VHT:
1912 case DATA_RATE_MODE_HE:
1913 case DATA_RATE_MODE_EHT:
1914 return rtw89_get_data_nss(rtwdev, data_rate) + 1;
1915 default:
1916 rtw89_warn(rtwdev, "invalid RX rate mode %d\n", data_rate_mode);
1917 return 0;
1918 }
1919 }
1920
rtw89_core_rx_process_phy_ppdu_iter(void * data,struct ieee80211_sta * sta)1921 static void rtw89_core_rx_process_phy_ppdu_iter(void *data,
1922 struct ieee80211_sta *sta)
1923 {
1924 struct rtw89_rx_phy_ppdu *phy_ppdu = (struct rtw89_rx_phy_ppdu *)data;
1925 struct rtw89_sta *rtwsta = sta_to_rtwsta(sta);
1926 struct rtw89_dev *rtwdev = rtwsta->rtwdev;
1927 struct rtw89_hal *hal = &rtwdev->hal;
1928 struct rtw89_sta_link *rtwsta_link;
1929 u8 ant_num = hal->ant_diversity ? 2 : rtwdev->chip->rf_path_num;
1930 u8 ant_pos = U8_MAX;
1931 u8 evm_pos = 0;
1932 int i;
1933
1934 rtwsta_link = rtw89_sta_get_link_inst(rtwsta, phy_ppdu->phy_idx);
1935 if (unlikely(!rtwsta_link))
1936 return;
1937
1938 if (rtwsta_link->mac_id != phy_ppdu->mac_id || !phy_ppdu->to_self)
1939 return;
1940
1941 if (hal->ant_diversity && hal->antenna_rx) {
1942 ant_pos = __ffs(hal->antenna_rx);
1943 evm_pos = ant_pos;
1944 }
1945
1946 ewma_rssi_add(&rtwsta_link->avg_rssi, phy_ppdu->rssi_avg);
1947
1948 if (ant_pos < ant_num) {
1949 ewma_rssi_add(&rtwsta_link->rssi[ant_pos], phy_ppdu->rssi[0]);
1950 } else {
1951 for (i = 0; i < rtwdev->chip->rf_path_num; i++)
1952 ewma_rssi_add(&rtwsta_link->rssi[i], phy_ppdu->rssi[i]);
1953 }
1954
1955 if (phy_ppdu->ofdm.has && (phy_ppdu->has_data || phy_ppdu->has_bcn)) {
1956 ewma_snr_add(&rtwsta_link->avg_snr, phy_ppdu->ofdm.avg_snr);
1957 if (rtw89_get_data_rate_nss(rtwdev, phy_ppdu->rate) == 1) {
1958 ewma_evm_add(&rtwsta_link->evm_1ss, phy_ppdu->ofdm.evm_min);
1959 } else {
1960 ewma_evm_add(&rtwsta_link->evm_min[evm_pos],
1961 phy_ppdu->ofdm.evm_min);
1962 ewma_evm_add(&rtwsta_link->evm_max[evm_pos],
1963 phy_ppdu->ofdm.evm_max);
1964 }
1965 }
1966 }
1967
1968 #define VAR_LEN 0xff
1969 #define VAR_LEN_UNIT 8
rtw89_core_get_phy_status_ie_len(struct rtw89_dev * rtwdev,const struct rtw89_phy_sts_iehdr * iehdr)1970 static u16 rtw89_core_get_phy_status_ie_len(struct rtw89_dev *rtwdev,
1971 const struct rtw89_phy_sts_iehdr *iehdr)
1972 {
1973 static const u8 physts_ie_len_tabs[RTW89_CHIP_GEN_NUM][32] = {
1974 [RTW89_CHIP_AX] = {
1975 16, 32, 24, 24, 8, 8, 8, 8, VAR_LEN, 8, VAR_LEN, 176, VAR_LEN,
1976 VAR_LEN, VAR_LEN, VAR_LEN, VAR_LEN, VAR_LEN, 16, 24, VAR_LEN,
1977 VAR_LEN, VAR_LEN, 0, 24, 24, 24, 24, 32, 32, 32, 32
1978 },
1979 [RTW89_CHIP_BE] = {
1980 32, 40, 24, 24, 8, 8, 8, 8, VAR_LEN, 8, VAR_LEN, 176, VAR_LEN,
1981 VAR_LEN, VAR_LEN, VAR_LEN, VAR_LEN, VAR_LEN, 88, 56, VAR_LEN,
1982 VAR_LEN, VAR_LEN, 0, 24, 24, 24, 24, 32, 32, 32, 32
1983 },
1984 };
1985 const u8 *physts_ie_len_tab;
1986 u16 ie_len;
1987 u8 ie;
1988
1989 physts_ie_len_tab = physts_ie_len_tabs[rtwdev->chip->chip_gen];
1990
1991 ie = le32_get_bits(iehdr->w0, RTW89_PHY_STS_IEHDR_TYPE);
1992 if (physts_ie_len_tab[ie] != VAR_LEN)
1993 ie_len = physts_ie_len_tab[ie];
1994 else
1995 ie_len = le32_get_bits(iehdr->w0, RTW89_PHY_STS_IEHDR_LEN) * VAR_LEN_UNIT;
1996
1997 return ie_len;
1998 }
1999
rtw89_core_parse_phy_status_ie01_v2(struct rtw89_dev * rtwdev,const struct rtw89_phy_sts_iehdr * iehdr,struct rtw89_rx_phy_ppdu * phy_ppdu)2000 static void rtw89_core_parse_phy_status_ie01_v2(struct rtw89_dev *rtwdev,
2001 const struct rtw89_phy_sts_iehdr *iehdr,
2002 struct rtw89_rx_phy_ppdu *phy_ppdu)
2003 {
2004 const struct rtw89_phy_sts_ie01_v2 *ie;
2005 u8 *rpl_fd = phy_ppdu->rpl_fd;
2006
2007 ie = (const struct rtw89_phy_sts_ie01_v2 *)iehdr;
2008 rpl_fd[RF_PATH_A] = le32_get_bits(ie->w8, RTW89_PHY_STS_IE01_V2_W8_RPL_FD_A);
2009 rpl_fd[RF_PATH_B] = le32_get_bits(ie->w8, RTW89_PHY_STS_IE01_V2_W8_RPL_FD_B);
2010 rpl_fd[RF_PATH_C] = le32_get_bits(ie->w9, RTW89_PHY_STS_IE01_V2_W9_RPL_FD_C);
2011 rpl_fd[RF_PATH_D] = le32_get_bits(ie->w9, RTW89_PHY_STS_IE01_V2_W9_RPL_FD_D);
2012
2013 phy_ppdu->bw_idx = le32_get_bits(ie->w5, RTW89_PHY_STS_IE01_V2_W5_BW_IDX);
2014 }
2015
rtw89_core_parse_phy_status_ie01(struct rtw89_dev * rtwdev,const struct rtw89_phy_sts_iehdr * iehdr,struct rtw89_rx_phy_ppdu * phy_ppdu)2016 static void rtw89_core_parse_phy_status_ie01(struct rtw89_dev *rtwdev,
2017 const struct rtw89_phy_sts_iehdr *iehdr,
2018 struct rtw89_rx_phy_ppdu *phy_ppdu)
2019 {
2020 const struct rtw89_phy_sts_ie01 *ie = (const struct rtw89_phy_sts_ie01 *)iehdr;
2021 s16 cfo;
2022 u32 t;
2023
2024 phy_ppdu->chan_idx = le32_get_bits(ie->w0, RTW89_PHY_STS_IE01_W0_CH_IDX);
2025
2026 if (rtwdev->hw->conf.flags & IEEE80211_CONF_MONITOR) {
2027 phy_ppdu->ldpc = le32_get_bits(ie->w2, RTW89_PHY_STS_IE01_W2_LDPC);
2028 phy_ppdu->stbc = le32_get_bits(ie->w2, RTW89_PHY_STS_IE01_W2_STBC);
2029 }
2030
2031 if (!phy_ppdu->hdr_2_en)
2032 phy_ppdu->rx_path_en =
2033 le32_get_bits(ie->w0, RTW89_PHY_STS_IE01_W0_RX_PATH_EN);
2034
2035 if (phy_ppdu->rate < RTW89_HW_RATE_OFDM6)
2036 return;
2037
2038 if (!phy_ppdu->to_self)
2039 return;
2040
2041 phy_ppdu->rpl_avg = le32_get_bits(ie->w0, RTW89_PHY_STS_IE01_W0_RSSI_AVG_FD);
2042 phy_ppdu->ofdm.avg_snr = le32_get_bits(ie->w2, RTW89_PHY_STS_IE01_W2_AVG_SNR);
2043 phy_ppdu->ofdm.evm_max = le32_get_bits(ie->w2, RTW89_PHY_STS_IE01_W2_EVM_MAX);
2044 phy_ppdu->ofdm.evm_min = le32_get_bits(ie->w2, RTW89_PHY_STS_IE01_W2_EVM_MIN);
2045 phy_ppdu->ofdm.has = true;
2046
2047 /* sign conversion for S(12,2) */
2048 if (rtwdev->chip->cfo_src_fd) {
2049 t = le32_get_bits(ie->w1, RTW89_PHY_STS_IE01_W1_FD_CFO);
2050 cfo = sign_extend32(t, 11);
2051 } else {
2052 t = le32_get_bits(ie->w1, RTW89_PHY_STS_IE01_W1_PREMB_CFO);
2053 cfo = sign_extend32(t, 11);
2054 }
2055
2056 rtw89_phy_cfo_parse(rtwdev, cfo, phy_ppdu);
2057
2058 if (rtwdev->chip->chip_gen == RTW89_CHIP_BE)
2059 rtw89_core_parse_phy_status_ie01_v2(rtwdev, iehdr, phy_ppdu);
2060 }
2061
rtw89_core_parse_phy_status_ie00(struct rtw89_dev * rtwdev,const struct rtw89_phy_sts_iehdr * iehdr,struct rtw89_rx_phy_ppdu * phy_ppdu)2062 static void rtw89_core_parse_phy_status_ie00(struct rtw89_dev *rtwdev,
2063 const struct rtw89_phy_sts_iehdr *iehdr,
2064 struct rtw89_rx_phy_ppdu *phy_ppdu)
2065 {
2066 const struct rtw89_phy_sts_ie00 *ie = (const struct rtw89_phy_sts_ie00 *)iehdr;
2067 u16 tmp_rpl;
2068
2069 tmp_rpl = le32_get_bits(ie->w0, RTW89_PHY_STS_IE00_W0_RPL);
2070 phy_ppdu->rpl_avg = tmp_rpl >> 1;
2071
2072 if (!phy_ppdu->hdr_2_en)
2073 phy_ppdu->rx_path_en =
2074 le32_get_bits(ie->w3, RTW89_PHY_STS_IE00_W3_RX_PATH_EN);
2075 }
2076
rtw89_core_parse_phy_status_ie00_v2(struct rtw89_dev * rtwdev,const struct rtw89_phy_sts_iehdr * iehdr,struct rtw89_rx_phy_ppdu * phy_ppdu)2077 static void rtw89_core_parse_phy_status_ie00_v2(struct rtw89_dev *rtwdev,
2078 const struct rtw89_phy_sts_iehdr *iehdr,
2079 struct rtw89_rx_phy_ppdu *phy_ppdu)
2080 {
2081 const struct rtw89_phy_sts_ie00_v2 *ie;
2082 u8 *rpl_path = phy_ppdu->rpl_path;
2083 u16 tmp_rpl[RF_PATH_MAX];
2084 u8 i;
2085
2086 ie = (const struct rtw89_phy_sts_ie00_v2 *)iehdr;
2087 tmp_rpl[RF_PATH_A] = le32_get_bits(ie->w4, RTW89_PHY_STS_IE00_V2_W4_RPL_TD_A);
2088 tmp_rpl[RF_PATH_B] = le32_get_bits(ie->w4, RTW89_PHY_STS_IE00_V2_W4_RPL_TD_B);
2089 tmp_rpl[RF_PATH_C] = le32_get_bits(ie->w4, RTW89_PHY_STS_IE00_V2_W4_RPL_TD_C);
2090 tmp_rpl[RF_PATH_D] = le32_get_bits(ie->w5, RTW89_PHY_STS_IE00_V2_W5_RPL_TD_D);
2091
2092 for (i = 0; i < RF_PATH_MAX; i++)
2093 rpl_path[i] = tmp_rpl[i] >> 1;
2094 }
2095
rtw89_core_process_phy_status_ie(struct rtw89_dev * rtwdev,const struct rtw89_phy_sts_iehdr * iehdr,struct rtw89_rx_phy_ppdu * phy_ppdu)2096 static int rtw89_core_process_phy_status_ie(struct rtw89_dev *rtwdev,
2097 const struct rtw89_phy_sts_iehdr *iehdr,
2098 struct rtw89_rx_phy_ppdu *phy_ppdu)
2099 {
2100 u8 ie;
2101
2102 ie = le32_get_bits(iehdr->w0, RTW89_PHY_STS_IEHDR_TYPE);
2103
2104 switch (ie) {
2105 case RTW89_PHYSTS_IE00_CMN_CCK:
2106 rtw89_core_parse_phy_status_ie00(rtwdev, iehdr, phy_ppdu);
2107 if (rtwdev->chip->chip_gen == RTW89_CHIP_BE)
2108 rtw89_core_parse_phy_status_ie00_v2(rtwdev, iehdr, phy_ppdu);
2109 break;
2110 case RTW89_PHYSTS_IE01_CMN_OFDM:
2111 rtw89_core_parse_phy_status_ie01(rtwdev, iehdr, phy_ppdu);
2112 break;
2113 default:
2114 break;
2115 }
2116
2117 return 0;
2118 }
2119
rtw89_core_update_phy_ppdu_hdr_v2(struct rtw89_rx_phy_ppdu * phy_ppdu)2120 static void rtw89_core_update_phy_ppdu_hdr_v2(struct rtw89_rx_phy_ppdu *phy_ppdu)
2121 {
2122 #if defined(__linux__)
2123 const struct rtw89_phy_sts_hdr_v2 *hdr = phy_ppdu->buf + PHY_STS_HDR_LEN;
2124 #elif defined(__FreeBSD__)
2125 const struct rtw89_phy_sts_hdr_v2 *hdr = (void *)((u8 *)phy_ppdu->buf + PHY_STS_HDR_LEN);
2126 #endif
2127
2128 phy_ppdu->rx_path_en = le32_get_bits(hdr->w0, RTW89_PHY_STS_HDR_V2_W0_PATH_EN);
2129 }
2130
rtw89_core_update_phy_ppdu(struct rtw89_rx_phy_ppdu * phy_ppdu)2131 static void rtw89_core_update_phy_ppdu(struct rtw89_rx_phy_ppdu *phy_ppdu)
2132 {
2133 const struct rtw89_phy_sts_hdr *hdr = phy_ppdu->buf;
2134 u8 *rssi = phy_ppdu->rssi;
2135
2136 phy_ppdu->ie = le32_get_bits(hdr->w0, RTW89_PHY_STS_HDR_W0_IE_MAP);
2137 phy_ppdu->rssi_avg = le32_get_bits(hdr->w0, RTW89_PHY_STS_HDR_W0_RSSI_AVG);
2138 rssi[RF_PATH_A] = le32_get_bits(hdr->w1, RTW89_PHY_STS_HDR_W1_RSSI_A);
2139 rssi[RF_PATH_B] = le32_get_bits(hdr->w1, RTW89_PHY_STS_HDR_W1_RSSI_B);
2140 rssi[RF_PATH_C] = le32_get_bits(hdr->w1, RTW89_PHY_STS_HDR_W1_RSSI_C);
2141 rssi[RF_PATH_D] = le32_get_bits(hdr->w1, RTW89_PHY_STS_HDR_W1_RSSI_D);
2142
2143 phy_ppdu->hdr_2_en = le32_get_bits(hdr->w0, RTW89_PHY_STS_HDR_W0_HDR_2_EN);
2144 if (phy_ppdu->hdr_2_en)
2145 rtw89_core_update_phy_ppdu_hdr_v2(phy_ppdu);
2146 }
2147
rtw89_core_rx_process_phy_ppdu(struct rtw89_dev * rtwdev,struct rtw89_rx_phy_ppdu * phy_ppdu)2148 static int rtw89_core_rx_process_phy_ppdu(struct rtw89_dev *rtwdev,
2149 struct rtw89_rx_phy_ppdu *phy_ppdu)
2150 {
2151 const struct rtw89_phy_sts_hdr *hdr = phy_ppdu->buf;
2152 u32 len_from_header;
2153 bool physts_valid;
2154
2155 physts_valid = le32_get_bits(hdr->w0, RTW89_PHY_STS_HDR_W0_VALID);
2156 if (!physts_valid)
2157 return -EINVAL;
2158
2159 len_from_header = le32_get_bits(hdr->w0, RTW89_PHY_STS_HDR_W0_LEN) << 3;
2160
2161 if (rtwdev->chip->chip_gen == RTW89_CHIP_BE)
2162 len_from_header += PHY_STS_HDR_LEN;
2163
2164 if (len_from_header != phy_ppdu->len) {
2165 rtw89_debug(rtwdev, RTW89_DBG_UNEXP, "phy ppdu len mismatch\n");
2166 return -EINVAL;
2167 }
2168 rtw89_core_update_phy_ppdu(phy_ppdu);
2169
2170 return 0;
2171 }
2172
rtw89_core_rx_parse_phy_sts(struct rtw89_dev * rtwdev,struct rtw89_rx_phy_ppdu * phy_ppdu)2173 static int rtw89_core_rx_parse_phy_sts(struct rtw89_dev *rtwdev,
2174 struct rtw89_rx_phy_ppdu *phy_ppdu)
2175 {
2176 u16 ie_len;
2177 #if defined(__linux__)
2178 void *pos, *end;
2179 #elif defined(__FreeBSD__)
2180 u8 *pos, *end;
2181 #endif
2182
2183 /* mark invalid reports and bypass them */
2184 if (phy_ppdu->ie < RTW89_CCK_PKT)
2185 return -EINVAL;
2186
2187 #if defined(__linux__)
2188 pos = phy_ppdu->buf + PHY_STS_HDR_LEN;
2189 if (phy_ppdu->hdr_2_en)
2190 pos += PHY_STS_HDR_LEN;
2191 end = phy_ppdu->buf + phy_ppdu->len;
2192 #elif defined(__FreeBSD__)
2193 pos = (u8 *)phy_ppdu->buf + PHY_STS_HDR_LEN;
2194 end = (u8 *)phy_ppdu->buf + phy_ppdu->len;
2195 #endif
2196 while (pos < end) {
2197 #if defined(__linux__)
2198 const struct rtw89_phy_sts_iehdr *iehdr = pos;
2199 #elif defined(__FreeBSD__)
2200 const struct rtw89_phy_sts_iehdr *iehdr = (void *)pos;
2201 #endif
2202
2203 ie_len = rtw89_core_get_phy_status_ie_len(rtwdev, iehdr);
2204 rtw89_core_process_phy_status_ie(rtwdev, iehdr, phy_ppdu);
2205 pos += ie_len;
2206 if (pos > end || ie_len == 0) {
2207 rtw89_debug(rtwdev, RTW89_DBG_TXRX,
2208 "phy status parse failed\n");
2209 return -EINVAL;
2210 }
2211 }
2212
2213 rtw89_chip_convert_rpl_to_rssi(rtwdev, phy_ppdu);
2214 rtw89_phy_antdiv_parse(rtwdev, phy_ppdu);
2215
2216 return 0;
2217 }
2218
rtw89_core_rx_process_phy_sts(struct rtw89_dev * rtwdev,struct rtw89_rx_phy_ppdu * phy_ppdu)2219 static void rtw89_core_rx_process_phy_sts(struct rtw89_dev *rtwdev,
2220 struct rtw89_rx_phy_ppdu *phy_ppdu)
2221 {
2222 int ret;
2223
2224 ret = rtw89_core_rx_parse_phy_sts(rtwdev, phy_ppdu);
2225 if (ret)
2226 rtw89_debug(rtwdev, RTW89_DBG_TXRX, "parse phy sts failed\n");
2227 else
2228 phy_ppdu->valid = true;
2229
2230 ieee80211_iterate_stations_atomic(rtwdev->hw,
2231 rtw89_core_rx_process_phy_ppdu_iter,
2232 phy_ppdu);
2233 }
2234
rtw89_rxdesc_to_nl_he_gi(struct rtw89_dev * rtwdev,u8 desc_info_gi,bool rx_status)2235 static u8 rtw89_rxdesc_to_nl_he_gi(struct rtw89_dev *rtwdev,
2236 u8 desc_info_gi,
2237 bool rx_status)
2238 {
2239 switch (desc_info_gi) {
2240 case RTW89_GILTF_SGI_4XHE08:
2241 case RTW89_GILTF_2XHE08:
2242 case RTW89_GILTF_1XHE08:
2243 return NL80211_RATE_INFO_HE_GI_0_8;
2244 case RTW89_GILTF_2XHE16:
2245 case RTW89_GILTF_1XHE16:
2246 return NL80211_RATE_INFO_HE_GI_1_6;
2247 case RTW89_GILTF_LGI_4XHE32:
2248 return NL80211_RATE_INFO_HE_GI_3_2;
2249 default:
2250 rtw89_warn(rtwdev, "invalid gi_ltf=%d", desc_info_gi);
2251 if (rx_status)
2252 return NL80211_RATE_INFO_HE_GI_3_2;
2253 return U8_MAX;
2254 }
2255 }
2256
rtw89_rxdesc_to_nl_eht_gi(struct rtw89_dev * rtwdev,u8 desc_info_gi,bool rx_status)2257 static u8 rtw89_rxdesc_to_nl_eht_gi(struct rtw89_dev *rtwdev,
2258 u8 desc_info_gi,
2259 bool rx_status)
2260 {
2261 switch (desc_info_gi) {
2262 case RTW89_GILTF_SGI_4XHE08:
2263 case RTW89_GILTF_2XHE08:
2264 case RTW89_GILTF_1XHE08:
2265 return NL80211_RATE_INFO_EHT_GI_0_8;
2266 case RTW89_GILTF_2XHE16:
2267 case RTW89_GILTF_1XHE16:
2268 return NL80211_RATE_INFO_EHT_GI_1_6;
2269 case RTW89_GILTF_LGI_4XHE32:
2270 return NL80211_RATE_INFO_EHT_GI_3_2;
2271 default:
2272 rtw89_warn(rtwdev, "invalid gi_ltf=%d", desc_info_gi);
2273 if (rx_status)
2274 return NL80211_RATE_INFO_EHT_GI_3_2;
2275 return U8_MAX;
2276 }
2277 }
2278
rtw89_rxdesc_to_nl_he_eht_gi(struct rtw89_dev * rtwdev,u8 desc_info_gi,bool rx_status,bool eht)2279 static u8 rtw89_rxdesc_to_nl_he_eht_gi(struct rtw89_dev *rtwdev,
2280 u8 desc_info_gi,
2281 bool rx_status, bool eht)
2282 {
2283 return eht ? rtw89_rxdesc_to_nl_eht_gi(rtwdev, desc_info_gi, rx_status) :
2284 rtw89_rxdesc_to_nl_he_gi(rtwdev, desc_info_gi, rx_status);
2285 }
2286
2287 static
rtw89_check_rx_statu_gi_match(struct ieee80211_rx_status * status,u8 gi_ltf,bool eht)2288 bool rtw89_check_rx_statu_gi_match(struct ieee80211_rx_status *status, u8 gi_ltf,
2289 bool eht)
2290 {
2291 if (eht)
2292 return status->eht.gi == gi_ltf;
2293
2294 return status->he_gi == gi_ltf;
2295 }
2296
rtw89_core_rx_ppdu_match(struct rtw89_dev * rtwdev,struct rtw89_rx_desc_info * desc_info,struct ieee80211_rx_status * status)2297 static bool rtw89_core_rx_ppdu_match(struct rtw89_dev *rtwdev,
2298 struct rtw89_rx_desc_info *desc_info,
2299 struct ieee80211_rx_status *status)
2300 {
2301 u8 band = desc_info->bb_sel ? RTW89_PHY_1 : RTW89_PHY_0;
2302 u8 data_rate_mode, bw, rate_idx = MASKBYTE0, gi_ltf;
2303 bool eht = false;
2304 u16 data_rate;
2305 bool ret;
2306
2307 data_rate = desc_info->data_rate;
2308 data_rate_mode = rtw89_get_data_rate_mode(rtwdev, data_rate);
2309 if (data_rate_mode == DATA_RATE_MODE_NON_HT) {
2310 rate_idx = rtw89_get_data_not_ht_idx(rtwdev, data_rate);
2311 /* rate_idx is still hardware value here */
2312 } else if (data_rate_mode == DATA_RATE_MODE_HT) {
2313 rate_idx = rtw89_get_data_ht_mcs(rtwdev, data_rate);
2314 } else if (data_rate_mode == DATA_RATE_MODE_VHT ||
2315 data_rate_mode == DATA_RATE_MODE_HE ||
2316 data_rate_mode == DATA_RATE_MODE_EHT) {
2317 rate_idx = rtw89_get_data_mcs(rtwdev, data_rate);
2318 } else {
2319 rtw89_warn(rtwdev, "invalid RX rate mode %d\n", data_rate_mode);
2320 }
2321
2322 eht = data_rate_mode == DATA_RATE_MODE_EHT;
2323 bw = rtw89_hw_to_rate_info_bw(desc_info->bw);
2324 gi_ltf = rtw89_rxdesc_to_nl_he_eht_gi(rtwdev, desc_info->gi_ltf, false, eht);
2325 ret = rtwdev->ppdu_sts.curr_rx_ppdu_cnt[band] == desc_info->ppdu_cnt &&
2326 status->rate_idx == rate_idx &&
2327 rtw89_check_rx_statu_gi_match(status, gi_ltf, eht) &&
2328 status->bw == bw;
2329
2330 return ret;
2331 }
2332
2333 struct rtw89_vif_rx_stats_iter_data {
2334 struct rtw89_dev *rtwdev;
2335 struct rtw89_rx_phy_ppdu *phy_ppdu;
2336 struct rtw89_rx_desc_info *desc_info;
2337 struct sk_buff *skb;
2338 const u8 *bssid;
2339 };
2340
rtw89_stats_trigger_frame(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link,struct ieee80211_bss_conf * bss_conf,struct sk_buff * skb)2341 static void rtw89_stats_trigger_frame(struct rtw89_dev *rtwdev,
2342 struct rtw89_vif_link *rtwvif_link,
2343 struct ieee80211_bss_conf *bss_conf,
2344 struct sk_buff *skb)
2345 {
2346 struct ieee80211_trigger *tf = (struct ieee80211_trigger *)skb->data;
2347 struct ieee80211_vif *vif = rtwvif_link_to_vif(rtwvif_link);
2348 struct rtw89_vif *rtwvif = rtwvif_link->rtwvif;
2349 u8 *pos, *end, type, tf_bw;
2350 u16 aid, tf_rua;
2351
2352 if (!ether_addr_equal(bss_conf->bssid, tf->ta) ||
2353 rtwvif_link->wifi_role != RTW89_WIFI_ROLE_STATION ||
2354 rtwvif_link->net_type == RTW89_NET_TYPE_NO_LINK)
2355 return;
2356
2357 type = le64_get_bits(tf->common_info, IEEE80211_TRIGGER_TYPE_MASK);
2358 if (type != IEEE80211_TRIGGER_TYPE_BASIC && type != IEEE80211_TRIGGER_TYPE_MU_BAR)
2359 return;
2360
2361 end = (u8 *)tf + skb->len;
2362 pos = tf->variable;
2363
2364 while (end - pos >= RTW89_TF_BASIC_USER_INFO_SZ) {
2365 aid = RTW89_GET_TF_USER_INFO_AID12(pos);
2366 tf_rua = RTW89_GET_TF_USER_INFO_RUA(pos);
2367 tf_bw = le64_get_bits(tf->common_info, IEEE80211_TRIGGER_ULBW_MASK);
2368 rtw89_debug(rtwdev, RTW89_DBG_TXRX,
2369 "[TF] aid: %d, ul_mcs: %d, rua: %d, bw: %d\n",
2370 aid, RTW89_GET_TF_USER_INFO_UL_MCS(pos),
2371 tf_rua, tf_bw);
2372
2373 if (aid == RTW89_TF_PAD)
2374 break;
2375
2376 if (aid == vif->cfg.aid) {
2377 enum nl80211_he_ru_alloc rua;
2378
2379 rtwvif->stats.rx_tf_acc++;
2380 rtwdev->stats.rx_tf_acc++;
2381
2382 /* The following only required for HE trigger frame, but we
2383 * cannot use UL HE-SIG-A2 reserved subfield to identify it
2384 * since some 11ax APs will fill it with all 0s, which will
2385 * be misunderstood as EHT trigger frame.
2386 */
2387 if (bss_conf->eht_support)
2388 break;
2389
2390 rua = rtw89_he_rua_to_ru_alloc(tf_rua >> 1);
2391
2392 if (tf_bw == IEEE80211_TRIGGER_ULBW_160_80P80MHZ &&
2393 rua <= NL80211_RATE_INFO_HE_RU_ALLOC_106)
2394 rtwvif_link->pwr_diff_en = true;
2395 break;
2396 }
2397
2398 pos += RTW89_TF_BASIC_USER_INFO_SZ;
2399 }
2400 }
2401
rtw89_cancel_6ghz_probe_work(struct wiphy * wiphy,struct wiphy_work * work)2402 static void rtw89_cancel_6ghz_probe_work(struct wiphy *wiphy, struct wiphy_work *work)
2403 {
2404 struct rtw89_dev *rtwdev = container_of(work, struct rtw89_dev,
2405 cancel_6ghz_probe_work);
2406 struct list_head *pkt_list = rtwdev->scan_info.pkt_list;
2407 struct rtw89_pktofld_info *info;
2408
2409 lockdep_assert_wiphy(wiphy);
2410
2411 if (!rtwdev->scanning)
2412 return;
2413
2414 list_for_each_entry(info, &pkt_list[NL80211_BAND_6GHZ], list) {
2415 if (!info->cancel || !test_bit(info->id, rtwdev->pkt_offload))
2416 continue;
2417
2418 rtw89_fw_h2c_del_pkt_offload(rtwdev, info->id);
2419
2420 /* Don't delete/free info from pkt_list at this moment. Let it
2421 * be deleted/freed in rtw89_release_pkt_list() after scanning,
2422 * since if during scanning, pkt_list is accessed in bottom half.
2423 */
2424 }
2425 }
2426
rtw89_core_cancel_6ghz_probe_tx(struct rtw89_dev * rtwdev,struct sk_buff * skb)2427 static void rtw89_core_cancel_6ghz_probe_tx(struct rtw89_dev *rtwdev,
2428 struct sk_buff *skb)
2429 {
2430 struct ieee80211_rx_status *rx_status = IEEE80211_SKB_RXCB(skb);
2431 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data;
2432 struct list_head *pkt_list = rtwdev->scan_info.pkt_list;
2433 struct rtw89_pktofld_info *info;
2434 const u8 *ies = mgmt->u.beacon.variable, *ssid_ie;
2435 bool queue_work = false;
2436
2437 if (rx_status->band != NL80211_BAND_6GHZ)
2438 return;
2439
2440 if (unlikely(!(rtwdev->chip->support_bands & BIT(NL80211_BAND_6GHZ)))) {
2441 rtw89_debug(rtwdev, RTW89_DBG_UNEXP, "invalid rx on unsupported 6 GHz\n");
2442 return;
2443 }
2444
2445 ssid_ie = cfg80211_find_ie(WLAN_EID_SSID, ies, skb->len);
2446
2447 list_for_each_entry(info, &pkt_list[NL80211_BAND_6GHZ], list) {
2448 if (ether_addr_equal(info->bssid, mgmt->bssid)) {
2449 info->cancel = true;
2450 queue_work = true;
2451 continue;
2452 }
2453
2454 if (!ssid_ie || ssid_ie[1] != info->ssid_len || info->ssid_len == 0)
2455 continue;
2456
2457 if (memcmp(&ssid_ie[2], info->ssid, info->ssid_len) == 0) {
2458 info->cancel = true;
2459 queue_work = true;
2460 }
2461 }
2462
2463 if (queue_work)
2464 wiphy_work_queue(rtwdev->hw->wiphy, &rtwdev->cancel_6ghz_probe_work);
2465 }
2466
rtw89_vif_sync_bcn_tsf(struct rtw89_vif_link * rtwvif_link,struct ieee80211_hdr * hdr,size_t len)2467 static void rtw89_vif_sync_bcn_tsf(struct rtw89_vif_link *rtwvif_link,
2468 struct ieee80211_hdr *hdr, size_t len)
2469 {
2470 struct ieee80211_mgmt *mgmt = (typeof(mgmt))hdr;
2471
2472 if (len < offsetof(typeof(*mgmt), u.beacon.variable))
2473 return;
2474
2475 WRITE_ONCE(rtwvif_link->sync_bcn_tsf, le64_to_cpu(mgmt->u.beacon.timestamp));
2476 }
2477
rtw89_bcn_calc_min_tbtt(struct rtw89_dev * rtwdev,u32 tbtt1,u32 tbtt2)2478 static u32 rtw89_bcn_calc_min_tbtt(struct rtw89_dev *rtwdev, u32 tbtt1, u32 tbtt2)
2479 {
2480 struct rtw89_beacon_track_info *bcn_track = &rtwdev->bcn_track;
2481 u32 close_bcn_intvl_th = bcn_track->close_bcn_intvl_th;
2482 u32 tbtt_diff_th = bcn_track->tbtt_diff_th;
2483
2484 if (tbtt2 > tbtt1)
2485 swap(tbtt1, tbtt2);
2486
2487 if (tbtt1 - tbtt2 > tbtt_diff_th)
2488 return tbtt1;
2489 else if (tbtt2 > close_bcn_intvl_th)
2490 return tbtt2;
2491 else if (tbtt1 > close_bcn_intvl_th)
2492 return tbtt1;
2493 else
2494 return tbtt2;
2495 }
2496
rtw89_bcn_cfg_tbtt_offset(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link)2497 static void rtw89_bcn_cfg_tbtt_offset(struct rtw89_dev *rtwdev,
2498 struct rtw89_vif_link *rtwvif_link)
2499 {
2500 struct rtw89_beacon_track_info *bcn_track = &rtwdev->bcn_track;
2501 enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id;
2502 u32 offset = bcn_track->tbtt_offset;
2503
2504 if (chip_id == RTL8852A || rtw89_is_rtl885xb(rtwdev)) {
2505 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;
2506 const struct rtw89_port_reg *p = mac->port_base;
2507 u32 bcnspc, val;
2508
2509 bcnspc = rtw89_read32_port_mask(rtwdev, rtwvif_link,
2510 p->bcn_space, B_AX_BCN_SPACE_MASK);
2511 val = bcnspc - (offset / 1024);
2512 val = u32_encode_bits(val, B_AX_TBTT_SHIFT_OFST_MAG) |
2513 B_AX_TBTT_SHIFT_OFST_SIGN;
2514
2515 rtw89_write16_port_mask(rtwdev, rtwvif_link, p->tbtt_shift,
2516 B_AX_TBTT_SHIFT_OFST_MASK, val);
2517
2518 return;
2519 }
2520
2521 rtw89_fw_h2c_tbtt_tuning(rtwdev, rtwvif_link, offset);
2522 }
2523
rtw89_bcn_update_tbtt_offset(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link)2524 static void rtw89_bcn_update_tbtt_offset(struct rtw89_dev *rtwdev,
2525 struct rtw89_vif_link *rtwvif_link)
2526 {
2527 struct rtw89_beacon_stat *bcn_stat = &rtwdev->phystat.bcn_stat;
2528 struct rtw89_beacon_track_info *bcn_track = &rtwdev->bcn_track;
2529 u32 *tbtt_us = bcn_stat->tbtt_us;
2530 u32 offset = tbtt_us[0];
2531 u8 i;
2532
2533 for (i = 1; i < RTW89_BCN_TRACK_STAT_NR; i++)
2534 offset = rtw89_bcn_calc_min_tbtt(rtwdev, tbtt_us[i], offset);
2535
2536 if (bcn_track->tbtt_offset == offset)
2537 return;
2538
2539 bcn_track->tbtt_offset = offset;
2540 rtw89_bcn_cfg_tbtt_offset(rtwdev, rtwvif_link);
2541 }
2542
cmp_u16(const void * a,const void * b)2543 static int cmp_u16(const void *a, const void *b)
2544 {
2545 return *(const u16 *)a - *(const u16 *)b;
2546 }
2547
_rtw89_bcn_calc_drift(u16 tbtt,u16 offset,u16 beacon_int)2548 static u16 _rtw89_bcn_calc_drift(u16 tbtt, u16 offset, u16 beacon_int)
2549 {
2550 if (tbtt < offset)
2551 return beacon_int - offset + tbtt;
2552
2553 return tbtt - offset;
2554 }
2555
rtw89_bcn_calc_drift(struct rtw89_dev * rtwdev)2556 static void rtw89_bcn_calc_drift(struct rtw89_dev *rtwdev)
2557 {
2558 struct rtw89_beacon_stat *bcn_stat = &rtwdev->phystat.bcn_stat;
2559 struct rtw89_beacon_track_info *bcn_track = &rtwdev->bcn_track;
2560 u16 offset_tu = bcn_track->tbtt_offset / 1024;
2561 u16 *tbtt_tu = bcn_stat->tbtt_tu;
2562 u16 *drift = bcn_stat->drift;
2563 u8 i;
2564
2565 bcn_stat->tbtt_tu_min = U16_MAX;
2566 bcn_stat->tbtt_tu_max = 0;
2567 for (i = 0; i < RTW89_BCN_TRACK_STAT_NR; i++) {
2568 drift[i] = _rtw89_bcn_calc_drift(tbtt_tu[i], offset_tu,
2569 bcn_track->beacon_int);
2570
2571 bcn_stat->tbtt_tu_min = min(bcn_stat->tbtt_tu_min, tbtt_tu[i]);
2572 bcn_stat->tbtt_tu_max = max(bcn_stat->tbtt_tu_max, tbtt_tu[i]);
2573 }
2574
2575 sort(drift, RTW89_BCN_TRACK_STAT_NR, sizeof(*drift), cmp_u16, NULL);
2576 }
2577
rtw89_bcn_calc_distribution(struct rtw89_dev * rtwdev)2578 static void rtw89_bcn_calc_distribution(struct rtw89_dev *rtwdev)
2579 {
2580 struct rtw89_beacon_stat *bcn_stat = &rtwdev->phystat.bcn_stat;
2581 struct rtw89_beacon_dist *bcn_dist = &bcn_stat->bcn_dist;
2582 u16 lower_bound, upper_bound, outlier_count = 0;
2583 u16 *drift = bcn_stat->drift;
2584 u16 *bins = bcn_dist->bins;
2585 u16 q1, q3, iqr, tmp;
2586 u8 i;
2587
2588 BUILD_BUG_ON(RTW89_BCN_TRACK_STAT_NR % 4 != 0);
2589
2590 memset(bcn_dist, 0, sizeof(*bcn_dist));
2591
2592 bcn_dist->min = drift[0];
2593 bcn_dist->max = drift[RTW89_BCN_TRACK_STAT_NR - 1];
2594
2595 tmp = RTW89_BCN_TRACK_STAT_NR / 4;
2596 q1 = ((drift[tmp] + drift[tmp - 1]) * RTW89_BCN_TRACK_SCALE_FACTOR) / 2;
2597
2598 tmp = (RTW89_BCN_TRACK_STAT_NR * 3) / 4;
2599 q3 = ((drift[tmp] + drift[tmp - 1]) * RTW89_BCN_TRACK_SCALE_FACTOR) / 2;
2600
2601 iqr = q3 - q1;
2602 tmp = (3 * iqr) / 2;
2603
2604 if (bcn_dist->min <= 5)
2605 lower_bound = bcn_dist->min;
2606 else if (q1 > tmp)
2607 lower_bound = (q1 - tmp) / RTW89_BCN_TRACK_SCALE_FACTOR;
2608 else
2609 lower_bound = 0;
2610
2611 upper_bound = (q3 + tmp) / RTW89_BCN_TRACK_SCALE_FACTOR;
2612
2613 for (i = 0; i < RTW89_BCN_TRACK_STAT_NR; i++) {
2614 u16 tbtt = bcn_stat->tbtt_tu[i];
2615 u16 min = bcn_stat->tbtt_tu_min;
2616 u8 bin_idx;
2617
2618 /* histogram */
2619 bin_idx = min((tbtt - min) / RTW89_BCN_TRACK_BIN_WIDTH,
2620 RTW89_BCN_TRACK_MAX_BIN_NUM - 1);
2621 bins[bin_idx]++;
2622
2623 /* boxplot outlier */
2624 if (drift[i] < lower_bound || drift[i] > upper_bound)
2625 outlier_count++;
2626 }
2627
2628 bcn_dist->outlier_count = outlier_count;
2629 bcn_dist->lower_bound = lower_bound;
2630 bcn_dist->upper_bound = upper_bound;
2631 }
2632
rtw89_bcn_get_coverage(struct rtw89_dev * rtwdev,u16 threshold)2633 static u8 rtw89_bcn_get_coverage(struct rtw89_dev *rtwdev, u16 threshold)
2634 {
2635 struct rtw89_beacon_stat *bcn_stat = &rtwdev->phystat.bcn_stat;
2636 int l = 0, r = RTW89_BCN_TRACK_STAT_NR - 1, m;
2637 u16 *drift = bcn_stat->drift;
2638 int index = -1;
2639 u8 count = 0;
2640
2641 while (l <= r) {
2642 m = l + (r - l) / 2;
2643
2644 if (drift[m] <= threshold) {
2645 index = m;
2646 l = m + 1;
2647 } else {
2648 r = m - 1;
2649 }
2650 }
2651
2652 count = (index == -1) ? 0 : (index + 1);
2653
2654 return (count * PERCENT) / RTW89_BCN_TRACK_STAT_NR;
2655 }
2656
rtw89_bcn_get_histogram_bound(struct rtw89_dev * rtwdev,u8 target)2657 static u16 rtw89_bcn_get_histogram_bound(struct rtw89_dev *rtwdev, u8 target)
2658 {
2659 struct rtw89_beacon_stat *bcn_stat = &rtwdev->phystat.bcn_stat;
2660 struct rtw89_beacon_dist *bcn_dist = &bcn_stat->bcn_dist;
2661 u16 tbtt_tu_max = bcn_stat->tbtt_tu_max;
2662 u16 upper, lower = bcn_stat->tbtt_tu_min;
2663 u8 i, count = 0;
2664
2665 for (i = 0; i < RTW89_BCN_TRACK_MAX_BIN_NUM; i++) {
2666 upper = lower + RTW89_BCN_TRACK_BIN_WIDTH - 1;
2667 if (i == RTW89_BCN_TRACK_MAX_BIN_NUM - 1)
2668 upper = max(upper, tbtt_tu_max);
2669
2670 count += bcn_dist->bins[i];
2671 if (count > target)
2672 break;
2673
2674 lower = upper + 1;
2675 }
2676
2677 return upper;
2678 }
2679
rtw89_bcn_get_rx_time(struct rtw89_dev * rtwdev,const struct rtw89_chan * chan)2680 static u16 rtw89_bcn_get_rx_time(struct rtw89_dev *rtwdev,
2681 const struct rtw89_chan *chan)
2682 {
2683 #define RTW89_SYMBOL_TIME_2GHZ 192
2684 #define RTW89_SYMBOL_TIME_5GHZ 20
2685 #define RTW89_SYMBOL_TIME_6GHZ 20
2686 struct rtw89_pkt_stat *pkt_stat = &rtwdev->phystat.cur_pkt_stat;
2687 u16 bitrate, val;
2688
2689 if (!rtw89_legacy_rate_to_bitrate(rtwdev, pkt_stat->beacon_rate, &bitrate))
2690 return 0;
2691
2692 val = (pkt_stat->beacon_len * 8 * RTW89_BCN_TRACK_SCALE_FACTOR) / bitrate;
2693
2694 switch (chan->band_type) {
2695 default:
2696 case RTW89_BAND_2G:
2697 val += RTW89_SYMBOL_TIME_2GHZ;
2698 break;
2699 case RTW89_BAND_5G:
2700 val += RTW89_SYMBOL_TIME_5GHZ;
2701 break;
2702 case RTW89_BAND_6G:
2703 val += RTW89_SYMBOL_TIME_6GHZ;
2704 break;
2705 }
2706
2707 /* convert to millisecond */
2708 return DIV_ROUND_UP(val, 1000);
2709 }
2710
rtw89_bcn_calc_timeout(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link)2711 static void rtw89_bcn_calc_timeout(struct rtw89_dev *rtwdev,
2712 struct rtw89_vif_link *rtwvif_link)
2713 {
2714 #define RTW89_BCN_TRACK_EXTEND_TIMEOUT 5
2715 #define RTW89_BCN_TRACK_COVERAGE_TH 0 /* unit: TU */
2716 #define RTW89_BCN_TRACK_STRONG_RSSI 80
2717 const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, rtwvif_link->chanctx_idx);
2718 struct rtw89_pkt_stat *pkt_stat = &rtwdev->phystat.cur_pkt_stat;
2719 struct rtw89_beacon_stat *bcn_stat = &rtwdev->phystat.bcn_stat;
2720 struct rtw89_beacon_track_info *bcn_track = &rtwdev->bcn_track;
2721 struct rtw89_beacon_dist *bcn_dist = &bcn_stat->bcn_dist;
2722 u16 outlier_high_bcn_th = bcn_track->outlier_high_bcn_th;
2723 u16 outlier_low_bcn_th = bcn_track->outlier_low_bcn_th;
2724 u8 rssi = ewma_rssi_read(&rtwdev->phystat.bcn_rssi);
2725 u16 target_bcn_th = bcn_track->target_bcn_th;
2726 u16 low_bcn_th = bcn_track->low_bcn_th;
2727 u16 med_bcn_th = bcn_track->med_bcn_th;
2728 u16 beacon_int = bcn_track->beacon_int;
2729 u16 bcn_timeout;
2730
2731 if (pkt_stat->beacon_nr < low_bcn_th) {
2732 bcn_timeout = (RTW89_BCN_TRACK_TARGET_BCN * beacon_int) / PERCENT;
2733 goto out;
2734 }
2735
2736 if (bcn_dist->outlier_count >= outlier_high_bcn_th) {
2737 bcn_timeout = bcn_dist->max;
2738 goto out;
2739 }
2740
2741 if (pkt_stat->beacon_nr < med_bcn_th) {
2742 if (bcn_dist->outlier_count > outlier_low_bcn_th)
2743 bcn_timeout = (bcn_dist->max + bcn_dist->upper_bound) / 2;
2744 else
2745 bcn_timeout = bcn_dist->upper_bound +
2746 RTW89_BCN_TRACK_EXTEND_TIMEOUT;
2747
2748 goto out;
2749 }
2750
2751 if (rssi >= RTW89_BCN_TRACK_STRONG_RSSI) {
2752 if (rtw89_bcn_get_coverage(rtwdev, RTW89_BCN_TRACK_COVERAGE_TH) >= 90) {
2753 /* ideal case */
2754 bcn_timeout = 0;
2755 } else {
2756 u16 offset_tu = bcn_track->tbtt_offset / 1024;
2757 u16 upper_bound;
2758
2759 upper_bound =
2760 rtw89_bcn_get_histogram_bound(rtwdev, target_bcn_th);
2761 bcn_timeout =
2762 _rtw89_bcn_calc_drift(upper_bound, offset_tu, beacon_int);
2763 }
2764
2765 goto out;
2766 }
2767
2768 bcn_timeout = bcn_stat->drift[target_bcn_th];
2769
2770 out:
2771 bcn_track->bcn_timeout = bcn_timeout + rtw89_bcn_get_rx_time(rtwdev, chan);
2772 }
2773
rtw89_bcn_update_timeout(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link)2774 static void rtw89_bcn_update_timeout(struct rtw89_dev *rtwdev,
2775 struct rtw89_vif_link *rtwvif_link)
2776 {
2777 rtw89_bcn_calc_drift(rtwdev);
2778 rtw89_bcn_calc_distribution(rtwdev);
2779 rtw89_bcn_calc_timeout(rtwdev, rtwvif_link);
2780 }
2781
rtw89_core_bcn_track(struct rtw89_dev * rtwdev)2782 static void rtw89_core_bcn_track(struct rtw89_dev *rtwdev)
2783 {
2784 struct rtw89_beacon_track_info *bcn_track = &rtwdev->bcn_track;
2785 struct rtw89_vif_link *rtwvif_link;
2786 struct rtw89_vif *rtwvif;
2787 unsigned int link_id;
2788
2789 if (!RTW89_CHK_FW_FEATURE(BEACON_TRACKING, &rtwdev->fw))
2790 return;
2791
2792 if (!rtwdev->lps_enabled)
2793 return;
2794
2795 if (!bcn_track->is_data_ready)
2796 return;
2797
2798 rtw89_for_each_rtwvif(rtwdev, rtwvif) {
2799 rtw89_vif_for_each_link(rtwvif, rtwvif_link, link_id) {
2800 if (!(rtwvif_link->wifi_role == RTW89_WIFI_ROLE_STATION ||
2801 rtwvif_link->wifi_role == RTW89_WIFI_ROLE_P2P_CLIENT))
2802 continue;
2803
2804 rtw89_bcn_update_tbtt_offset(rtwdev, rtwvif_link);
2805 rtw89_bcn_update_timeout(rtwdev, rtwvif_link);
2806 }
2807 }
2808 }
2809
rtw89_core_bcn_track_can_lps(struct rtw89_dev * rtwdev)2810 static bool rtw89_core_bcn_track_can_lps(struct rtw89_dev *rtwdev)
2811 {
2812 struct rtw89_beacon_track_info *bcn_track = &rtwdev->bcn_track;
2813
2814 if (!RTW89_CHK_FW_FEATURE(BEACON_TRACKING, &rtwdev->fw))
2815 return true;
2816
2817 return bcn_track->is_data_ready;
2818 }
2819
rtw89_core_bcn_track_assoc(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link)2820 static void rtw89_core_bcn_track_assoc(struct rtw89_dev *rtwdev,
2821 struct rtw89_vif_link *rtwvif_link)
2822 {
2823 #define RTW89_BCN_TRACK_MED_BCN 70
2824 #define RTW89_BCN_TRACK_LOW_BCN 30
2825 #define RTW89_BCN_TRACK_OUTLIER_HIGH_BCN 30
2826 #define RTW89_BCN_TRACK_OUTLIER_LOW_BCN 20
2827 struct rtw89_beacon_track_info *bcn_track = &rtwdev->bcn_track;
2828 u32 period = jiffies_to_msecs(RTW89_TRACK_WORK_PERIOD);
2829 struct ieee80211_bss_conf *bss_conf;
2830 u32 beacons_in_period;
2831 u32 bcn_intvl_us;
2832 u16 beacon_int;
2833 u8 dtim;
2834
2835 rcu_read_lock();
2836 bss_conf = rtw89_vif_rcu_dereference_link(rtwvif_link, true);
2837 beacon_int = bss_conf->beacon_int;
2838 dtim = bss_conf->dtim_period;
2839 rcu_read_unlock();
2840
2841 beacons_in_period = period / beacon_int / dtim;
2842 bcn_intvl_us = ieee80211_tu_to_usec(beacon_int);
2843
2844 bcn_track->low_bcn_th =
2845 (beacons_in_period * RTW89_BCN_TRACK_LOW_BCN) / PERCENT;
2846 bcn_track->med_bcn_th =
2847 (beacons_in_period * RTW89_BCN_TRACK_MED_BCN) / PERCENT;
2848 bcn_track->outlier_low_bcn_th =
2849 (RTW89_BCN_TRACK_STAT_NR * RTW89_BCN_TRACK_OUTLIER_LOW_BCN) / PERCENT;
2850 bcn_track->outlier_high_bcn_th =
2851 (RTW89_BCN_TRACK_STAT_NR * RTW89_BCN_TRACK_OUTLIER_HIGH_BCN) / PERCENT;
2852 bcn_track->target_bcn_th =
2853 (RTW89_BCN_TRACK_STAT_NR * RTW89_BCN_TRACK_TARGET_BCN) / PERCENT;
2854
2855 bcn_track->close_bcn_intvl_th = ieee80211_tu_to_usec(beacon_int - 3);
2856 bcn_track->tbtt_diff_th = (bcn_intvl_us * 85) / PERCENT;
2857 bcn_track->beacon_int = beacon_int;
2858 bcn_track->dtim = dtim;
2859 }
2860
rtw89_core_bcn_track_reset(struct rtw89_dev * rtwdev)2861 static void rtw89_core_bcn_track_reset(struct rtw89_dev *rtwdev)
2862 {
2863 memset(&rtwdev->phystat.bcn_stat, 0, sizeof(rtwdev->phystat.bcn_stat));
2864 memset(&rtwdev->bcn_track, 0, sizeof(rtwdev->bcn_track));
2865 }
2866
rtw89_vif_rx_bcn_stat(struct rtw89_dev * rtwdev,struct ieee80211_bss_conf * bss_conf,struct sk_buff * skb)2867 static void rtw89_vif_rx_bcn_stat(struct rtw89_dev *rtwdev,
2868 struct ieee80211_bss_conf *bss_conf,
2869 struct sk_buff *skb)
2870 {
2871 #define RTW89_APPEND_TSF_2GHZ 384
2872 #define RTW89_APPEND_TSF_5GHZ 52
2873 #define RTW89_APPEND_TSF_6GHZ 52
2874 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data;
2875 struct ieee80211_rx_status *rx_status = IEEE80211_SKB_RXCB(skb);
2876 struct rtw89_beacon_stat *bcn_stat = &rtwdev->phystat.bcn_stat;
2877 struct rtw89_beacon_track_info *bcn_track = &rtwdev->bcn_track;
2878 u32 bcn_intvl_us = ieee80211_tu_to_usec(bss_conf->beacon_int);
2879 u64 tsf = le64_to_cpu(mgmt->u.beacon.timestamp);
2880 u8 wp, num = bcn_stat->num;
2881 u16 append;
2882
2883 if (!RTW89_CHK_FW_FEATURE(BEACON_TRACKING, &rtwdev->fw))
2884 return;
2885
2886 switch (rx_status->band) {
2887 default:
2888 case NL80211_BAND_2GHZ:
2889 append = RTW89_APPEND_TSF_2GHZ;
2890 break;
2891 case NL80211_BAND_5GHZ:
2892 append = RTW89_APPEND_TSF_5GHZ;
2893 break;
2894 case NL80211_BAND_6GHZ:
2895 append = RTW89_APPEND_TSF_6GHZ;
2896 break;
2897 }
2898
2899 wp = bcn_stat->wp;
2900 div_u64_rem(tsf - append, bcn_intvl_us, &bcn_stat->tbtt_us[wp]);
2901 bcn_stat->tbtt_tu[wp] = bcn_stat->tbtt_us[wp] / 1024;
2902 bcn_stat->wp = (wp + 1) % RTW89_BCN_TRACK_STAT_NR;
2903 bcn_stat->num = umin(num + 1, RTW89_BCN_TRACK_STAT_NR);
2904 bcn_track->is_data_ready = bcn_stat->num == RTW89_BCN_TRACK_STAT_NR;
2905 }
2906
rtw89_vif_rx_stats_iter(void * data,u8 * mac,struct ieee80211_vif * vif)2907 static void rtw89_vif_rx_stats_iter(void *data, u8 *mac,
2908 struct ieee80211_vif *vif)
2909 {
2910 struct rtw89_vif_rx_stats_iter_data *iter_data = data;
2911 struct rtw89_dev *rtwdev = iter_data->rtwdev;
2912 struct rtw89_vif *rtwvif = vif_to_rtwvif(vif);
2913 struct rtw89_pkt_stat *pkt_stat = &rtwdev->phystat.cur_pkt_stat;
2914 struct rtw89_rx_desc_info *desc_info = iter_data->desc_info;
2915 struct sk_buff *skb = iter_data->skb;
2916 struct ieee80211_rx_status *rx_status = IEEE80211_SKB_RXCB(skb);
2917 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
2918 struct rtw89_rx_phy_ppdu *phy_ppdu = iter_data->phy_ppdu;
2919 bool is_mld = ieee80211_vif_is_mld(vif);
2920 struct ieee80211_bss_conf *bss_conf;
2921 struct rtw89_vif_link *rtwvif_link;
2922 const u8 *bssid = iter_data->bssid;
2923 const u8 *target_bssid;
2924
2925 if (rtwdev->scanning &&
2926 (ieee80211_is_beacon(hdr->frame_control) ||
2927 ieee80211_is_probe_resp(hdr->frame_control)))
2928 rtw89_core_cancel_6ghz_probe_tx(rtwdev, skb);
2929
2930 rcu_read_lock();
2931
2932 rtwvif_link = rtw89_vif_get_link_inst(rtwvif, desc_info->bb_sel);
2933 if (unlikely(!rtwvif_link))
2934 goto out;
2935
2936 bss_conf = rtw89_vif_rcu_dereference_link(rtwvif_link, false);
2937 if (!bss_conf->bssid)
2938 goto out;
2939
2940 if (ieee80211_is_trigger(hdr->frame_control)) {
2941 rtw89_stats_trigger_frame(rtwdev, rtwvif_link, bss_conf, skb);
2942 goto out;
2943 }
2944
2945 target_bssid = ieee80211_is_beacon(hdr->frame_control) &&
2946 bss_conf->nontransmitted ?
2947 bss_conf->transmitter_bssid : bss_conf->bssid;
2948 if (!ether_addr_equal(target_bssid, bssid))
2949 goto out;
2950
2951 if (is_mld) {
2952 rx_status->link_valid = true;
2953 rx_status->link_id = rtwvif_link->link_id;
2954 }
2955
2956 if (ieee80211_is_beacon(hdr->frame_control)) {
2957 if (vif->type == NL80211_IFTYPE_STATION &&
2958 !test_bit(RTW89_FLAG_WOWLAN, rtwdev->flags)) {
2959 rtw89_vif_sync_bcn_tsf(rtwvif_link, hdr, skb->len);
2960 rtw89_fw_h2c_rssi_offload(rtwdev, phy_ppdu);
2961 }
2962
2963 if (phy_ppdu) {
2964 ewma_rssi_add(&rtwdev->phystat.bcn_rssi, phy_ppdu->rssi_avg);
2965 if (!test_bit(RTW89_FLAG_LOW_POWER_MODE, rtwdev->flags))
2966 rtwvif_link->bcn_bw_idx = phy_ppdu->bw_idx;
2967 }
2968
2969 pkt_stat->beacon_nr++;
2970 pkt_stat->beacon_rate = desc_info->data_rate;
2971 pkt_stat->beacon_len = skb->len;
2972
2973 rtw89_vif_rx_bcn_stat(rtwdev, bss_conf, skb);
2974 }
2975
2976 if (!ether_addr_equal(bss_conf->addr, hdr->addr1))
2977 goto out;
2978
2979 if (desc_info->data_rate < RTW89_HW_RATE_NR)
2980 pkt_stat->rx_rate_cnt[desc_info->data_rate]++;
2981
2982 rtw89_traffic_stats_accu(rtwdev, rtwvif, skb, false, false);
2983
2984 out:
2985 rcu_read_unlock();
2986 }
2987
rtw89_core_rx_stats(struct rtw89_dev * rtwdev,struct rtw89_rx_phy_ppdu * phy_ppdu,struct rtw89_rx_desc_info * desc_info,struct sk_buff * skb)2988 static void rtw89_core_rx_stats(struct rtw89_dev *rtwdev,
2989 struct rtw89_rx_phy_ppdu *phy_ppdu,
2990 struct rtw89_rx_desc_info *desc_info,
2991 struct sk_buff *skb)
2992 {
2993 struct rtw89_vif_rx_stats_iter_data iter_data;
2994
2995 rtw89_traffic_stats_accu(rtwdev, NULL, skb, true, false);
2996
2997 iter_data.rtwdev = rtwdev;
2998 iter_data.phy_ppdu = phy_ppdu;
2999 iter_data.desc_info = desc_info;
3000 iter_data.skb = skb;
3001 iter_data.bssid = get_hdr_bssid((struct ieee80211_hdr *)skb->data);
3002 rtw89_iterate_vifs_bh(rtwdev, rtw89_vif_rx_stats_iter, &iter_data);
3003 }
3004
rtw89_correct_cck_chan(struct rtw89_dev * rtwdev,struct ieee80211_rx_status * status)3005 static void rtw89_correct_cck_chan(struct rtw89_dev *rtwdev,
3006 struct ieee80211_rx_status *status)
3007 {
3008 const struct rtw89_chan_rcd *rcd =
3009 rtw89_chan_rcd_get(rtwdev, RTW89_CHANCTX_0);
3010 u16 chan = rcd->prev_primary_channel;
3011 u8 band = rtw89_hw_to_nl80211_band(rcd->prev_band_type);
3012
3013 if (status->band != NL80211_BAND_2GHZ &&
3014 status->encoding == RX_ENC_LEGACY &&
3015 status->rate_idx < RTW89_HW_RATE_OFDM6) {
3016 status->freq = ieee80211_channel_to_frequency(chan, band);
3017 status->band = band;
3018 }
3019 }
3020
rtw89_core_hw_to_sband_rate(struct ieee80211_rx_status * rx_status)3021 static void rtw89_core_hw_to_sband_rate(struct ieee80211_rx_status *rx_status)
3022 {
3023 if (rx_status->band == NL80211_BAND_2GHZ ||
3024 rx_status->encoding != RX_ENC_LEGACY)
3025 return;
3026
3027 /* Some control frames' freq(ACKs in this case) are reported wrong due
3028 * to FW notify timing, set to lowest rate to prevent overflow.
3029 */
3030 if (rx_status->rate_idx < RTW89_HW_RATE_OFDM6) {
3031 rx_status->rate_idx = 0;
3032 return;
3033 }
3034
3035 /* No 4 CCK rates for non-2G */
3036 rx_status->rate_idx -= 4;
3037 }
3038
3039 static
rtw89_core_update_rx_status_by_ppdu(struct rtw89_dev * rtwdev,struct ieee80211_rx_status * rx_status,struct rtw89_rx_phy_ppdu * phy_ppdu)3040 void rtw89_core_update_rx_status_by_ppdu(struct rtw89_dev *rtwdev,
3041 struct ieee80211_rx_status *rx_status,
3042 struct rtw89_rx_phy_ppdu *phy_ppdu)
3043 {
3044 if (!(rtwdev->hw->conf.flags & IEEE80211_CONF_MONITOR))
3045 return;
3046
3047 if (!phy_ppdu)
3048 return;
3049
3050 if (phy_ppdu->ldpc)
3051 rx_status->enc_flags |= RX_ENC_FLAG_LDPC;
3052 if (phy_ppdu->stbc)
3053 rx_status->enc_flags |= u8_encode_bits(1, RX_ENC_FLAG_STBC_MASK);
3054 }
3055
3056 static const u8 rx_status_bw_to_radiotap_eht_usig[] = {
3057 [RATE_INFO_BW_20] = IEEE80211_RADIOTAP_EHT_USIG_COMMON_BW_20MHZ,
3058 [RATE_INFO_BW_5] = U8_MAX,
3059 [RATE_INFO_BW_10] = U8_MAX,
3060 [RATE_INFO_BW_40] = IEEE80211_RADIOTAP_EHT_USIG_COMMON_BW_40MHZ,
3061 [RATE_INFO_BW_80] = IEEE80211_RADIOTAP_EHT_USIG_COMMON_BW_80MHZ,
3062 [RATE_INFO_BW_160] = IEEE80211_RADIOTAP_EHT_USIG_COMMON_BW_160MHZ,
3063 [RATE_INFO_BW_HE_RU] = U8_MAX,
3064 [RATE_INFO_BW_320] = IEEE80211_RADIOTAP_EHT_USIG_COMMON_BW_320MHZ_1,
3065 [RATE_INFO_BW_EHT_RU] = U8_MAX,
3066 };
3067
rtw89_core_update_radiotap_eht(struct rtw89_dev * rtwdev,struct sk_buff * skb,struct ieee80211_rx_status * rx_status)3068 static void rtw89_core_update_radiotap_eht(struct rtw89_dev *rtwdev,
3069 struct sk_buff *skb,
3070 struct ieee80211_rx_status *rx_status)
3071 {
3072 struct ieee80211_radiotap_eht_usig *usig;
3073 struct ieee80211_radiotap_eht *eht;
3074 struct ieee80211_radiotap_tlv *tlv;
3075 int eht_len = struct_size(eht, user_info, 1);
3076 int usig_len = sizeof(*usig);
3077 int len;
3078 u8 bw;
3079
3080 len = sizeof(*tlv) + ALIGN(eht_len, 4) +
3081 sizeof(*tlv) + ALIGN(usig_len, 4);
3082
3083 rx_status->flag |= RX_FLAG_RADIOTAP_TLV_AT_END;
3084 skb_reset_mac_header(skb);
3085
3086 /* EHT */
3087 tlv = skb_push(skb, len);
3088 memset(tlv, 0, len);
3089 tlv->type = cpu_to_le16(IEEE80211_RADIOTAP_EHT);
3090 tlv->len = cpu_to_le16(eht_len);
3091
3092 eht = (struct ieee80211_radiotap_eht *)tlv->data;
3093 eht->known = cpu_to_le32(IEEE80211_RADIOTAP_EHT_KNOWN_GI);
3094 eht->data[0] =
3095 le32_encode_bits(rx_status->eht.gi, IEEE80211_RADIOTAP_EHT_DATA0_GI);
3096
3097 eht->user_info[0] =
3098 cpu_to_le32(IEEE80211_RADIOTAP_EHT_USER_INFO_MCS_KNOWN |
3099 IEEE80211_RADIOTAP_EHT_USER_INFO_NSS_KNOWN_O |
3100 IEEE80211_RADIOTAP_EHT_USER_INFO_CODING_KNOWN);
3101 eht->user_info[0] |=
3102 le32_encode_bits(rx_status->rate_idx, IEEE80211_RADIOTAP_EHT_USER_INFO_MCS) |
3103 le32_encode_bits(rx_status->nss, IEEE80211_RADIOTAP_EHT_USER_INFO_NSS_O);
3104 if (rx_status->enc_flags & RX_ENC_FLAG_LDPC)
3105 eht->user_info[0] |=
3106 cpu_to_le32(IEEE80211_RADIOTAP_EHT_USER_INFO_CODING);
3107
3108 /* U-SIG */
3109 #if defined(__linux__)
3110 tlv = (void *)tlv + sizeof(*tlv) + ALIGN(eht_len, 4);
3111 #elif defined(__FreeBSD__)
3112 tlv = (void *)((u8 *)tlv + sizeof(*tlv) + ALIGN(eht_len, 4));
3113 #endif
3114 tlv->type = cpu_to_le16(IEEE80211_RADIOTAP_EHT_USIG);
3115 tlv->len = cpu_to_le16(usig_len);
3116
3117 if (rx_status->bw >= ARRAY_SIZE(rx_status_bw_to_radiotap_eht_usig))
3118 return;
3119
3120 bw = rx_status_bw_to_radiotap_eht_usig[rx_status->bw];
3121 if (bw == U8_MAX)
3122 return;
3123
3124 usig = (struct ieee80211_radiotap_eht_usig *)tlv->data;
3125 usig->common =
3126 le32_encode_bits(1, IEEE80211_RADIOTAP_EHT_USIG_COMMON_BW_KNOWN) |
3127 le32_encode_bits(bw, IEEE80211_RADIOTAP_EHT_USIG_COMMON_BW);
3128 }
3129
rtw89_core_update_radiotap(struct rtw89_dev * rtwdev,struct sk_buff * skb,struct ieee80211_rx_status * rx_status)3130 static void rtw89_core_update_radiotap(struct rtw89_dev *rtwdev,
3131 struct sk_buff *skb,
3132 struct ieee80211_rx_status *rx_status)
3133 {
3134 static const struct ieee80211_radiotap_he known_he = {
3135 .data1 = cpu_to_le16(IEEE80211_RADIOTAP_HE_DATA1_DATA_MCS_KNOWN |
3136 IEEE80211_RADIOTAP_HE_DATA1_CODING_KNOWN |
3137 IEEE80211_RADIOTAP_HE_DATA1_STBC_KNOWN |
3138 IEEE80211_RADIOTAP_HE_DATA1_BW_RU_ALLOC_KNOWN),
3139 .data2 = cpu_to_le16(IEEE80211_RADIOTAP_HE_DATA2_GI_KNOWN),
3140 };
3141 struct ieee80211_radiotap_he *he;
3142
3143 if (!(rtwdev->hw->conf.flags & IEEE80211_CONF_MONITOR))
3144 return;
3145
3146 if (rx_status->encoding == RX_ENC_HE) {
3147 rx_status->flag |= RX_FLAG_RADIOTAP_HE;
3148 he = skb_push(skb, sizeof(*he));
3149 *he = known_he;
3150 } else if (rx_status->encoding == RX_ENC_EHT) {
3151 rtw89_core_update_radiotap_eht(rtwdev, skb, rx_status);
3152 }
3153 }
3154
rtw89_core_validate_rx_signal(struct ieee80211_rx_status * rx_status)3155 static void rtw89_core_validate_rx_signal(struct ieee80211_rx_status *rx_status)
3156 {
3157 if (!rx_status->signal)
3158 rx_status->flag |= RX_FLAG_NO_SIGNAL_VAL;
3159 }
3160
rtw89_core_update_rx_freq_from_ie(struct rtw89_dev * rtwdev,struct sk_buff * skb,struct ieee80211_rx_status * rx_status)3161 static void rtw89_core_update_rx_freq_from_ie(struct rtw89_dev *rtwdev,
3162 struct sk_buff *skb,
3163 struct ieee80211_rx_status *rx_status)
3164 {
3165 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data;
3166 size_t hdr_len, ielen;
3167 u8 *variable;
3168 int chan;
3169
3170 if (!rtwdev->chip->rx_freq_frome_ie)
3171 return;
3172
3173 if (!rtwdev->scanning)
3174 return;
3175
3176 if (ieee80211_is_beacon(mgmt->frame_control)) {
3177 variable = mgmt->u.beacon.variable;
3178 hdr_len = offsetof(struct ieee80211_mgmt,
3179 u.beacon.variable);
3180 } else if (ieee80211_is_probe_resp(mgmt->frame_control)) {
3181 variable = mgmt->u.probe_resp.variable;
3182 hdr_len = offsetof(struct ieee80211_mgmt,
3183 u.probe_resp.variable);
3184 } else {
3185 return;
3186 }
3187
3188 if (skb->len > hdr_len)
3189 ielen = skb->len - hdr_len;
3190 else
3191 return;
3192
3193 /* The parsing code for both 2GHz and 5GHz bands is the same in this
3194 * function.
3195 */
3196 chan = cfg80211_get_ies_channel_number(variable, ielen, NL80211_BAND_2GHZ);
3197 if (chan == -1)
3198 return;
3199
3200 rx_status->band = chan > 14 ? RTW89_BAND_5G : RTW89_BAND_2G;
3201 rx_status->freq = ieee80211_channel_to_frequency(chan, rx_status->band);
3202 }
3203
rtw89_core_correct_mcc_chan(struct rtw89_dev * rtwdev,struct rtw89_rx_desc_info * desc_info,struct ieee80211_rx_status * rx_status,struct rtw89_rx_phy_ppdu * phy_ppdu)3204 static void rtw89_core_correct_mcc_chan(struct rtw89_dev *rtwdev,
3205 struct rtw89_rx_desc_info *desc_info,
3206 struct ieee80211_rx_status *rx_status,
3207 struct rtw89_rx_phy_ppdu *phy_ppdu)
3208 {
3209 enum rtw89_chip_gen chip_gen = rtwdev->chip->chip_gen;
3210 struct rtw89_vif_link *rtwvif_link;
3211 struct rtw89_sta_link *rtwsta_link;
3212 const struct rtw89_chan *chan;
3213 u8 mac_id = desc_info->mac_id;
3214 enum rtw89_entity_mode mode;
3215 enum nl80211_band band;
3216
3217 mode = rtw89_get_entity_mode(rtwdev);
3218 if (likely(mode != RTW89_ENTITY_MODE_MCC))
3219 return;
3220
3221 if (chip_gen == RTW89_CHIP_BE && phy_ppdu)
3222 mac_id = phy_ppdu->mac_id;
3223
3224 rcu_read_lock();
3225
3226 rtwsta_link = rtw89_assoc_link_rcu_dereference(rtwdev, mac_id);
3227 if (!rtwsta_link)
3228 goto out;
3229
3230 rtwvif_link = rtwsta_link->rtwvif_link;
3231 chan = rtw89_chan_get(rtwdev, rtwvif_link->chanctx_idx);
3232 band = rtw89_hw_to_nl80211_band(chan->band_type);
3233 rx_status->freq = ieee80211_channel_to_frequency(chan->primary_channel, band);
3234
3235 out:
3236 rcu_read_unlock();
3237 }
3238
rtw89_core_rx_to_mac80211(struct rtw89_dev * rtwdev,struct rtw89_rx_phy_ppdu * phy_ppdu,struct rtw89_rx_desc_info * desc_info,struct sk_buff * skb_ppdu,struct ieee80211_rx_status * rx_status)3239 static void rtw89_core_rx_to_mac80211(struct rtw89_dev *rtwdev,
3240 struct rtw89_rx_phy_ppdu *phy_ppdu,
3241 struct rtw89_rx_desc_info *desc_info,
3242 struct sk_buff *skb_ppdu,
3243 struct ieee80211_rx_status *rx_status)
3244 {
3245 struct napi_struct *napi = &rtwdev->napi;
3246
3247 /* In low power mode, napi isn't scheduled. Receive it to netif. */
3248 if (unlikely(!napi_is_scheduled(napi)))
3249 napi = NULL;
3250
3251 rtw89_core_hw_to_sband_rate(rx_status);
3252 rtw89_core_rx_stats(rtwdev, phy_ppdu, desc_info, skb_ppdu);
3253 rtw89_core_update_rx_status_by_ppdu(rtwdev, rx_status, phy_ppdu);
3254 rtw89_core_update_radiotap(rtwdev, skb_ppdu, rx_status);
3255 rtw89_core_validate_rx_signal(rx_status);
3256 rtw89_core_update_rx_freq_from_ie(rtwdev, skb_ppdu, rx_status);
3257 rtw89_core_correct_mcc_chan(rtwdev, desc_info, rx_status, phy_ppdu);
3258
3259 /* In low power mode, it does RX in thread context. */
3260 local_bh_disable();
3261 ieee80211_rx_napi(rtwdev->hw, NULL, skb_ppdu, napi);
3262 local_bh_enable();
3263 rtwdev->napi_budget_countdown--;
3264 }
3265
rtw89_core_rx_pending_skb(struct rtw89_dev * rtwdev,struct rtw89_rx_phy_ppdu * phy_ppdu,struct rtw89_rx_desc_info * desc_info,struct sk_buff * skb)3266 static void rtw89_core_rx_pending_skb(struct rtw89_dev *rtwdev,
3267 struct rtw89_rx_phy_ppdu *phy_ppdu,
3268 struct rtw89_rx_desc_info *desc_info,
3269 struct sk_buff *skb)
3270 {
3271 u8 band = desc_info->bb_sel ? RTW89_PHY_1 : RTW89_PHY_0;
3272 int curr = rtwdev->ppdu_sts.curr_rx_ppdu_cnt[band];
3273 struct sk_buff *skb_ppdu = NULL, *tmp;
3274 struct ieee80211_rx_status *rx_status;
3275
3276 if (curr > RTW89_MAX_PPDU_CNT)
3277 return;
3278
3279 skb_queue_walk_safe(&rtwdev->ppdu_sts.rx_queue[band], skb_ppdu, tmp) {
3280 skb_unlink(skb_ppdu, &rtwdev->ppdu_sts.rx_queue[band]);
3281 rx_status = IEEE80211_SKB_RXCB(skb_ppdu);
3282 if (rtw89_core_rx_ppdu_match(rtwdev, desc_info, rx_status))
3283 rtw89_chip_query_ppdu(rtwdev, phy_ppdu, rx_status);
3284 rtw89_correct_cck_chan(rtwdev, rx_status);
3285 rtw89_core_rx_to_mac80211(rtwdev, phy_ppdu, desc_info, skb_ppdu, rx_status);
3286 }
3287 }
3288
rtw89_core_rx_process_ppdu_sts(struct rtw89_dev * rtwdev,struct rtw89_rx_desc_info * desc_info,struct sk_buff * skb)3289 static void rtw89_core_rx_process_ppdu_sts(struct rtw89_dev *rtwdev,
3290 struct rtw89_rx_desc_info *desc_info,
3291 struct sk_buff *skb)
3292 {
3293 struct rtw89_rx_phy_ppdu phy_ppdu = {.buf = skb->data, .valid = false,
3294 .len = skb->len,
3295 .to_self = desc_info->addr1_match,
3296 .rate = desc_info->data_rate,
3297 .mac_id = desc_info->mac_id,
3298 .phy_idx = desc_info->bb_sel};
3299 int ret;
3300
3301 if (desc_info->mac_info_valid) {
3302 ret = rtw89_core_rx_process_mac_ppdu(rtwdev, skb, &phy_ppdu);
3303 if (ret)
3304 goto out;
3305 }
3306
3307 ret = rtw89_core_rx_process_phy_ppdu(rtwdev, &phy_ppdu);
3308 if (ret)
3309 goto out;
3310
3311 rtw89_core_rx_process_phy_sts(rtwdev, &phy_ppdu);
3312
3313 out:
3314 rtw89_core_rx_pending_skb(rtwdev, &phy_ppdu, desc_info, skb);
3315 dev_kfree_skb_any(skb);
3316 }
3317
rtw89_core_rx_process_report(struct rtw89_dev * rtwdev,struct rtw89_rx_desc_info * desc_info,struct sk_buff * skb)3318 static void rtw89_core_rx_process_report(struct rtw89_dev *rtwdev,
3319 struct rtw89_rx_desc_info *desc_info,
3320 struct sk_buff *skb)
3321 {
3322 switch (desc_info->pkt_type) {
3323 case RTW89_CORE_RX_TYPE_C2H:
3324 rtw89_fw_c2h_irqsafe(rtwdev, skb);
3325 break;
3326 case RTW89_CORE_RX_TYPE_PPDU_STAT:
3327 rtw89_core_rx_process_ppdu_sts(rtwdev, desc_info, skb);
3328 break;
3329 default:
3330 rtw89_debug(rtwdev, RTW89_DBG_TXRX, "unhandled pkt_type=%d\n",
3331 desc_info->pkt_type);
3332 dev_kfree_skb_any(skb);
3333 break;
3334 }
3335 }
3336
rtw89_core_query_rxdesc(struct rtw89_dev * rtwdev,struct rtw89_rx_desc_info * desc_info,u8 * data,u32 data_offset)3337 void rtw89_core_query_rxdesc(struct rtw89_dev *rtwdev,
3338 struct rtw89_rx_desc_info *desc_info,
3339 u8 *data, u32 data_offset)
3340 {
3341 const struct rtw89_chip_info *chip = rtwdev->chip;
3342 struct rtw89_rxdesc_short *rxd_s;
3343 struct rtw89_rxdesc_long *rxd_l;
3344 u8 shift_len, drv_info_len;
3345
3346 rxd_s = (struct rtw89_rxdesc_short *)(data + data_offset);
3347 desc_info->pkt_size = le32_get_bits(rxd_s->dword0, AX_RXD_RPKT_LEN_MASK);
3348 desc_info->drv_info_size = le32_get_bits(rxd_s->dword0, AX_RXD_DRV_INFO_SIZE_MASK);
3349 desc_info->long_rxdesc = le32_get_bits(rxd_s->dword0, AX_RXD_LONG_RXD);
3350 desc_info->pkt_type = le32_get_bits(rxd_s->dword0, AX_RXD_RPKT_TYPE_MASK);
3351 desc_info->mac_info_valid = le32_get_bits(rxd_s->dword0, AX_RXD_MAC_INFO_VLD);
3352 if (chip->chip_id == RTL8852C)
3353 desc_info->bw = le32_get_bits(rxd_s->dword1, AX_RXD_BW_v1_MASK);
3354 else
3355 desc_info->bw = le32_get_bits(rxd_s->dword1, AX_RXD_BW_MASK);
3356 desc_info->data_rate = le32_get_bits(rxd_s->dword1, AX_RXD_RX_DATARATE_MASK);
3357 desc_info->gi_ltf = le32_get_bits(rxd_s->dword1, AX_RXD_RX_GI_LTF_MASK);
3358 desc_info->user_id = le32_get_bits(rxd_s->dword1, AX_RXD_USER_ID_MASK);
3359 desc_info->sr_en = le32_get_bits(rxd_s->dword1, AX_RXD_SR_EN);
3360 desc_info->ppdu_cnt = le32_get_bits(rxd_s->dword1, AX_RXD_PPDU_CNT_MASK);
3361 desc_info->ppdu_type = le32_get_bits(rxd_s->dword1, AX_RXD_PPDU_TYPE_MASK);
3362 desc_info->free_run_cnt = le32_get_bits(rxd_s->dword2, AX_RXD_FREERUN_CNT_MASK);
3363 desc_info->icv_err = le32_get_bits(rxd_s->dword3, AX_RXD_ICV_ERR);
3364 desc_info->crc32_err = le32_get_bits(rxd_s->dword3, AX_RXD_CRC32_ERR);
3365 desc_info->hw_dec = le32_get_bits(rxd_s->dword3, AX_RXD_HW_DEC);
3366 desc_info->sw_dec = le32_get_bits(rxd_s->dword3, AX_RXD_SW_DEC);
3367 desc_info->addr1_match = le32_get_bits(rxd_s->dword3, AX_RXD_A1_MATCH);
3368
3369 shift_len = desc_info->shift << 1; /* 2-byte unit */
3370 drv_info_len = desc_info->drv_info_size << 3; /* 8-byte unit */
3371 desc_info->offset = data_offset + shift_len + drv_info_len;
3372 if (desc_info->long_rxdesc)
3373 desc_info->rxd_len = sizeof(struct rtw89_rxdesc_long);
3374 else
3375 desc_info->rxd_len = sizeof(struct rtw89_rxdesc_short);
3376 desc_info->ready = true;
3377
3378 if (!desc_info->long_rxdesc)
3379 return;
3380
3381 rxd_l = (struct rtw89_rxdesc_long *)(data + data_offset);
3382 desc_info->frame_type = le32_get_bits(rxd_l->dword4, AX_RXD_TYPE_MASK);
3383 desc_info->addr_cam_valid = le32_get_bits(rxd_l->dword5, AX_RXD_ADDR_CAM_VLD);
3384 desc_info->addr_cam_id = le32_get_bits(rxd_l->dword5, AX_RXD_ADDR_CAM_MASK);
3385 desc_info->sec_cam_id = le32_get_bits(rxd_l->dword5, AX_RXD_SEC_CAM_IDX_MASK);
3386 desc_info->mac_id = le32_get_bits(rxd_l->dword5, AX_RXD_MAC_ID_MASK);
3387 desc_info->rx_pl_id = le32_get_bits(rxd_l->dword5, AX_RXD_RX_PL_ID_MASK);
3388 }
3389 EXPORT_SYMBOL(rtw89_core_query_rxdesc);
3390
rtw89_core_query_rxdesc_v2(struct rtw89_dev * rtwdev,struct rtw89_rx_desc_info * desc_info,u8 * data,u32 data_offset)3391 void rtw89_core_query_rxdesc_v2(struct rtw89_dev *rtwdev,
3392 struct rtw89_rx_desc_info *desc_info,
3393 u8 *data, u32 data_offset)
3394 {
3395 struct rtw89_rxdesc_phy_rpt_v2 *rxd_rpt;
3396 struct rtw89_rxdesc_short_v2 *rxd_s;
3397 struct rtw89_rxdesc_long_v2 *rxd_l;
3398 u16 shift_len, drv_info_len, phy_rtp_len, hdr_cnv_len;
3399
3400 rxd_s = (struct rtw89_rxdesc_short_v2 *)(data + data_offset);
3401
3402 desc_info->pkt_size = le32_get_bits(rxd_s->dword0, BE_RXD_RPKT_LEN_MASK);
3403 desc_info->drv_info_size = le32_get_bits(rxd_s->dword0, BE_RXD_DRV_INFO_SZ_MASK);
3404 desc_info->phy_rpt_size = le32_get_bits(rxd_s->dword0, BE_RXD_PHY_RPT_SZ_MASK);
3405 desc_info->hdr_cnv_size = le32_get_bits(rxd_s->dword0, BE_RXD_HDR_CNV_SZ_MASK);
3406 desc_info->shift = le32_get_bits(rxd_s->dword0, BE_RXD_SHIFT_MASK);
3407 desc_info->long_rxdesc = le32_get_bits(rxd_s->dword0, BE_RXD_LONG_RXD);
3408 desc_info->pkt_type = le32_get_bits(rxd_s->dword0, BE_RXD_RPKT_TYPE_MASK);
3409 desc_info->bb_sel = le32_get_bits(rxd_s->dword0, BE_RXD_BB_SEL);
3410 if (desc_info->pkt_type == RTW89_CORE_RX_TYPE_PPDU_STAT)
3411 desc_info->mac_info_valid = true;
3412
3413 desc_info->frame_type = le32_get_bits(rxd_s->dword2, BE_RXD_TYPE_MASK);
3414 desc_info->mac_id = le32_get_bits(rxd_s->dword2, BE_RXD_MAC_ID_MASK);
3415 desc_info->addr_cam_valid = le32_get_bits(rxd_s->dword2, BE_RXD_ADDR_CAM_VLD);
3416
3417 desc_info->icv_err = le32_get_bits(rxd_s->dword3, BE_RXD_ICV_ERR);
3418 desc_info->crc32_err = le32_get_bits(rxd_s->dword3, BE_RXD_CRC32_ERR);
3419 desc_info->hw_dec = le32_get_bits(rxd_s->dword3, BE_RXD_HW_DEC);
3420 desc_info->sw_dec = le32_get_bits(rxd_s->dword3, BE_RXD_SW_DEC);
3421 desc_info->addr1_match = le32_get_bits(rxd_s->dword3, BE_RXD_A1_MATCH);
3422
3423 desc_info->bw = le32_get_bits(rxd_s->dword4, BE_RXD_BW_MASK);
3424 desc_info->data_rate = le32_get_bits(rxd_s->dword4, BE_RXD_RX_DATARATE_MASK);
3425 desc_info->gi_ltf = le32_get_bits(rxd_s->dword4, BE_RXD_RX_GI_LTF_MASK);
3426 desc_info->ppdu_cnt = le32_get_bits(rxd_s->dword4, BE_RXD_PPDU_CNT_MASK);
3427 desc_info->ppdu_type = le32_get_bits(rxd_s->dword4, BE_RXD_PPDU_TYPE_MASK);
3428
3429 desc_info->free_run_cnt = le32_to_cpu(rxd_s->dword5);
3430
3431 shift_len = desc_info->shift << 1; /* 2-byte unit */
3432 drv_info_len = desc_info->drv_info_size << 3; /* 8-byte unit */
3433 phy_rtp_len = desc_info->phy_rpt_size << 3; /* 8-byte unit */
3434 hdr_cnv_len = desc_info->hdr_cnv_size << 4; /* 16-byte unit */
3435 desc_info->offset = data_offset + shift_len + drv_info_len +
3436 phy_rtp_len + hdr_cnv_len;
3437
3438 if (desc_info->long_rxdesc)
3439 desc_info->rxd_len = sizeof(struct rtw89_rxdesc_long_v2);
3440 else
3441 desc_info->rxd_len = sizeof(struct rtw89_rxdesc_short_v2);
3442 desc_info->ready = true;
3443
3444 if (phy_rtp_len == sizeof(*rxd_rpt)) {
3445 rxd_rpt = (struct rtw89_rxdesc_phy_rpt_v2 *)(data + data_offset +
3446 desc_info->rxd_len);
3447 desc_info->rssi = le32_get_bits(rxd_rpt->dword0, BE_RXD_PHY_RSSI);
3448 }
3449
3450 if (!desc_info->long_rxdesc)
3451 return;
3452
3453 rxd_l = (struct rtw89_rxdesc_long_v2 *)(data + data_offset);
3454
3455 desc_info->sr_en = le32_get_bits(rxd_l->dword6, BE_RXD_SR_EN);
3456 desc_info->user_id = le32_get_bits(rxd_l->dword6, BE_RXD_USER_ID_MASK);
3457 desc_info->addr_cam_id = le32_get_bits(rxd_l->dword6, BE_RXD_ADDR_CAM_MASK);
3458 desc_info->sec_cam_id = le32_get_bits(rxd_l->dword6, BE_RXD_SEC_CAM_IDX_MASK);
3459
3460 desc_info->rx_pl_id = le32_get_bits(rxd_l->dword7, BE_RXD_RX_PL_ID_MASK);
3461 }
3462 EXPORT_SYMBOL(rtw89_core_query_rxdesc_v2);
3463
3464 struct rtw89_core_iter_rx_status {
3465 struct rtw89_dev *rtwdev;
3466 struct ieee80211_rx_status *rx_status;
3467 struct rtw89_rx_desc_info *desc_info;
3468 u8 mac_id;
3469 };
3470
3471 static
rtw89_core_stats_sta_rx_status_iter(void * data,struct ieee80211_sta * sta)3472 void rtw89_core_stats_sta_rx_status_iter(void *data, struct ieee80211_sta *sta)
3473 {
3474 struct rtw89_core_iter_rx_status *iter_data =
3475 (struct rtw89_core_iter_rx_status *)data;
3476 struct ieee80211_rx_status *rx_status = iter_data->rx_status;
3477 struct rtw89_rx_desc_info *desc_info = iter_data->desc_info;
3478 struct rtw89_sta *rtwsta = sta_to_rtwsta(sta);
3479 struct rtw89_sta_link *rtwsta_link;
3480 u8 mac_id = iter_data->mac_id;
3481
3482 rtwsta_link = rtw89_sta_get_link_inst(rtwsta, desc_info->bb_sel);
3483 if (unlikely(!rtwsta_link))
3484 return;
3485
3486 if (mac_id != rtwsta_link->mac_id)
3487 return;
3488
3489 rtwsta_link->rx_status = *rx_status;
3490 rtwsta_link->rx_hw_rate = desc_info->data_rate;
3491 }
3492
rtw89_core_stats_sta_rx_status(struct rtw89_dev * rtwdev,struct rtw89_rx_desc_info * desc_info,struct ieee80211_rx_status * rx_status)3493 static void rtw89_core_stats_sta_rx_status(struct rtw89_dev *rtwdev,
3494 struct rtw89_rx_desc_info *desc_info,
3495 struct ieee80211_rx_status *rx_status)
3496 {
3497 struct rtw89_core_iter_rx_status iter_data;
3498
3499 if (!desc_info->addr1_match || !desc_info->long_rxdesc)
3500 return;
3501
3502 if (desc_info->frame_type != RTW89_RX_TYPE_DATA)
3503 return;
3504
3505 iter_data.rtwdev = rtwdev;
3506 iter_data.rx_status = rx_status;
3507 iter_data.desc_info = desc_info;
3508 iter_data.mac_id = desc_info->mac_id;
3509 ieee80211_iterate_stations_atomic(rtwdev->hw,
3510 rtw89_core_stats_sta_rx_status_iter,
3511 &iter_data);
3512 }
3513
rtw89_core_update_rx_status(struct rtw89_dev * rtwdev,struct sk_buff * skb,struct rtw89_rx_desc_info * desc_info,struct ieee80211_rx_status * rx_status)3514 static void rtw89_core_update_rx_status(struct rtw89_dev *rtwdev,
3515 struct sk_buff *skb,
3516 struct rtw89_rx_desc_info *desc_info,
3517 struct ieee80211_rx_status *rx_status)
3518 {
3519 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
3520 const struct cfg80211_chan_def *chandef =
3521 rtw89_chandef_get(rtwdev, RTW89_CHANCTX_0);
3522 u16 data_rate;
3523 u8 data_rate_mode;
3524 bool eht = false;
3525 u8 gi;
3526
3527 /* currently using single PHY */
3528 rx_status->freq = chandef->chan->center_freq;
3529 rx_status->band = chandef->chan->band;
3530
3531 if (ieee80211_is_beacon(hdr->frame_control) ||
3532 ieee80211_is_probe_resp(hdr->frame_control))
3533 rx_status->boottime_ns = ktime_get_boottime_ns();
3534
3535 if (rtwdev->scanning &&
3536 RTW89_CHK_FW_FEATURE(SCAN_OFFLOAD, &rtwdev->fw)) {
3537 const struct rtw89_chan *cur = rtw89_scan_chan_get(rtwdev);
3538 u8 chan = cur->primary_channel;
3539 u8 band = cur->band_type;
3540 enum nl80211_band nl_band;
3541
3542 nl_band = rtw89_hw_to_nl80211_band(band);
3543 rx_status->freq = ieee80211_channel_to_frequency(chan, nl_band);
3544 rx_status->band = nl_band;
3545 }
3546
3547 if (desc_info->icv_err || desc_info->crc32_err)
3548 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
3549
3550 if (desc_info->hw_dec &&
3551 !(desc_info->sw_dec || desc_info->icv_err))
3552 rx_status->flag |= RX_FLAG_DECRYPTED;
3553
3554 rx_status->bw = rtw89_hw_to_rate_info_bw(desc_info->bw);
3555
3556 data_rate = desc_info->data_rate;
3557 data_rate_mode = rtw89_get_data_rate_mode(rtwdev, data_rate);
3558 if (data_rate_mode == DATA_RATE_MODE_NON_HT) {
3559 rx_status->encoding = RX_ENC_LEGACY;
3560 rx_status->rate_idx = rtw89_get_data_not_ht_idx(rtwdev, data_rate);
3561 /* convert rate_idx after we get the correct band */
3562 } else if (data_rate_mode == DATA_RATE_MODE_HT) {
3563 rx_status->encoding = RX_ENC_HT;
3564 rx_status->rate_idx = rtw89_get_data_ht_mcs(rtwdev, data_rate);
3565 if (desc_info->gi_ltf)
3566 rx_status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
3567 } else if (data_rate_mode == DATA_RATE_MODE_VHT) {
3568 rx_status->encoding = RX_ENC_VHT;
3569 rx_status->rate_idx = rtw89_get_data_mcs(rtwdev, data_rate);
3570 rx_status->nss = rtw89_get_data_nss(rtwdev, data_rate) + 1;
3571 if (desc_info->gi_ltf)
3572 rx_status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
3573 } else if (data_rate_mode == DATA_RATE_MODE_HE) {
3574 rx_status->encoding = RX_ENC_HE;
3575 rx_status->rate_idx = rtw89_get_data_mcs(rtwdev, data_rate);
3576 rx_status->nss = rtw89_get_data_nss(rtwdev, data_rate) + 1;
3577 } else if (data_rate_mode == DATA_RATE_MODE_EHT) {
3578 rx_status->encoding = RX_ENC_EHT;
3579 rx_status->rate_idx = rtw89_get_data_mcs(rtwdev, data_rate);
3580 rx_status->nss = rtw89_get_data_nss(rtwdev, data_rate) + 1;
3581 eht = true;
3582 } else {
3583 rtw89_warn(rtwdev, "invalid RX rate mode %d\n", data_rate_mode);
3584 }
3585
3586 /* he_gi is used to match ppdu, so we always fill it. */
3587 gi = rtw89_rxdesc_to_nl_he_eht_gi(rtwdev, desc_info->gi_ltf, true, eht);
3588 if (eht)
3589 rx_status->eht.gi = gi;
3590 else
3591 rx_status->he_gi = gi;
3592 rx_status->flag |= RX_FLAG_MACTIME_START;
3593 rx_status->mactime = desc_info->free_run_cnt;
3594
3595 rtw89_chip_phy_rpt_to_rssi(rtwdev, desc_info, rx_status);
3596 rtw89_core_stats_sta_rx_status(rtwdev, desc_info, rx_status);
3597 }
3598
rtw89_update_ps_mode(struct rtw89_dev * rtwdev)3599 static enum rtw89_ps_mode rtw89_update_ps_mode(struct rtw89_dev *rtwdev)
3600 {
3601 const struct rtw89_chip_info *chip = rtwdev->chip;
3602
3603 if (rtwdev->hci.type != RTW89_HCI_TYPE_PCIE)
3604 return RTW89_PS_MODE_NONE;
3605
3606 if (rtw89_disable_ps_mode || !chip->ps_mode_supported ||
3607 RTW89_CHK_FW_FEATURE(NO_DEEP_PS, &rtwdev->fw))
3608 return RTW89_PS_MODE_NONE;
3609
3610 if ((chip->ps_mode_supported & BIT(RTW89_PS_MODE_PWR_GATED)) &&
3611 !RTW89_CHK_FW_FEATURE(NO_LPS_PG, &rtwdev->fw))
3612 return RTW89_PS_MODE_PWR_GATED;
3613
3614 if (chip->ps_mode_supported & BIT(RTW89_PS_MODE_CLK_GATED))
3615 return RTW89_PS_MODE_CLK_GATED;
3616
3617 if (chip->ps_mode_supported & BIT(RTW89_PS_MODE_RFOFF))
3618 return RTW89_PS_MODE_RFOFF;
3619
3620 return RTW89_PS_MODE_NONE;
3621 }
3622
rtw89_core_flush_ppdu_rx_queue(struct rtw89_dev * rtwdev,struct rtw89_rx_desc_info * desc_info)3623 static void rtw89_core_flush_ppdu_rx_queue(struct rtw89_dev *rtwdev,
3624 struct rtw89_rx_desc_info *desc_info)
3625 {
3626 struct rtw89_ppdu_sts_info *ppdu_sts = &rtwdev->ppdu_sts;
3627 u8 band = desc_info->bb_sel ? RTW89_PHY_1 : RTW89_PHY_0;
3628 struct ieee80211_rx_status *rx_status;
3629 struct sk_buff *skb_ppdu, *tmp;
3630
3631 skb_queue_walk_safe(&ppdu_sts->rx_queue[band], skb_ppdu, tmp) {
3632 skb_unlink(skb_ppdu, &ppdu_sts->rx_queue[band]);
3633 rx_status = IEEE80211_SKB_RXCB(skb_ppdu);
3634 rtw89_core_rx_to_mac80211(rtwdev, NULL, desc_info, skb_ppdu, rx_status);
3635 }
3636 }
3637
3638 static
rtw89_core_rx_pkt_hdl(struct rtw89_dev * rtwdev,const struct sk_buff * skb,const struct rtw89_rx_desc_info * desc)3639 void rtw89_core_rx_pkt_hdl(struct rtw89_dev *rtwdev, const struct sk_buff *skb,
3640 const struct rtw89_rx_desc_info *desc)
3641 {
3642 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
3643 struct rtw89_sta_link *rtwsta_link;
3644 struct ieee80211_sta *sta;
3645 struct rtw89_sta *rtwsta;
3646 u8 macid = desc->mac_id;
3647
3648 if (!refcount_read(&rtwdev->refcount_ap_info))
3649 return;
3650
3651 rcu_read_lock();
3652
3653 rtwsta_link = rtw89_assoc_link_rcu_dereference(rtwdev, macid);
3654 if (!rtwsta_link)
3655 goto out;
3656
3657 rtwsta = rtwsta_link->rtwsta;
3658 if (!test_bit(RTW89_REMOTE_STA_IN_PS, rtwsta->flags))
3659 goto out;
3660
3661 sta = rtwsta_to_sta(rtwsta);
3662 if (ieee80211_is_pspoll(hdr->frame_control))
3663 ieee80211_sta_pspoll(sta);
3664 else if (ieee80211_has_pm(hdr->frame_control) &&
3665 (ieee80211_is_data_qos(hdr->frame_control) ||
3666 ieee80211_is_qos_nullfunc(hdr->frame_control)))
3667 ieee80211_sta_uapsd_trigger(sta, ieee80211_get_tid(hdr));
3668
3669 out:
3670 rcu_read_unlock();
3671 }
3672
rtw89_core_rx(struct rtw89_dev * rtwdev,struct rtw89_rx_desc_info * desc_info,struct sk_buff * skb)3673 void rtw89_core_rx(struct rtw89_dev *rtwdev,
3674 struct rtw89_rx_desc_info *desc_info,
3675 struct sk_buff *skb)
3676 {
3677 struct ieee80211_rx_status *rx_status;
3678 struct rtw89_ppdu_sts_info *ppdu_sts = &rtwdev->ppdu_sts;
3679 u8 ppdu_cnt = desc_info->ppdu_cnt;
3680 u8 band = desc_info->bb_sel ? RTW89_PHY_1 : RTW89_PHY_0;
3681
3682 if (desc_info->pkt_type != RTW89_CORE_RX_TYPE_WIFI) {
3683 rtw89_core_rx_process_report(rtwdev, desc_info, skb);
3684 return;
3685 }
3686
3687 if (ppdu_sts->curr_rx_ppdu_cnt[band] != ppdu_cnt) {
3688 rtw89_core_flush_ppdu_rx_queue(rtwdev, desc_info);
3689 ppdu_sts->curr_rx_ppdu_cnt[band] = ppdu_cnt;
3690 }
3691
3692 rx_status = IEEE80211_SKB_RXCB(skb);
3693 memset(rx_status, 0, sizeof(*rx_status));
3694 rtw89_core_update_rx_status(rtwdev, skb, desc_info, rx_status);
3695 rtw89_core_rx_pkt_hdl(rtwdev, skb, desc_info);
3696 if (desc_info->long_rxdesc &&
3697 BIT(desc_info->frame_type) & PPDU_FILTER_BITMAP)
3698 skb_queue_tail(&ppdu_sts->rx_queue[band], skb);
3699 else
3700 rtw89_core_rx_to_mac80211(rtwdev, NULL, desc_info, skb, rx_status);
3701 }
3702 EXPORT_SYMBOL(rtw89_core_rx);
3703
rtw89_core_napi_start(struct rtw89_dev * rtwdev)3704 void rtw89_core_napi_start(struct rtw89_dev *rtwdev)
3705 {
3706 if (test_and_set_bit(RTW89_FLAG_NAPI_RUNNING, rtwdev->flags))
3707 return;
3708
3709 napi_enable(&rtwdev->napi);
3710 }
3711 EXPORT_SYMBOL(rtw89_core_napi_start);
3712
rtw89_core_napi_stop(struct rtw89_dev * rtwdev)3713 void rtw89_core_napi_stop(struct rtw89_dev *rtwdev)
3714 {
3715 if (!test_and_clear_bit(RTW89_FLAG_NAPI_RUNNING, rtwdev->flags))
3716 return;
3717
3718 napi_synchronize(&rtwdev->napi);
3719 napi_disable(&rtwdev->napi);
3720 }
3721 EXPORT_SYMBOL(rtw89_core_napi_stop);
3722
rtw89_core_napi_init(struct rtw89_dev * rtwdev)3723 int rtw89_core_napi_init(struct rtw89_dev *rtwdev)
3724 {
3725 rtwdev->netdev = alloc_netdev_dummy(0);
3726 if (!rtwdev->netdev)
3727 return -ENOMEM;
3728
3729 netif_napi_add(rtwdev->netdev, &rtwdev->napi,
3730 rtwdev->hci.ops->napi_poll);
3731 return 0;
3732 }
3733 EXPORT_SYMBOL(rtw89_core_napi_init);
3734
rtw89_core_napi_deinit(struct rtw89_dev * rtwdev)3735 void rtw89_core_napi_deinit(struct rtw89_dev *rtwdev)
3736 {
3737 rtw89_core_napi_stop(rtwdev);
3738 netif_napi_del(&rtwdev->napi);
3739 free_netdev(rtwdev->netdev);
3740 }
3741 EXPORT_SYMBOL(rtw89_core_napi_deinit);
3742
rtw89_core_ba_work(struct work_struct * work)3743 static void rtw89_core_ba_work(struct work_struct *work)
3744 {
3745 struct rtw89_dev *rtwdev =
3746 container_of(work, struct rtw89_dev, ba_work);
3747 struct rtw89_txq *rtwtxq, *tmp;
3748 int ret;
3749
3750 spin_lock_bh(&rtwdev->ba_lock);
3751 list_for_each_entry_safe(rtwtxq, tmp, &rtwdev->ba_list, list) {
3752 struct ieee80211_txq *txq = rtw89_txq_to_txq(rtwtxq);
3753 struct ieee80211_sta *sta = txq->sta;
3754 struct rtw89_sta *rtwsta = sta_to_rtwsta_safe(sta);
3755 u8 tid = txq->tid;
3756
3757 if (!sta) {
3758 rtw89_warn(rtwdev, "cannot start BA without sta\n");
3759 goto skip_ba_work;
3760 }
3761
3762 if (rtwsta->disassoc) {
3763 rtw89_debug(rtwdev, RTW89_DBG_TXRX,
3764 "cannot start BA with disassoc sta\n");
3765 goto skip_ba_work;
3766 }
3767
3768 ret = ieee80211_start_tx_ba_session(sta, tid, 0);
3769 if (ret) {
3770 rtw89_debug(rtwdev, RTW89_DBG_TXRX,
3771 "failed to setup BA session for %pM:%2d: %d\n",
3772 sta->addr, tid, ret);
3773 if (ret == -EINVAL)
3774 set_bit(RTW89_TXQ_F_BLOCK_BA, &rtwtxq->flags);
3775 }
3776 skip_ba_work:
3777 list_del_init(&rtwtxq->list);
3778 }
3779 spin_unlock_bh(&rtwdev->ba_lock);
3780 }
3781
rtw89_core_free_sta_pending_ba(struct rtw89_dev * rtwdev,struct ieee80211_sta * sta)3782 void rtw89_core_free_sta_pending_ba(struct rtw89_dev *rtwdev,
3783 struct ieee80211_sta *sta)
3784 {
3785 struct rtw89_txq *rtwtxq, *tmp;
3786
3787 spin_lock_bh(&rtwdev->ba_lock);
3788 list_for_each_entry_safe(rtwtxq, tmp, &rtwdev->ba_list, list) {
3789 struct ieee80211_txq *txq = rtw89_txq_to_txq(rtwtxq);
3790
3791 if (sta == txq->sta)
3792 list_del_init(&rtwtxq->list);
3793 }
3794 spin_unlock_bh(&rtwdev->ba_lock);
3795 }
3796
rtw89_core_free_sta_pending_forbid_ba(struct rtw89_dev * rtwdev,struct ieee80211_sta * sta)3797 void rtw89_core_free_sta_pending_forbid_ba(struct rtw89_dev *rtwdev,
3798 struct ieee80211_sta *sta)
3799 {
3800 struct rtw89_txq *rtwtxq, *tmp;
3801
3802 spin_lock_bh(&rtwdev->ba_lock);
3803 list_for_each_entry_safe(rtwtxq, tmp, &rtwdev->forbid_ba_list, list) {
3804 struct ieee80211_txq *txq = rtw89_txq_to_txq(rtwtxq);
3805
3806 if (sta == txq->sta) {
3807 clear_bit(RTW89_TXQ_F_FORBID_BA, &rtwtxq->flags);
3808 list_del_init(&rtwtxq->list);
3809 }
3810 }
3811 spin_unlock_bh(&rtwdev->ba_lock);
3812 }
3813
rtw89_core_free_sta_pending_roc_tx(struct rtw89_dev * rtwdev,struct ieee80211_sta * sta)3814 void rtw89_core_free_sta_pending_roc_tx(struct rtw89_dev *rtwdev,
3815 struct ieee80211_sta *sta)
3816 {
3817 struct rtw89_sta *rtwsta = sta_to_rtwsta(sta);
3818 struct sk_buff *skb;
3819
3820 while ((skb = skb_dequeue(&rtwsta->roc_queue)))
3821 dev_kfree_skb_any(skb);
3822 }
3823
rtw89_core_stop_tx_ba_session(struct rtw89_dev * rtwdev,struct rtw89_txq * rtwtxq)3824 static void rtw89_core_stop_tx_ba_session(struct rtw89_dev *rtwdev,
3825 struct rtw89_txq *rtwtxq)
3826 {
3827 struct ieee80211_txq *txq = rtw89_txq_to_txq(rtwtxq);
3828 struct ieee80211_sta *sta = txq->sta;
3829 struct rtw89_sta *rtwsta = sta_to_rtwsta_safe(sta);
3830
3831 if (unlikely(!rtwsta) || unlikely(rtwsta->disassoc))
3832 return;
3833
3834 if (!test_bit(RTW89_TXQ_F_AMPDU, &rtwtxq->flags) ||
3835 test_bit(RTW89_TXQ_F_FORBID_BA, &rtwtxq->flags))
3836 return;
3837
3838 spin_lock_bh(&rtwdev->ba_lock);
3839 if (!test_and_set_bit(RTW89_TXQ_F_FORBID_BA, &rtwtxq->flags))
3840 list_add_tail(&rtwtxq->list, &rtwdev->forbid_ba_list);
3841 spin_unlock_bh(&rtwdev->ba_lock);
3842
3843 ieee80211_stop_tx_ba_session(sta, txq->tid);
3844 cancel_delayed_work(&rtwdev->forbid_ba_work);
3845 ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->forbid_ba_work,
3846 RTW89_FORBID_BA_TIMER);
3847 }
3848
rtw89_core_txq_check_agg(struct rtw89_dev * rtwdev,struct rtw89_txq * rtwtxq,struct sk_buff * skb)3849 static void rtw89_core_txq_check_agg(struct rtw89_dev *rtwdev,
3850 struct rtw89_txq *rtwtxq,
3851 struct sk_buff *skb)
3852 {
3853 struct ieee80211_hw *hw = rtwdev->hw;
3854 struct ieee80211_txq *txq = rtw89_txq_to_txq(rtwtxq);
3855 struct ieee80211_sta *sta = txq->sta;
3856 struct rtw89_sta *rtwsta = sta_to_rtwsta_safe(sta);
3857
3858 if (test_bit(RTW89_TXQ_F_FORBID_BA, &rtwtxq->flags))
3859 return;
3860
3861 if (unlikely(skb->protocol == cpu_to_be16(ETH_P_PAE))) {
3862 rtw89_core_stop_tx_ba_session(rtwdev, rtwtxq);
3863 return;
3864 }
3865
3866 if (unlikely(!sta))
3867 return;
3868
3869 if (unlikely(test_bit(RTW89_TXQ_F_BLOCK_BA, &rtwtxq->flags)))
3870 return;
3871
3872 if (test_bit(RTW89_TXQ_F_AMPDU, &rtwtxq->flags)) {
3873 IEEE80211_SKB_CB(skb)->flags |= IEEE80211_TX_CTL_AMPDU;
3874 return;
3875 }
3876
3877 spin_lock_bh(&rtwdev->ba_lock);
3878 if (!rtwsta->disassoc && list_empty(&rtwtxq->list)) {
3879 list_add_tail(&rtwtxq->list, &rtwdev->ba_list);
3880 ieee80211_queue_work(hw, &rtwdev->ba_work);
3881 }
3882 spin_unlock_bh(&rtwdev->ba_lock);
3883 }
3884
rtw89_core_txq_push(struct rtw89_dev * rtwdev,struct rtw89_txq * rtwtxq,unsigned long frame_cnt,unsigned long byte_cnt)3885 static void rtw89_core_txq_push(struct rtw89_dev *rtwdev,
3886 struct rtw89_txq *rtwtxq,
3887 unsigned long frame_cnt,
3888 unsigned long byte_cnt)
3889 {
3890 struct ieee80211_txq *txq = rtw89_txq_to_txq(rtwtxq);
3891 struct ieee80211_vif *vif = txq->vif;
3892 struct ieee80211_sta *sta = txq->sta;
3893 struct sk_buff *skb;
3894 unsigned long i;
3895 int ret;
3896
3897 rcu_read_lock();
3898 for (i = 0; i < frame_cnt; i++) {
3899 skb = ieee80211_tx_dequeue_ni(rtwdev->hw, txq);
3900 if (!skb) {
3901 rtw89_debug(rtwdev, RTW89_DBG_TXRX, "dequeue a NULL skb\n");
3902 goto out;
3903 }
3904 rtw89_core_txq_check_agg(rtwdev, rtwtxq, skb);
3905 ret = rtw89_core_tx_write(rtwdev, vif, sta, skb, NULL);
3906 if (ret) {
3907 rtw89_err(rtwdev, "failed to push txq: %d\n", ret);
3908 ieee80211_free_txskb(rtwdev->hw, skb);
3909 break;
3910 }
3911 }
3912 out:
3913 rcu_read_unlock();
3914 }
3915
rtw89_check_and_reclaim_tx_resource(struct rtw89_dev * rtwdev,u8 tid)3916 static u32 rtw89_check_and_reclaim_tx_resource(struct rtw89_dev *rtwdev, u8 tid)
3917 {
3918 u8 qsel, ch_dma;
3919
3920 qsel = rtw89_core_get_qsel(rtwdev, tid);
3921 ch_dma = rtw89_chip_get_ch_dma(rtwdev, qsel);
3922
3923 return rtw89_hci_check_and_reclaim_tx_resource(rtwdev, ch_dma);
3924 }
3925
rtw89_core_txq_agg_wait(struct rtw89_dev * rtwdev,struct ieee80211_txq * txq,unsigned long * frame_cnt,bool * sched_txq,bool * reinvoke)3926 static bool rtw89_core_txq_agg_wait(struct rtw89_dev *rtwdev,
3927 struct ieee80211_txq *txq,
3928 unsigned long *frame_cnt,
3929 bool *sched_txq, bool *reinvoke)
3930 {
3931 struct rtw89_txq *rtwtxq = (struct rtw89_txq *)txq->drv_priv;
3932 struct rtw89_sta *rtwsta = sta_to_rtwsta_safe(txq->sta);
3933 struct rtw89_sta_link *rtwsta_link;
3934
3935 if (!rtwsta)
3936 return false;
3937
3938 rtwsta_link = rtw89_get_designated_link(rtwsta);
3939 if (unlikely(!rtwsta_link)) {
3940 rtw89_err(rtwdev, "agg wait: find no designated link\n");
3941 return false;
3942 }
3943
3944 if (rtwsta_link->max_agg_wait <= 0)
3945 return false;
3946
3947 if (rtwdev->stats.tx_tfc_lv <= RTW89_TFC_MID)
3948 return false;
3949
3950 if (*frame_cnt > 1) {
3951 *frame_cnt -= 1;
3952 *sched_txq = true;
3953 *reinvoke = true;
3954 rtwtxq->wait_cnt = 1;
3955 return false;
3956 }
3957
3958 if (*frame_cnt == 1 && rtwtxq->wait_cnt < rtwsta_link->max_agg_wait) {
3959 *reinvoke = true;
3960 rtwtxq->wait_cnt++;
3961 return true;
3962 }
3963
3964 rtwtxq->wait_cnt = 0;
3965 return false;
3966 }
3967
rtw89_core_txq_schedule(struct rtw89_dev * rtwdev,u8 ac,bool * reinvoke)3968 static void rtw89_core_txq_schedule(struct rtw89_dev *rtwdev, u8 ac, bool *reinvoke)
3969 {
3970 struct ieee80211_hw *hw = rtwdev->hw;
3971 struct ieee80211_txq *txq;
3972 struct rtw89_vif *rtwvif;
3973 struct rtw89_txq *rtwtxq;
3974 unsigned long frame_cnt;
3975 unsigned long byte_cnt;
3976 u32 tx_resource;
3977 bool sched_txq;
3978
3979 ieee80211_txq_schedule_start(hw, ac);
3980 while ((txq = ieee80211_next_txq(hw, ac))) {
3981 rtwtxq = (struct rtw89_txq *)txq->drv_priv;
3982 rtwvif = vif_to_rtwvif(txq->vif);
3983
3984 if (rtwvif->offchan) {
3985 ieee80211_return_txq(hw, txq, true);
3986 continue;
3987 }
3988 tx_resource = rtw89_check_and_reclaim_tx_resource(rtwdev, txq->tid);
3989 sched_txq = false;
3990
3991 ieee80211_txq_get_depth(txq, &frame_cnt, &byte_cnt);
3992 if (rtw89_core_txq_agg_wait(rtwdev, txq, &frame_cnt, &sched_txq, reinvoke)) {
3993 ieee80211_return_txq(hw, txq, true);
3994 continue;
3995 }
3996 frame_cnt = min_t(unsigned long, frame_cnt, tx_resource);
3997 rtw89_core_txq_push(rtwdev, rtwtxq, frame_cnt, byte_cnt);
3998 ieee80211_return_txq(hw, txq, sched_txq);
3999 if (frame_cnt != 0)
4000 rtw89_core_tx_kick_off(rtwdev, rtw89_core_get_qsel(rtwdev, txq->tid));
4001
4002 /* bound of tx_resource could get stuck due to burst traffic */
4003 if (frame_cnt == tx_resource)
4004 *reinvoke = true;
4005 }
4006 ieee80211_txq_schedule_end(hw, ac);
4007 }
4008
rtw89_ips_work(struct wiphy * wiphy,struct wiphy_work * work)4009 static void rtw89_ips_work(struct wiphy *wiphy, struct wiphy_work *work)
4010 {
4011 struct rtw89_dev *rtwdev = container_of(work, struct rtw89_dev,
4012 ips_work);
4013
4014 lockdep_assert_wiphy(wiphy);
4015
4016 rtw89_enter_ips_by_hwflags(rtwdev);
4017 }
4018
rtw89_core_txq_work(struct work_struct * w)4019 static void rtw89_core_txq_work(struct work_struct *w)
4020 {
4021 struct rtw89_dev *rtwdev = container_of(w, struct rtw89_dev, txq_work);
4022 bool reinvoke = false;
4023 u8 ac;
4024
4025 for (ac = 0; ac < IEEE80211_NUM_ACS; ac++)
4026 rtw89_core_txq_schedule(rtwdev, ac, &reinvoke);
4027
4028 if (reinvoke) {
4029 /* reinvoke to process the last frame */
4030 mod_delayed_work(rtwdev->txq_wq, &rtwdev->txq_reinvoke_work, 1);
4031 }
4032 }
4033
rtw89_core_txq_reinvoke_work(struct work_struct * w)4034 static void rtw89_core_txq_reinvoke_work(struct work_struct *w)
4035 {
4036 struct rtw89_dev *rtwdev = container_of(w, struct rtw89_dev,
4037 txq_reinvoke_work.work);
4038
4039 queue_work(rtwdev->txq_wq, &rtwdev->txq_work);
4040 }
4041
rtw89_forbid_ba_work(struct work_struct * w)4042 static void rtw89_forbid_ba_work(struct work_struct *w)
4043 {
4044 struct rtw89_dev *rtwdev = container_of(w, struct rtw89_dev,
4045 forbid_ba_work.work);
4046 struct rtw89_txq *rtwtxq, *tmp;
4047
4048 spin_lock_bh(&rtwdev->ba_lock);
4049 list_for_each_entry_safe(rtwtxq, tmp, &rtwdev->forbid_ba_list, list) {
4050 clear_bit(RTW89_TXQ_F_FORBID_BA, &rtwtxq->flags);
4051 list_del_init(&rtwtxq->list);
4052 }
4053 spin_unlock_bh(&rtwdev->ba_lock);
4054 }
4055
rtw89_core_sta_pending_tx_iter(void * data,struct ieee80211_sta * sta)4056 static void rtw89_core_sta_pending_tx_iter(void *data,
4057 struct ieee80211_sta *sta)
4058 {
4059 struct rtw89_sta *rtwsta = sta_to_rtwsta(sta);
4060 struct rtw89_dev *rtwdev = rtwsta->rtwdev;
4061 struct rtw89_vif *rtwvif = rtwsta->rtwvif;
4062 struct ieee80211_vif *vif = rtwvif_to_vif(rtwvif);
4063 struct rtw89_vif_link *target = data;
4064 struct rtw89_vif_link *rtwvif_link;
4065 unsigned int link_id;
4066 struct sk_buff *skb;
4067 int qsel, ret;
4068
4069 rtw89_vif_for_each_link(rtwvif, rtwvif_link, link_id)
4070 if (rtwvif_link->chanctx_idx == target->chanctx_idx)
4071 goto bottom;
4072
4073 return;
4074
4075 bottom:
4076 if (skb_queue_len(&rtwsta->roc_queue) == 0)
4077 return;
4078
4079 while ((skb = skb_dequeue(&rtwsta->roc_queue))) {
4080 ret = rtw89_core_tx_write(rtwdev, vif, sta, skb, &qsel);
4081 if (ret) {
4082 rtw89_warn(rtwdev, "pending tx failed with %d\n", ret);
4083 dev_kfree_skb_any(skb);
4084 } else {
4085 rtw89_core_tx_kick_off(rtwdev, qsel);
4086 }
4087 }
4088 }
4089
rtw89_core_handle_sta_pending_tx(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link)4090 static void rtw89_core_handle_sta_pending_tx(struct rtw89_dev *rtwdev,
4091 struct rtw89_vif_link *rtwvif_link)
4092 {
4093 ieee80211_iterate_stations_atomic(rtwdev->hw,
4094 rtw89_core_sta_pending_tx_iter,
4095 rtwvif_link);
4096 }
4097
rtw89_core_send_nullfunc(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link,bool qos,bool ps,int timeout)4098 int rtw89_core_send_nullfunc(struct rtw89_dev *rtwdev, struct rtw89_vif_link *rtwvif_link,
4099 bool qos, bool ps, int timeout)
4100 {
4101 struct ieee80211_vif *vif = rtwvif_link_to_vif(rtwvif_link);
4102 int link_id = ieee80211_vif_is_mld(vif) ? rtwvif_link->link_id : -1;
4103 struct rtw89_sta_link *rtwsta_link;
4104 struct rtw89_tx_wait_info *wait;
4105 struct ieee80211_sta *sta;
4106 struct ieee80211_hdr *hdr;
4107 struct rtw89_sta *rtwsta;
4108 struct sk_buff *skb;
4109 int ret, qsel;
4110
4111 if (vif->type != NL80211_IFTYPE_STATION || !vif->cfg.assoc)
4112 return 0;
4113
4114 wait = kzalloc(sizeof(*wait), GFP_KERNEL);
4115 if (!wait)
4116 return -ENOMEM;
4117
4118 init_completion(&wait->completion);
4119
4120 rcu_read_lock();
4121 sta = ieee80211_find_sta(vif, vif->cfg.ap_addr);
4122 if (!sta) {
4123 ret = -EINVAL;
4124 goto out;
4125 }
4126 rtwsta = sta_to_rtwsta(sta);
4127
4128 skb = ieee80211_nullfunc_get(rtwdev->hw, vif, link_id, qos);
4129 if (!skb) {
4130 ret = -ENOMEM;
4131 goto out;
4132 }
4133
4134 wait->skb = skb;
4135
4136 hdr = (struct ieee80211_hdr *)skb->data;
4137 if (ps)
4138 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
4139
4140 rtwsta_link = rtwsta->links[rtwvif_link->link_id];
4141 if (unlikely(!rtwsta_link)) {
4142 ret = -ENOLINK;
4143 dev_kfree_skb_any(skb);
4144 goto out;
4145 }
4146
4147 ret = rtw89_core_tx_write_link(rtwdev, rtwvif_link, rtwsta_link, skb, &qsel, true,
4148 wait);
4149 if (ret) {
4150 rtw89_warn(rtwdev, "nullfunc transmit failed: %d\n", ret);
4151 dev_kfree_skb_any(skb);
4152 goto out;
4153 }
4154
4155 rcu_read_unlock();
4156
4157 return rtw89_core_tx_kick_off_and_wait(rtwdev, skb, wait, qsel,
4158 timeout);
4159 out:
4160 rcu_read_unlock();
4161 kfree(wait);
4162
4163 return ret;
4164 }
4165
rtw89_roc_start(struct rtw89_dev * rtwdev,struct rtw89_vif * rtwvif)4166 void rtw89_roc_start(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif)
4167 {
4168 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;
4169 struct rtw89_chanctx_pause_parm pause_parm = {
4170 .rsn = RTW89_CHANCTX_PAUSE_REASON_ROC,
4171 };
4172 struct ieee80211_hw *hw = rtwdev->hw;
4173 struct rtw89_roc *roc = &rtwvif->roc;
4174 struct rtw89_vif_link *rtwvif_link;
4175 struct cfg80211_chan_def roc_chan;
4176 struct rtw89_vif *tmp_vif;
4177 u32 reg;
4178 int ret;
4179
4180 lockdep_assert_wiphy(hw->wiphy);
4181
4182 rtw89_leave_ips_by_hwflags(rtwdev);
4183 rtw89_leave_lps(rtwdev);
4184
4185 rtwvif_link = rtw89_get_designated_link(rtwvif);
4186 if (unlikely(!rtwvif_link)) {
4187 rtw89_err(rtwdev, "roc start: find no designated link\n");
4188 return;
4189 }
4190
4191 roc->link_id = rtwvif_link->link_id;
4192
4193 pause_parm.trigger = rtwvif_link;
4194 rtw89_chanctx_pause(rtwdev, &pause_parm);
4195
4196 ret = rtw89_core_send_nullfunc(rtwdev, rtwvif_link, true, true,
4197 RTW89_ROC_TX_TIMEOUT);
4198 if (ret)
4199 rtw89_debug(rtwdev, RTW89_DBG_TXRX,
4200 "roc send null-1 failed: %d\n", ret);
4201
4202 rtw89_for_each_rtwvif(rtwdev, tmp_vif) {
4203 struct rtw89_vif_link *tmp_link;
4204 unsigned int link_id;
4205
4206 rtw89_vif_for_each_link(tmp_vif, tmp_link, link_id) {
4207 if (tmp_link->chanctx_idx == rtwvif_link->chanctx_idx) {
4208 tmp_vif->offchan = true;
4209 break;
4210 }
4211 }
4212 }
4213
4214 cfg80211_chandef_create(&roc_chan, &roc->chan, NL80211_CHAN_NO_HT);
4215 rtw89_config_roc_chandef(rtwdev, rtwvif_link, &roc_chan);
4216 rtw89_set_channel(rtwdev);
4217
4218 reg = rtw89_mac_reg_by_idx(rtwdev, mac->rx_fltr, rtwvif_link->mac_idx);
4219 rtw89_write32_clr(rtwdev, reg, B_AX_A_UC_CAM_MATCH | B_AX_A_BC_CAM_MATCH);
4220
4221 ieee80211_ready_on_channel(hw);
4222 wiphy_delayed_work_cancel(hw->wiphy, &rtwvif->roc.roc_work);
4223 wiphy_delayed_work_queue(hw->wiphy, &rtwvif->roc.roc_work,
4224 msecs_to_jiffies(rtwvif->roc.duration));
4225 }
4226
rtw89_roc_end(struct rtw89_dev * rtwdev,struct rtw89_vif * rtwvif)4227 void rtw89_roc_end(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif)
4228 {
4229 struct ieee80211_hw *hw = rtwdev->hw;
4230 struct rtw89_roc *roc = &rtwvif->roc;
4231 struct rtw89_vif_link *rtwvif_link;
4232 struct rtw89_vif *tmp_vif;
4233 int ret;
4234
4235 lockdep_assert_wiphy(hw->wiphy);
4236
4237 ieee80211_remain_on_channel_expired(hw);
4238
4239 rtw89_leave_ips_by_hwflags(rtwdev);
4240 rtw89_leave_lps(rtwdev);
4241
4242 rtwvif_link = rtwvif->links[roc->link_id];
4243 if (unlikely(!rtwvif_link)) {
4244 rtw89_err(rtwdev, "roc end: find no link (link id %u)\n",
4245 roc->link_id);
4246 return;
4247 }
4248
4249 rtw89_mac_set_rx_fltr(rtwdev, rtwvif_link->mac_idx, rtwdev->hal.rx_fltr);
4250
4251 roc->state = RTW89_ROC_IDLE;
4252 rtw89_config_roc_chandef(rtwdev, rtwvif_link, NULL);
4253 rtw89_chanctx_proceed(rtwdev, NULL);
4254 ret = rtw89_core_send_nullfunc(rtwdev, rtwvif_link, true, false,
4255 RTW89_ROC_TX_TIMEOUT);
4256 if (ret)
4257 rtw89_debug(rtwdev, RTW89_DBG_TXRX,
4258 "roc send null-0 failed: %d\n", ret);
4259
4260 rtw89_for_each_rtwvif(rtwdev, tmp_vif)
4261 tmp_vif->offchan = false;
4262
4263 rtw89_core_handle_sta_pending_tx(rtwdev, rtwvif_link);
4264 queue_work(rtwdev->txq_wq, &rtwdev->txq_work);
4265
4266 if (hw->conf.flags & IEEE80211_CONF_IDLE)
4267 wiphy_delayed_work_queue(hw->wiphy, &roc->roc_work,
4268 msecs_to_jiffies(RTW89_ROC_IDLE_TIMEOUT));
4269 }
4270
rtw89_roc_work(struct wiphy * wiphy,struct wiphy_work * work)4271 void rtw89_roc_work(struct wiphy *wiphy, struct wiphy_work *work)
4272 {
4273 struct rtw89_vif *rtwvif = container_of(work, struct rtw89_vif,
4274 roc.roc_work.work);
4275 struct rtw89_dev *rtwdev = rtwvif->rtwdev;
4276 struct rtw89_roc *roc = &rtwvif->roc;
4277
4278 lockdep_assert_wiphy(wiphy);
4279
4280 switch (roc->state) {
4281 case RTW89_ROC_IDLE:
4282 rtw89_enter_ips_by_hwflags(rtwdev);
4283 break;
4284 case RTW89_ROC_MGMT:
4285 case RTW89_ROC_NORMAL:
4286 rtw89_roc_end(rtwdev, rtwvif);
4287 break;
4288 default:
4289 break;
4290 }
4291 }
4292
rtw89_get_traffic_level(struct rtw89_dev * rtwdev,u32 throughput,u64 cnt,enum rtw89_tfc_interval interval)4293 static enum rtw89_tfc_lv rtw89_get_traffic_level(struct rtw89_dev *rtwdev,
4294 u32 throughput, u64 cnt,
4295 enum rtw89_tfc_interval interval)
4296 {
4297 u64 cnt_level;
4298
4299 switch (interval) {
4300 default:
4301 case RTW89_TFC_INTERVAL_100MS:
4302 cnt_level = 5;
4303 break;
4304 case RTW89_TFC_INTERVAL_2SEC:
4305 cnt_level = 100;
4306 break;
4307 }
4308
4309 if (cnt < cnt_level)
4310 return RTW89_TFC_IDLE;
4311 if (throughput > 50)
4312 return RTW89_TFC_HIGH;
4313 if (throughput > 10)
4314 return RTW89_TFC_MID;
4315 if (throughput > 2)
4316 return RTW89_TFC_LOW;
4317 return RTW89_TFC_ULTRA_LOW;
4318 }
4319
rtw89_traffic_stats_calc(struct rtw89_dev * rtwdev,struct rtw89_traffic_stats * stats,enum rtw89_tfc_interval interval)4320 static bool rtw89_traffic_stats_calc(struct rtw89_dev *rtwdev,
4321 struct rtw89_traffic_stats *stats,
4322 enum rtw89_tfc_interval interval)
4323 {
4324 enum rtw89_tfc_lv tx_tfc_lv = stats->tx_tfc_lv;
4325 enum rtw89_tfc_lv rx_tfc_lv = stats->rx_tfc_lv;
4326
4327 stats->tx_throughput_raw = rtw89_bytes_to_mbps(stats->tx_unicast, interval);
4328 stats->rx_throughput_raw = rtw89_bytes_to_mbps(stats->rx_unicast, interval);
4329
4330 ewma_tp_add(&stats->tx_ewma_tp, stats->tx_throughput_raw);
4331 ewma_tp_add(&stats->rx_ewma_tp, stats->rx_throughput_raw);
4332
4333 stats->tx_throughput = ewma_tp_read(&stats->tx_ewma_tp);
4334 stats->rx_throughput = ewma_tp_read(&stats->rx_ewma_tp);
4335 stats->tx_tfc_lv = rtw89_get_traffic_level(rtwdev, stats->tx_throughput,
4336 stats->tx_cnt, interval);
4337 stats->rx_tfc_lv = rtw89_get_traffic_level(rtwdev, stats->rx_throughput,
4338 stats->rx_cnt, interval);
4339 stats->tx_avg_len = stats->tx_cnt ?
4340 DIV_ROUND_DOWN_ULL(stats->tx_unicast, stats->tx_cnt) : 0;
4341 stats->rx_avg_len = stats->rx_cnt ?
4342 DIV_ROUND_DOWN_ULL(stats->rx_unicast, stats->rx_cnt) : 0;
4343
4344 stats->tx_unicast = 0;
4345 stats->rx_unicast = 0;
4346 stats->tx_cnt = 0;
4347 stats->rx_cnt = 0;
4348 stats->rx_tf_periodic = stats->rx_tf_acc;
4349 stats->rx_tf_acc = 0;
4350
4351 if (tx_tfc_lv != stats->tx_tfc_lv || rx_tfc_lv != stats->rx_tfc_lv)
4352 return true;
4353
4354 return false;
4355 }
4356
rtw89_traffic_stats_track(struct rtw89_dev * rtwdev)4357 static bool rtw89_traffic_stats_track(struct rtw89_dev *rtwdev)
4358 {
4359 struct rtw89_vif_link *rtwvif_link;
4360 struct rtw89_vif *rtwvif;
4361 unsigned int link_id;
4362 bool tfc_changed;
4363
4364 tfc_changed = rtw89_traffic_stats_calc(rtwdev, &rtwdev->stats,
4365 RTW89_TFC_INTERVAL_2SEC);
4366
4367 rtw89_for_each_rtwvif(rtwdev, rtwvif) {
4368 rtw89_traffic_stats_calc(rtwdev, &rtwvif->stats,
4369 RTW89_TFC_INTERVAL_2SEC);
4370
4371 rtw89_vif_for_each_link(rtwvif, rtwvif_link, link_id)
4372 rtw89_fw_h2c_tp_offload(rtwdev, rtwvif_link);
4373 }
4374
4375 return tfc_changed;
4376 }
4377
rtw89_enter_lps_track(struct rtw89_dev * rtwdev)4378 static void rtw89_enter_lps_track(struct rtw89_dev *rtwdev)
4379 {
4380 struct ieee80211_vif *vif;
4381 struct rtw89_vif *rtwvif;
4382
4383 rtw89_for_each_rtwvif(rtwdev, rtwvif) {
4384 if (rtwvif->tdls_peer)
4385 continue;
4386 if (rtwvif->offchan)
4387 continue;
4388
4389 if (rtwvif->stats_ps.tx_tfc_lv >= RTW89_TFC_MID ||
4390 rtwvif->stats_ps.rx_tfc_lv >= RTW89_TFC_MID)
4391 continue;
4392
4393 vif = rtwvif_to_vif(rtwvif);
4394
4395 if (!(vif->type == NL80211_IFTYPE_STATION ||
4396 vif->type == NL80211_IFTYPE_P2P_CLIENT))
4397 continue;
4398
4399 if (!rtw89_core_bcn_track_can_lps(rtwdev))
4400 continue;
4401
4402 rtw89_enter_lps(rtwdev, rtwvif, true);
4403 }
4404 }
4405
rtw89_core_rfk_track(struct rtw89_dev * rtwdev)4406 static void rtw89_core_rfk_track(struct rtw89_dev *rtwdev)
4407 {
4408 enum rtw89_entity_mode mode;
4409
4410 mode = rtw89_get_entity_mode(rtwdev);
4411 if (mode == RTW89_ENTITY_MODE_MCC)
4412 return;
4413
4414 rtw89_chip_rfk_track(rtwdev);
4415 }
4416
rtw89_core_update_p2p_ps(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link,struct ieee80211_bss_conf * bss_conf)4417 void rtw89_core_update_p2p_ps(struct rtw89_dev *rtwdev,
4418 struct rtw89_vif_link *rtwvif_link,
4419 struct ieee80211_bss_conf *bss_conf)
4420 {
4421 enum rtw89_entity_mode mode = rtw89_get_entity_mode(rtwdev);
4422
4423 if (mode == RTW89_ENTITY_MODE_MCC)
4424 rtw89_queue_chanctx_change(rtwdev, RTW89_CHANCTX_P2P_PS_CHANGE);
4425 else
4426 rtw89_process_p2p_ps(rtwdev, rtwvif_link, bss_conf);
4427 }
4428
rtw89_traffic_stats_init(struct rtw89_dev * rtwdev,struct rtw89_traffic_stats * stats)4429 void rtw89_traffic_stats_init(struct rtw89_dev *rtwdev,
4430 struct rtw89_traffic_stats *stats)
4431 {
4432 stats->tx_unicast = 0;
4433 stats->rx_unicast = 0;
4434 stats->tx_cnt = 0;
4435 stats->rx_cnt = 0;
4436 ewma_tp_init(&stats->tx_ewma_tp);
4437 ewma_tp_init(&stats->rx_ewma_tp);
4438 }
4439
4440 #define RTW89_MLSR_GOTO_2GHZ_THRESHOLD -53
4441 #define RTW89_MLSR_EXIT_2GHZ_THRESHOLD -38
rtw89_core_mlsr_link_decision(struct rtw89_dev * rtwdev,struct rtw89_vif * rtwvif)4442 static void rtw89_core_mlsr_link_decision(struct rtw89_dev *rtwdev,
4443 struct rtw89_vif *rtwvif)
4444 {
4445 unsigned int sel_link_id = IEEE80211_MLD_MAX_NUM_LINKS;
4446 struct ieee80211_vif *vif = rtwvif_to_vif(rtwvif);
4447 struct rtw89_vif_link *rtwvif_link;
4448 const struct rtw89_chan *chan;
4449 unsigned long usable_links;
4450 unsigned int link_id;
4451 u8 decided_bands;
4452 u8 rssi;
4453
4454 rssi = ewma_rssi_read(&rtwdev->phystat.bcn_rssi);
4455 if (unlikely(!rssi))
4456 return;
4457
4458 if (RTW89_RSSI_RAW_TO_DBM(rssi) >= RTW89_MLSR_EXIT_2GHZ_THRESHOLD)
4459 decided_bands = BIT(RTW89_BAND_5G) | BIT(RTW89_BAND_6G);
4460 else if (RTW89_RSSI_RAW_TO_DBM(rssi) <= RTW89_MLSR_GOTO_2GHZ_THRESHOLD)
4461 decided_bands = BIT(RTW89_BAND_2G);
4462 else
4463 return;
4464
4465 usable_links = ieee80211_vif_usable_links(vif);
4466
4467 rtwvif_link = rtw89_get_designated_link(rtwvif);
4468 if (unlikely(!rtwvif_link))
4469 goto select;
4470
4471 chan = rtw89_chan_get(rtwdev, rtwvif_link->chanctx_idx);
4472 if (decided_bands & BIT(chan->band_type))
4473 return;
4474
4475 usable_links &= ~BIT(rtwvif_link->link_id);
4476
4477 select:
4478 rcu_read_lock();
4479
4480 for_each_set_bit(link_id, &usable_links, IEEE80211_MLD_MAX_NUM_LINKS) {
4481 struct ieee80211_bss_conf *link_conf;
4482 struct ieee80211_channel *channel;
4483 enum rtw89_band band;
4484
4485 link_conf = rcu_dereference(vif->link_conf[link_id]);
4486 if (unlikely(!link_conf))
4487 continue;
4488
4489 channel = link_conf->chanreq.oper.chan;
4490 if (unlikely(!channel))
4491 continue;
4492
4493 band = rtw89_nl80211_to_hw_band(channel->band);
4494 if (decided_bands & BIT(band)) {
4495 sel_link_id = link_id;
4496 break;
4497 }
4498 }
4499
4500 rcu_read_unlock();
4501
4502 if (sel_link_id == IEEE80211_MLD_MAX_NUM_LINKS)
4503 return;
4504
4505 rtw89_core_mlsr_switch(rtwdev, rtwvif, sel_link_id);
4506 }
4507
rtw89_core_mlo_track(struct rtw89_dev * rtwdev)4508 static void rtw89_core_mlo_track(struct rtw89_dev *rtwdev)
4509 {
4510 struct rtw89_hal *hal = &rtwdev->hal;
4511 struct ieee80211_vif *vif;
4512 struct rtw89_vif *rtwvif;
4513
4514 if (hal->disabled_dm_bitmap & BIT(RTW89_DM_MLO))
4515 return;
4516
4517 rtw89_for_each_rtwvif(rtwdev, rtwvif) {
4518 vif = rtwvif_to_vif(rtwvif);
4519 if (!vif->cfg.assoc || !ieee80211_vif_is_mld(vif))
4520 continue;
4521
4522 switch (rtwvif->mlo_mode) {
4523 case RTW89_MLO_MODE_MLSR:
4524 rtw89_core_mlsr_link_decision(rtwdev, rtwvif);
4525 break;
4526 default:
4527 break;
4528 }
4529 }
4530 }
4531
rtw89_track_ps_work(struct wiphy * wiphy,struct wiphy_work * work)4532 static void rtw89_track_ps_work(struct wiphy *wiphy, struct wiphy_work *work)
4533 {
4534 struct rtw89_dev *rtwdev = container_of(work, struct rtw89_dev,
4535 track_ps_work.work);
4536 struct rtw89_vif *rtwvif;
4537
4538 lockdep_assert_wiphy(wiphy);
4539
4540 if (test_bit(RTW89_FLAG_FORBIDDEN_TRACK_WORK, rtwdev->flags))
4541 return;
4542
4543 if (!test_bit(RTW89_FLAG_RUNNING, rtwdev->flags))
4544 return;
4545
4546 wiphy_delayed_work_queue(wiphy, &rtwdev->track_ps_work,
4547 RTW89_TRACK_PS_WORK_PERIOD);
4548
4549 rtw89_for_each_rtwvif(rtwdev, rtwvif)
4550 rtw89_traffic_stats_calc(rtwdev, &rtwvif->stats_ps,
4551 RTW89_TFC_INTERVAL_100MS);
4552
4553 if (rtwdev->scanning)
4554 return;
4555
4556 if (rtwdev->lps_enabled && !rtwdev->btc.lps)
4557 rtw89_enter_lps_track(rtwdev);
4558 }
4559
rtw89_track_work(struct wiphy * wiphy,struct wiphy_work * work)4560 static void rtw89_track_work(struct wiphy *wiphy, struct wiphy_work *work)
4561 {
4562 struct rtw89_dev *rtwdev = container_of(work, struct rtw89_dev,
4563 track_work.work);
4564 bool tfc_changed;
4565
4566 lockdep_assert_wiphy(wiphy);
4567
4568 if (test_bit(RTW89_FLAG_FORBIDDEN_TRACK_WORK, rtwdev->flags))
4569 return;
4570
4571 if (!test_bit(RTW89_FLAG_RUNNING, rtwdev->flags))
4572 return;
4573
4574 wiphy_delayed_work_queue(wiphy, &rtwdev->track_work,
4575 RTW89_TRACK_WORK_PERIOD);
4576
4577 tfc_changed = rtw89_traffic_stats_track(rtwdev);
4578 if (rtwdev->scanning)
4579 return;
4580
4581 rtw89_leave_lps(rtwdev);
4582
4583 if (tfc_changed) {
4584 rtw89_hci_recalc_int_mit(rtwdev);
4585 rtw89_btc_ntfy_wl_sta(rtwdev);
4586 }
4587 rtw89_mac_bf_monitor_track(rtwdev);
4588 rtw89_core_bcn_track(rtwdev);
4589 rtw89_phy_stat_track(rtwdev);
4590 rtw89_phy_env_monitor_track(rtwdev);
4591 rtw89_phy_dig(rtwdev);
4592 rtw89_core_rfk_track(rtwdev);
4593 rtw89_phy_ra_update(rtwdev);
4594 rtw89_phy_cfo_track(rtwdev);
4595 rtw89_phy_tx_path_div_track(rtwdev);
4596 rtw89_phy_antdiv_track(rtwdev);
4597 rtw89_phy_ul_tb_ctrl_track(rtwdev);
4598 rtw89_phy_edcca_track(rtwdev);
4599 rtw89_sar_track(rtwdev);
4600 rtw89_chanctx_track(rtwdev);
4601 rtw89_core_rfkill_poll(rtwdev, false);
4602 rtw89_core_mlo_track(rtwdev);
4603
4604 if (rtwdev->lps_enabled && !rtwdev->btc.lps)
4605 rtw89_enter_lps_track(rtwdev);
4606 }
4607
rtw89_core_acquire_bit_map(unsigned long * addr,unsigned long size)4608 u8 rtw89_core_acquire_bit_map(unsigned long *addr, unsigned long size)
4609 {
4610 unsigned long bit;
4611
4612 bit = find_first_zero_bit(addr, size);
4613 if (bit < size)
4614 set_bit(bit, addr);
4615
4616 return bit;
4617 }
4618
rtw89_core_release_bit_map(unsigned long * addr,u8 bit)4619 void rtw89_core_release_bit_map(unsigned long *addr, u8 bit)
4620 {
4621 clear_bit(bit, addr);
4622 }
4623
rtw89_core_release_all_bits_map(unsigned long * addr,unsigned int nbits)4624 void rtw89_core_release_all_bits_map(unsigned long *addr, unsigned int nbits)
4625 {
4626 bitmap_zero(addr, nbits);
4627 }
4628
rtw89_core_acquire_sta_ba_entry(struct rtw89_dev * rtwdev,struct rtw89_sta_link * rtwsta_link,u8 tid,u8 * cam_idx)4629 int rtw89_core_acquire_sta_ba_entry(struct rtw89_dev *rtwdev,
4630 struct rtw89_sta_link *rtwsta_link, u8 tid,
4631 u8 *cam_idx)
4632 {
4633 const struct rtw89_chip_info *chip = rtwdev->chip;
4634 struct rtw89_cam_info *cam_info = &rtwdev->cam_info;
4635 struct rtw89_ba_cam_entry *entry = NULL, *tmp;
4636 u8 idx;
4637 int i;
4638
4639 lockdep_assert_wiphy(rtwdev->hw->wiphy);
4640
4641 idx = rtw89_core_acquire_bit_map(cam_info->ba_cam_map, chip->bacam_num);
4642 if (idx == chip->bacam_num) {
4643 /* allocate a static BA CAM to tid=0/5, so replace the existing
4644 * one if BA CAM is full. Hardware will process the original tid
4645 * automatically.
4646 */
4647 if (tid != 0 && tid != 5)
4648 return -ENOSPC;
4649
4650 for_each_set_bit(i, cam_info->ba_cam_map, chip->bacam_num) {
4651 tmp = &cam_info->ba_cam_entry[i];
4652 if (tmp->tid == 0 || tmp->tid == 5)
4653 continue;
4654
4655 idx = i;
4656 entry = tmp;
4657 list_del(&entry->list);
4658 break;
4659 }
4660
4661 if (!entry)
4662 return -ENOSPC;
4663 } else {
4664 entry = &cam_info->ba_cam_entry[idx];
4665 }
4666
4667 entry->tid = tid;
4668 list_add_tail(&entry->list, &rtwsta_link->ba_cam_list);
4669
4670 *cam_idx = idx;
4671
4672 return 0;
4673 }
4674
rtw89_core_release_sta_ba_entry(struct rtw89_dev * rtwdev,struct rtw89_sta_link * rtwsta_link,u8 tid,u8 * cam_idx)4675 int rtw89_core_release_sta_ba_entry(struct rtw89_dev *rtwdev,
4676 struct rtw89_sta_link *rtwsta_link, u8 tid,
4677 u8 *cam_idx)
4678 {
4679 struct rtw89_cam_info *cam_info = &rtwdev->cam_info;
4680 struct rtw89_ba_cam_entry *entry = NULL, *tmp;
4681 u8 idx;
4682
4683 lockdep_assert_wiphy(rtwdev->hw->wiphy);
4684
4685 list_for_each_entry_safe(entry, tmp, &rtwsta_link->ba_cam_list, list) {
4686 if (entry->tid != tid)
4687 continue;
4688
4689 idx = entry - cam_info->ba_cam_entry;
4690 list_del(&entry->list);
4691
4692 rtw89_core_release_bit_map(cam_info->ba_cam_map, idx);
4693 *cam_idx = idx;
4694 return 0;
4695 }
4696
4697 return -ENOENT;
4698 }
4699
4700 #define RTW89_TYPE_MAPPING(_type) \
4701 case NL80211_IFTYPE_ ## _type: \
4702 rtwvif_link->wifi_role = RTW89_WIFI_ROLE_ ## _type; \
4703 break
rtw89_vif_type_mapping(struct rtw89_vif_link * rtwvif_link,bool assoc)4704 void rtw89_vif_type_mapping(struct rtw89_vif_link *rtwvif_link, bool assoc)
4705 {
4706 const struct ieee80211_vif *vif = rtwvif_link_to_vif(rtwvif_link);
4707 const struct ieee80211_bss_conf *bss_conf;
4708
4709 switch (vif->type) {
4710 case NL80211_IFTYPE_STATION:
4711 if (vif->p2p)
4712 rtwvif_link->wifi_role = RTW89_WIFI_ROLE_P2P_CLIENT;
4713 else
4714 rtwvif_link->wifi_role = RTW89_WIFI_ROLE_STATION;
4715 break;
4716 case NL80211_IFTYPE_AP:
4717 if (vif->p2p)
4718 rtwvif_link->wifi_role = RTW89_WIFI_ROLE_P2P_GO;
4719 else
4720 rtwvif_link->wifi_role = RTW89_WIFI_ROLE_AP;
4721 break;
4722 RTW89_TYPE_MAPPING(ADHOC);
4723 RTW89_TYPE_MAPPING(MONITOR);
4724 RTW89_TYPE_MAPPING(MESH_POINT);
4725 default:
4726 WARN_ON(1);
4727 break;
4728 }
4729
4730 switch (vif->type) {
4731 case NL80211_IFTYPE_AP:
4732 case NL80211_IFTYPE_MESH_POINT:
4733 rtwvif_link->net_type = RTW89_NET_TYPE_AP_MODE;
4734 rtwvif_link->self_role = RTW89_SELF_ROLE_AP;
4735 break;
4736 case NL80211_IFTYPE_ADHOC:
4737 rtwvif_link->net_type = RTW89_NET_TYPE_AD_HOC;
4738 rtwvif_link->self_role = RTW89_SELF_ROLE_CLIENT;
4739 break;
4740 case NL80211_IFTYPE_STATION:
4741 if (assoc) {
4742 rtwvif_link->net_type = RTW89_NET_TYPE_INFRA;
4743
4744 rcu_read_lock();
4745 bss_conf = rtw89_vif_rcu_dereference_link(rtwvif_link, false);
4746 rtwvif_link->trigger = bss_conf->he_support;
4747 rcu_read_unlock();
4748 } else {
4749 rtwvif_link->net_type = RTW89_NET_TYPE_NO_LINK;
4750 rtwvif_link->trigger = false;
4751 }
4752 rtwvif_link->self_role = RTW89_SELF_ROLE_CLIENT;
4753 rtwvif_link->addr_cam.sec_ent_mode = RTW89_ADDR_CAM_SEC_NORMAL;
4754 break;
4755 case NL80211_IFTYPE_MONITOR:
4756 break;
4757 default:
4758 WARN_ON(1);
4759 break;
4760 }
4761 }
4762
rtw89_core_sta_link_add(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link,struct rtw89_sta_link * rtwsta_link)4763 int rtw89_core_sta_link_add(struct rtw89_dev *rtwdev,
4764 struct rtw89_vif_link *rtwvif_link,
4765 struct rtw89_sta_link *rtwsta_link)
4766 {
4767 const struct ieee80211_vif *vif = rtwvif_link_to_vif(rtwvif_link);
4768 const struct ieee80211_sta *sta = rtwsta_link_to_sta(rtwsta_link);
4769 struct rtw89_hal *hal = &rtwdev->hal;
4770 u8 ant_num = hal->ant_diversity ? 2 : rtwdev->chip->rf_path_num;
4771 int i;
4772 int ret;
4773
4774 rtwsta_link->prev_rssi = 0;
4775 INIT_LIST_HEAD(&rtwsta_link->ba_cam_list);
4776 ewma_rssi_init(&rtwsta_link->avg_rssi);
4777 ewma_snr_init(&rtwsta_link->avg_snr);
4778 ewma_evm_init(&rtwsta_link->evm_1ss);
4779 for (i = 0; i < ant_num; i++) {
4780 ewma_rssi_init(&rtwsta_link->rssi[i]);
4781 ewma_evm_init(&rtwsta_link->evm_min[i]);
4782 ewma_evm_init(&rtwsta_link->evm_max[i]);
4783 }
4784
4785 if (vif->type == NL80211_IFTYPE_STATION && !sta->tdls) {
4786 /* must do rtw89_reg_6ghz_recalc() before rfk channel */
4787 ret = rtw89_reg_6ghz_recalc(rtwdev, rtwvif_link, true);
4788 if (ret)
4789 return ret;
4790
4791 rtw89_btc_ntfy_role_info(rtwdev, rtwvif_link, rtwsta_link,
4792 BTC_ROLE_MSTS_STA_CONN_START);
4793 rtw89_chip_rfk_channel(rtwdev, rtwvif_link);
4794
4795 if (vif->p2p) {
4796 rtw89_mac_get_tx_retry_limit(rtwdev, rtwsta_link,
4797 &rtwsta_link->tx_retry);
4798 rtw89_mac_set_tx_retry_limit(rtwdev, rtwsta_link, false, 60);
4799 }
4800 rtw89_phy_dig_suspend(rtwdev);
4801 } else if (vif->type == NL80211_IFTYPE_AP || sta->tdls) {
4802 ret = rtw89_mac_set_macid_pause(rtwdev, rtwsta_link->mac_id, false);
4803 if (ret) {
4804 rtw89_warn(rtwdev, "failed to send h2c macid pause\n");
4805 return ret;
4806 }
4807
4808 ret = rtw89_fw_h2c_role_maintain(rtwdev, rtwvif_link, rtwsta_link,
4809 RTW89_ROLE_CREATE);
4810 if (ret) {
4811 rtw89_warn(rtwdev, "failed to send h2c role info\n");
4812 return ret;
4813 }
4814
4815 ret = rtw89_chip_h2c_default_cmac_tbl(rtwdev, rtwvif_link, rtwsta_link);
4816 if (ret)
4817 return ret;
4818
4819 ret = rtw89_chip_h2c_default_dmac_tbl(rtwdev, rtwvif_link, rtwsta_link);
4820 if (ret)
4821 return ret;
4822 }
4823
4824 return 0;
4825 }
4826
rtw89_core_sta_link_disassoc(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link,struct rtw89_sta_link * rtwsta_link)4827 int rtw89_core_sta_link_disassoc(struct rtw89_dev *rtwdev,
4828 struct rtw89_vif_link *rtwvif_link,
4829 struct rtw89_sta_link *rtwsta_link)
4830 {
4831 const struct ieee80211_vif *vif = rtwvif_link_to_vif(rtwvif_link);
4832
4833 rtw89_assoc_link_clr(rtwsta_link);
4834
4835 if (vif->type == NL80211_IFTYPE_STATION) {
4836 rtw89_fw_h2c_set_bcn_fltr_cfg(rtwdev, rtwvif_link, false);
4837 rtw89_core_bcn_track_reset(rtwdev);
4838 }
4839
4840 if (rtwvif_link->wifi_role == RTW89_WIFI_ROLE_P2P_CLIENT)
4841 rtw89_p2p_noa_once_deinit(rtwvif_link);
4842
4843 return 0;
4844 }
4845
rtw89_core_sta_link_disconnect(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link,struct rtw89_sta_link * rtwsta_link)4846 int rtw89_core_sta_link_disconnect(struct rtw89_dev *rtwdev,
4847 struct rtw89_vif_link *rtwvif_link,
4848 struct rtw89_sta_link *rtwsta_link)
4849 {
4850 const struct ieee80211_vif *vif = rtwvif_link_to_vif(rtwvif_link);
4851 const struct ieee80211_sta *sta = rtwsta_link_to_sta(rtwsta_link);
4852 int ret;
4853
4854 rtw89_mac_bf_monitor_calc(rtwdev, rtwsta_link, true);
4855 rtw89_mac_bf_disassoc(rtwdev, rtwvif_link, rtwsta_link);
4856
4857 if (vif->type == NL80211_IFTYPE_AP || sta->tdls)
4858 rtw89_cam_deinit_addr_cam(rtwdev, &rtwsta_link->addr_cam);
4859 if (sta->tdls)
4860 rtw89_cam_deinit_bssid_cam(rtwdev, &rtwsta_link->bssid_cam);
4861
4862 if (vif->type == NL80211_IFTYPE_STATION && !sta->tdls) {
4863 rtw89_vif_type_mapping(rtwvif_link, false);
4864 rtw89_fw_release_general_pkt_list_vif(rtwdev, rtwvif_link, true);
4865 }
4866
4867 ret = rtw89_chip_h2c_assoc_cmac_tbl(rtwdev, rtwvif_link, rtwsta_link);
4868 if (ret) {
4869 rtw89_warn(rtwdev, "failed to send h2c cmac table\n");
4870 return ret;
4871 }
4872
4873 ret = rtw89_fw_h2c_join_info(rtwdev, rtwvif_link, rtwsta_link, true);
4874 if (ret) {
4875 rtw89_warn(rtwdev, "failed to send h2c join info\n");
4876 return ret;
4877 }
4878
4879 /* update cam aid mac_id net_type */
4880 ret = rtw89_fw_h2c_cam(rtwdev, rtwvif_link, rtwsta_link, NULL,
4881 RTW89_ROLE_CON_DISCONN);
4882 if (ret) {
4883 rtw89_warn(rtwdev, "failed to send h2c cam\n");
4884 return ret;
4885 }
4886
4887 return ret;
4888 }
4889
rtw89_sta_link_can_er(struct rtw89_dev * rtwdev,struct ieee80211_bss_conf * bss_conf,struct ieee80211_link_sta * link_sta)4890 static bool rtw89_sta_link_can_er(struct rtw89_dev *rtwdev,
4891 struct ieee80211_bss_conf *bss_conf,
4892 struct ieee80211_link_sta *link_sta)
4893 {
4894 if (!bss_conf->he_support ||
4895 bss_conf->he_oper.params & IEEE80211_HE_OPERATION_ER_SU_DISABLE)
4896 return false;
4897
4898 if (rtwdev->chip->chip_id == RTL8852C &&
4899 rtw89_sta_link_has_su_mu_4xhe08(link_sta) &&
4900 !rtw89_sta_link_has_er_su_4xhe08(link_sta))
4901 return false;
4902
4903 return true;
4904 }
4905
rtw89_core_sta_link_assoc(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link,struct rtw89_sta_link * rtwsta_link)4906 int rtw89_core_sta_link_assoc(struct rtw89_dev *rtwdev,
4907 struct rtw89_vif_link *rtwvif_link,
4908 struct rtw89_sta_link *rtwsta_link)
4909 {
4910 const struct ieee80211_vif *vif = rtwvif_link_to_vif(rtwvif_link);
4911 const struct ieee80211_sta *sta = rtwsta_link_to_sta(rtwsta_link);
4912 struct rtw89_bssid_cam_entry *bssid_cam = rtw89_get_bssid_cam_of(rtwvif_link,
4913 rtwsta_link);
4914 const struct rtw89_chan *chan = rtw89_chan_get(rtwdev,
4915 rtwvif_link->chanctx_idx);
4916 struct ieee80211_link_sta *link_sta;
4917 int ret;
4918
4919 if (vif->type == NL80211_IFTYPE_AP || sta->tdls) {
4920 if (sta->tdls) {
4921 rcu_read_lock();
4922
4923 link_sta = rtw89_sta_rcu_dereference_link(rtwsta_link, true);
4924 ret = rtw89_cam_init_bssid_cam(rtwdev, rtwvif_link, bssid_cam,
4925 link_sta->addr);
4926 if (ret) {
4927 rtw89_warn(rtwdev, "failed to send h2c init bssid cam for TDLS\n");
4928 rcu_read_unlock();
4929 return ret;
4930 }
4931
4932 rcu_read_unlock();
4933 }
4934
4935 ret = rtw89_cam_init_addr_cam(rtwdev, &rtwsta_link->addr_cam, bssid_cam);
4936 if (ret) {
4937 rtw89_warn(rtwdev, "failed to send h2c init addr cam\n");
4938 return ret;
4939 }
4940 }
4941
4942 ret = rtw89_chip_h2c_assoc_cmac_tbl(rtwdev, rtwvif_link, rtwsta_link);
4943 if (ret) {
4944 rtw89_warn(rtwdev, "failed to send h2c cmac table\n");
4945 return ret;
4946 }
4947
4948 ret = rtw89_fw_h2c_join_info(rtwdev, rtwvif_link, rtwsta_link, false);
4949 if (ret) {
4950 rtw89_warn(rtwdev, "failed to send h2c join info\n");
4951 return ret;
4952 }
4953
4954 /* update cam aid mac_id net_type */
4955 ret = rtw89_fw_h2c_cam(rtwdev, rtwvif_link, rtwsta_link, NULL,
4956 RTW89_ROLE_CON_DISCONN);
4957 if (ret) {
4958 rtw89_warn(rtwdev, "failed to send h2c cam\n");
4959 return ret;
4960 }
4961
4962 rtw89_phy_ra_assoc(rtwdev, rtwsta_link);
4963 rtw89_mac_bf_assoc(rtwdev, rtwvif_link, rtwsta_link);
4964 rtw89_mac_bf_monitor_calc(rtwdev, rtwsta_link, false);
4965
4966 if (vif->type == NL80211_IFTYPE_STATION && !sta->tdls) {
4967 struct ieee80211_bss_conf *bss_conf;
4968
4969 rcu_read_lock();
4970
4971 bss_conf = rtw89_vif_rcu_dereference_link(rtwvif_link, true);
4972 link_sta = rtw89_sta_rcu_dereference_link(rtwsta_link, true);
4973 rtwsta_link->er_cap = rtw89_sta_link_can_er(rtwdev, bss_conf, link_sta);
4974
4975 rcu_read_unlock();
4976
4977 rtw89_btc_ntfy_role_info(rtwdev, rtwvif_link, rtwsta_link,
4978 BTC_ROLE_MSTS_STA_CONN_END);
4979 rtw89_core_get_no_ul_ofdma_htc(rtwdev, &rtwsta_link->htc_template, chan);
4980 rtw89_phy_ul_tb_assoc(rtwdev, rtwvif_link);
4981 rtw89_core_bcn_track_assoc(rtwdev, rtwvif_link);
4982
4983 ret = rtw89_fw_h2c_general_pkt(rtwdev, rtwvif_link, rtwsta_link->mac_id);
4984 if (ret) {
4985 rtw89_warn(rtwdev, "failed to send h2c general packet\n");
4986 return ret;
4987 }
4988
4989 rtw89_fw_h2c_set_bcn_fltr_cfg(rtwdev, rtwvif_link, true);
4990
4991 if (vif->p2p)
4992 rtw89_mac_set_tx_retry_limit(rtwdev, rtwsta_link, false,
4993 rtwsta_link->tx_retry);
4994 rtw89_phy_dig_resume(rtwdev, false);
4995 }
4996
4997 rtw89_assoc_link_set(rtwsta_link);
4998 return ret;
4999 }
5000
rtw89_core_sta_link_remove(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link,struct rtw89_sta_link * rtwsta_link)5001 int rtw89_core_sta_link_remove(struct rtw89_dev *rtwdev,
5002 struct rtw89_vif_link *rtwvif_link,
5003 struct rtw89_sta_link *rtwsta_link)
5004 {
5005 const struct ieee80211_vif *vif = rtwvif_link_to_vif(rtwvif_link);
5006 const struct ieee80211_sta *sta = rtwsta_link_to_sta(rtwsta_link);
5007 int ret;
5008
5009 if (vif->type == NL80211_IFTYPE_STATION && !sta->tdls) {
5010 rtw89_reg_6ghz_recalc(rtwdev, rtwvif_link, false);
5011 rtw89_btc_ntfy_role_info(rtwdev, rtwvif_link, rtwsta_link,
5012 BTC_ROLE_MSTS_STA_DIS_CONN);
5013
5014 if (vif->p2p)
5015 rtw89_mac_set_tx_retry_limit(rtwdev, rtwsta_link, false,
5016 rtwsta_link->tx_retry);
5017 } else if (vif->type == NL80211_IFTYPE_AP || sta->tdls) {
5018 ret = rtw89_fw_h2c_role_maintain(rtwdev, rtwvif_link, rtwsta_link,
5019 RTW89_ROLE_REMOVE);
5020 if (ret) {
5021 rtw89_warn(rtwdev, "failed to send h2c role info\n");
5022 return ret;
5023 }
5024 }
5025
5026 return 0;
5027 }
5028
_rtw89_core_set_tid_config(struct rtw89_dev * rtwdev,struct ieee80211_sta * sta,struct cfg80211_tid_cfg * tid_conf)5029 static void _rtw89_core_set_tid_config(struct rtw89_dev *rtwdev,
5030 struct ieee80211_sta *sta,
5031 struct cfg80211_tid_cfg *tid_conf)
5032 {
5033 struct ieee80211_txq *txq;
5034 struct rtw89_txq *rtwtxq;
5035 u32 mask = tid_conf->mask;
5036 u8 tids = tid_conf->tids;
5037 int tids_nbit = BITS_PER_BYTE;
5038 int i;
5039
5040 for (i = 0; i < tids_nbit; i++, tids >>= 1) {
5041 if (!tids)
5042 break;
5043
5044 if (!(tids & BIT(0)))
5045 continue;
5046
5047 txq = sta->txq[i];
5048 rtwtxq = (struct rtw89_txq *)txq->drv_priv;
5049
5050 if (mask & BIT(NL80211_TID_CONFIG_ATTR_AMPDU_CTRL)) {
5051 if (tid_conf->ampdu == NL80211_TID_CONFIG_ENABLE) {
5052 clear_bit(RTW89_TXQ_F_FORBID_BA, &rtwtxq->flags);
5053 } else {
5054 if (test_bit(RTW89_TXQ_F_AMPDU, &rtwtxq->flags))
5055 ieee80211_stop_tx_ba_session(sta, txq->tid);
5056 spin_lock_bh(&rtwdev->ba_lock);
5057 list_del_init(&rtwtxq->list);
5058 set_bit(RTW89_TXQ_F_FORBID_BA, &rtwtxq->flags);
5059 spin_unlock_bh(&rtwdev->ba_lock);
5060 }
5061 }
5062
5063 if (mask & BIT(NL80211_TID_CONFIG_ATTR_AMSDU_CTRL) && tids == 0xff) {
5064 if (tid_conf->amsdu == NL80211_TID_CONFIG_ENABLE)
5065 sta->max_amsdu_subframes = 0;
5066 else
5067 sta->max_amsdu_subframes = 1;
5068 }
5069 }
5070 }
5071
rtw89_core_set_tid_config(struct rtw89_dev * rtwdev,struct ieee80211_sta * sta,struct cfg80211_tid_config * tid_config)5072 void rtw89_core_set_tid_config(struct rtw89_dev *rtwdev,
5073 struct ieee80211_sta *sta,
5074 struct cfg80211_tid_config *tid_config)
5075 {
5076 int i;
5077
5078 for (i = 0; i < tid_config->n_tid_conf; i++)
5079 _rtw89_core_set_tid_config(rtwdev, sta,
5080 &tid_config->tid_conf[i]);
5081 }
5082
rtw89_init_ht_cap(struct rtw89_dev * rtwdev,struct ieee80211_sta_ht_cap * ht_cap)5083 static void rtw89_init_ht_cap(struct rtw89_dev *rtwdev,
5084 struct ieee80211_sta_ht_cap *ht_cap)
5085 {
5086 static const __le16 highest[RF_PATH_MAX] = {
5087 cpu_to_le16(150), cpu_to_le16(300), cpu_to_le16(450), cpu_to_le16(600),
5088 };
5089 struct rtw89_hal *hal = &rtwdev->hal;
5090 u8 nss = hal->rx_nss;
5091 int i;
5092
5093 ht_cap->ht_supported = true;
5094 ht_cap->cap = 0;
5095 ht_cap->cap |= IEEE80211_HT_CAP_SGI_20 |
5096 IEEE80211_HT_CAP_MAX_AMSDU |
5097 IEEE80211_HT_CAP_TX_STBC |
5098 (1 << IEEE80211_HT_CAP_RX_STBC_SHIFT);
5099 ht_cap->cap |= IEEE80211_HT_CAP_LDPC_CODING;
5100 ht_cap->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
5101 IEEE80211_HT_CAP_DSSSCCK40 |
5102 IEEE80211_HT_CAP_SGI_40;
5103 ht_cap->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
5104 ht_cap->ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE;
5105 ht_cap->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
5106 for (i = 0; i < nss; i++)
5107 ht_cap->mcs.rx_mask[i] = 0xFF;
5108 ht_cap->mcs.rx_mask[4] = 0x01;
5109 ht_cap->mcs.rx_highest = highest[nss - 1];
5110 }
5111
rtw89_init_vht_cap(struct rtw89_dev * rtwdev,struct ieee80211_sta_vht_cap * vht_cap)5112 static void rtw89_init_vht_cap(struct rtw89_dev *rtwdev,
5113 struct ieee80211_sta_vht_cap *vht_cap)
5114 {
5115 static const __le16 highest_bw80[RF_PATH_MAX] = {
5116 cpu_to_le16(433), cpu_to_le16(867), cpu_to_le16(1300), cpu_to_le16(1733),
5117 };
5118 static const __le16 highest_bw160[RF_PATH_MAX] = {
5119 cpu_to_le16(867), cpu_to_le16(1733), cpu_to_le16(2600), cpu_to_le16(3467),
5120 };
5121 const struct rtw89_chip_info *chip = rtwdev->chip;
5122 const __le16 *highest = chip->support_bandwidths & BIT(NL80211_CHAN_WIDTH_160) ?
5123 highest_bw160 : highest_bw80;
5124 struct rtw89_hal *hal = &rtwdev->hal;
5125 u16 tx_mcs_map = 0, rx_mcs_map = 0;
5126 u8 sts_cap = 3;
5127 int i;
5128
5129 for (i = 0; i < 8; i++) {
5130 if (i < hal->tx_nss)
5131 tx_mcs_map |= IEEE80211_VHT_MCS_SUPPORT_0_9 << (i * 2);
5132 else
5133 tx_mcs_map |= IEEE80211_VHT_MCS_NOT_SUPPORTED << (i * 2);
5134 if (i < hal->rx_nss)
5135 rx_mcs_map |= IEEE80211_VHT_MCS_SUPPORT_0_9 << (i * 2);
5136 else
5137 rx_mcs_map |= IEEE80211_VHT_MCS_NOT_SUPPORTED << (i * 2);
5138 }
5139
5140 vht_cap->vht_supported = true;
5141 vht_cap->cap = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454 |
5142 IEEE80211_VHT_CAP_SHORT_GI_80 |
5143 IEEE80211_VHT_CAP_RXSTBC_1 |
5144 IEEE80211_VHT_CAP_HTC_VHT |
5145 IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK |
5146 0;
5147 vht_cap->cap |= IEEE80211_VHT_CAP_TXSTBC;
5148 vht_cap->cap |= IEEE80211_VHT_CAP_RXLDPC;
5149 vht_cap->cap |= IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE |
5150 IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE;
5151 vht_cap->cap |= sts_cap << IEEE80211_VHT_CAP_BEAMFORMEE_STS_SHIFT;
5152 if (chip->support_bandwidths & BIT(NL80211_CHAN_WIDTH_160))
5153 vht_cap->cap |= IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160MHZ |
5154 IEEE80211_VHT_CAP_SHORT_GI_160;
5155 vht_cap->vht_mcs.rx_mcs_map = cpu_to_le16(rx_mcs_map);
5156 vht_cap->vht_mcs.tx_mcs_map = cpu_to_le16(tx_mcs_map);
5157 vht_cap->vht_mcs.rx_highest = highest[hal->rx_nss - 1];
5158 vht_cap->vht_mcs.tx_highest = highest[hal->tx_nss - 1];
5159
5160 if (ieee80211_hw_check(rtwdev->hw, SUPPORTS_VHT_EXT_NSS_BW))
5161 vht_cap->vht_mcs.tx_highest |=
5162 cpu_to_le16(IEEE80211_VHT_EXT_NSS_BW_CAPABLE);
5163 }
5164
rtw89_init_he_cap(struct rtw89_dev * rtwdev,enum nl80211_band band,enum nl80211_iftype iftype,struct ieee80211_sband_iftype_data * iftype_data)5165 static void rtw89_init_he_cap(struct rtw89_dev *rtwdev,
5166 enum nl80211_band band,
5167 enum nl80211_iftype iftype,
5168 struct ieee80211_sband_iftype_data *iftype_data)
5169 {
5170 const struct rtw89_chip_info *chip = rtwdev->chip;
5171 struct rtw89_hal *hal = &rtwdev->hal;
5172 bool no_ng16 = (chip->chip_id == RTL8852A && hal->cv == CHIP_CBV) ||
5173 (chip->chip_id == RTL8852B && hal->cv == CHIP_CAV);
5174 struct ieee80211_sta_he_cap *he_cap;
5175 int nss = hal->rx_nss;
5176 u8 *mac_cap_info;
5177 u8 *phy_cap_info;
5178 u16 mcs_map = 0;
5179 int i;
5180
5181 for (i = 0; i < 8; i++) {
5182 if (i < nss)
5183 mcs_map |= IEEE80211_HE_MCS_SUPPORT_0_11 << (i * 2);
5184 else
5185 mcs_map |= IEEE80211_HE_MCS_NOT_SUPPORTED << (i * 2);
5186 }
5187
5188 he_cap = &iftype_data->he_cap;
5189 mac_cap_info = he_cap->he_cap_elem.mac_cap_info;
5190 phy_cap_info = he_cap->he_cap_elem.phy_cap_info;
5191
5192 he_cap->has_he = true;
5193 mac_cap_info[0] = IEEE80211_HE_MAC_CAP0_HTC_HE;
5194 if (iftype == NL80211_IFTYPE_STATION)
5195 mac_cap_info[1] = IEEE80211_HE_MAC_CAP1_TF_MAC_PAD_DUR_16US;
5196 mac_cap_info[2] = IEEE80211_HE_MAC_CAP2_ALL_ACK |
5197 IEEE80211_HE_MAC_CAP2_BSR;
5198 mac_cap_info[3] = IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_2;
5199 if (iftype == NL80211_IFTYPE_AP)
5200 mac_cap_info[3] |= IEEE80211_HE_MAC_CAP3_OMI_CONTROL;
5201 mac_cap_info[4] = IEEE80211_HE_MAC_CAP4_OPS |
5202 IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU;
5203 if (iftype == NL80211_IFTYPE_STATION)
5204 mac_cap_info[5] = IEEE80211_HE_MAC_CAP5_HT_VHT_TRIG_FRAME_RX;
5205 if (band == NL80211_BAND_2GHZ) {
5206 phy_cap_info[0] =
5207 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_IN_2G;
5208 } else {
5209 phy_cap_info[0] =
5210 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_80MHZ_IN_5G;
5211 if (chip->support_bandwidths & BIT(NL80211_CHAN_WIDTH_160))
5212 phy_cap_info[0] |= IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G;
5213 }
5214 phy_cap_info[1] = IEEE80211_HE_PHY_CAP1_DEVICE_CLASS_A |
5215 IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD |
5216 IEEE80211_HE_PHY_CAP1_HE_LTF_AND_GI_FOR_HE_PPDUS_0_8US;
5217 phy_cap_info[2] = IEEE80211_HE_PHY_CAP2_NDP_4x_LTF_AND_3_2US |
5218 IEEE80211_HE_PHY_CAP2_STBC_TX_UNDER_80MHZ |
5219 IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ |
5220 IEEE80211_HE_PHY_CAP2_DOPPLER_TX;
5221 phy_cap_info[3] = IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_16_QAM;
5222 if (iftype == NL80211_IFTYPE_STATION)
5223 phy_cap_info[3] |= IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_TX_16_QAM |
5224 IEEE80211_HE_PHY_CAP3_DCM_MAX_TX_NSS_2;
5225 if (iftype == NL80211_IFTYPE_AP)
5226 phy_cap_info[3] |= IEEE80211_HE_PHY_CAP3_RX_PARTIAL_BW_SU_IN_20MHZ_MU;
5227 phy_cap_info[4] = IEEE80211_HE_PHY_CAP4_SU_BEAMFORMEE |
5228 IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_UNDER_80MHZ_4;
5229 if (chip->support_bandwidths & BIT(NL80211_CHAN_WIDTH_160))
5230 phy_cap_info[4] |= IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_ABOVE_80MHZ_4;
5231 phy_cap_info[5] = no_ng16 ? 0 :
5232 IEEE80211_HE_PHY_CAP5_NG16_SU_FEEDBACK |
5233 IEEE80211_HE_PHY_CAP5_NG16_MU_FEEDBACK;
5234 phy_cap_info[6] = IEEE80211_HE_PHY_CAP6_CODEBOOK_SIZE_42_SU |
5235 IEEE80211_HE_PHY_CAP6_CODEBOOK_SIZE_75_MU |
5236 IEEE80211_HE_PHY_CAP6_TRIG_SU_BEAMFORMING_FB |
5237 IEEE80211_HE_PHY_CAP6_PARTIAL_BW_EXT_RANGE;
5238 phy_cap_info[7] = IEEE80211_HE_PHY_CAP7_POWER_BOOST_FACTOR_SUPP |
5239 IEEE80211_HE_PHY_CAP7_HE_SU_MU_PPDU_4XLTF_AND_08_US_GI |
5240 IEEE80211_HE_PHY_CAP7_MAX_NC_1;
5241 phy_cap_info[8] = IEEE80211_HE_PHY_CAP8_HE_ER_SU_PPDU_4XLTF_AND_08_US_GI |
5242 IEEE80211_HE_PHY_CAP8_HE_ER_SU_1XLTF_AND_08_US_GI |
5243 IEEE80211_HE_PHY_CAP8_DCM_MAX_RU_996;
5244 if (chip->support_bandwidths & BIT(NL80211_CHAN_WIDTH_160))
5245 phy_cap_info[8] |= IEEE80211_HE_PHY_CAP8_20MHZ_IN_160MHZ_HE_PPDU |
5246 IEEE80211_HE_PHY_CAP8_80MHZ_IN_160MHZ_HE_PPDU;
5247 phy_cap_info[9] = IEEE80211_HE_PHY_CAP9_LONGER_THAN_16_SIGB_OFDM_SYM |
5248 IEEE80211_HE_PHY_CAP9_RX_1024_QAM_LESS_THAN_242_TONE_RU |
5249 IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_COMP_SIGB |
5250 IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_NON_COMP_SIGB |
5251 u8_encode_bits(IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_16US,
5252 IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_MASK);
5253 if (iftype == NL80211_IFTYPE_STATION)
5254 phy_cap_info[9] |= IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU;
5255 he_cap->he_mcs_nss_supp.rx_mcs_80 = cpu_to_le16(mcs_map);
5256 he_cap->he_mcs_nss_supp.tx_mcs_80 = cpu_to_le16(mcs_map);
5257 if (chip->support_bandwidths & BIT(NL80211_CHAN_WIDTH_160)) {
5258 he_cap->he_mcs_nss_supp.rx_mcs_160 = cpu_to_le16(mcs_map);
5259 he_cap->he_mcs_nss_supp.tx_mcs_160 = cpu_to_le16(mcs_map);
5260 }
5261
5262 if (band == NL80211_BAND_6GHZ) {
5263 __le16 capa;
5264
5265 capa = le16_encode_bits(IEEE80211_HT_MPDU_DENSITY_NONE,
5266 IEEE80211_HE_6GHZ_CAP_MIN_MPDU_START) |
5267 le16_encode_bits(IEEE80211_VHT_MAX_AMPDU_1024K,
5268 IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP) |
5269 le16_encode_bits(IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454,
5270 IEEE80211_HE_6GHZ_CAP_MAX_MPDU_LEN);
5271 iftype_data->he_6ghz_capa.capa = capa;
5272 }
5273 }
5274
rtw89_init_eht_cap(struct rtw89_dev * rtwdev,enum nl80211_band band,enum nl80211_iftype iftype,struct ieee80211_sband_iftype_data * iftype_data)5275 static void rtw89_init_eht_cap(struct rtw89_dev *rtwdev,
5276 enum nl80211_band band,
5277 enum nl80211_iftype iftype,
5278 struct ieee80211_sband_iftype_data *iftype_data)
5279 {
5280 const struct rtw89_chip_info *chip = rtwdev->chip;
5281 struct ieee80211_eht_cap_elem_fixed *eht_cap_elem;
5282 struct ieee80211_eht_mcs_nss_supp *eht_nss;
5283 struct ieee80211_sta_eht_cap *eht_cap;
5284 struct rtw89_hal *hal = &rtwdev->hal;
5285 bool support_mcs_12_13 = true;
5286 bool support_320mhz = false;
5287 u8 val, val_mcs13;
5288 int sts = 8;
5289
5290 if (chip->chip_gen == RTW89_CHIP_AX)
5291 return;
5292
5293 if (hal->no_mcs_12_13)
5294 support_mcs_12_13 = false;
5295
5296 if (band == NL80211_BAND_6GHZ &&
5297 chip->support_bandwidths & BIT(NL80211_CHAN_WIDTH_320))
5298 support_320mhz = true;
5299
5300 eht_cap = &iftype_data->eht_cap;
5301 eht_cap_elem = &eht_cap->eht_cap_elem;
5302 eht_nss = &eht_cap->eht_mcs_nss_supp;
5303
5304 eht_cap->has_eht = true;
5305
5306 eht_cap_elem->mac_cap_info[0] =
5307 u8_encode_bits(IEEE80211_EHT_MAC_CAP0_MAX_MPDU_LEN_7991,
5308 IEEE80211_EHT_MAC_CAP0_MAX_MPDU_LEN_MASK);
5309 eht_cap_elem->mac_cap_info[1] = 0;
5310
5311 eht_cap_elem->phy_cap_info[0] =
5312 IEEE80211_EHT_PHY_CAP0_NDP_4_EHT_LFT_32_GI |
5313 IEEE80211_EHT_PHY_CAP0_SU_BEAMFORMEE;
5314 if (support_320mhz)
5315 eht_cap_elem->phy_cap_info[0] |=
5316 IEEE80211_EHT_PHY_CAP0_320MHZ_IN_6GHZ;
5317
5318 eht_cap_elem->phy_cap_info[0] |=
5319 u8_encode_bits(u8_get_bits(sts - 1, BIT(0)),
5320 IEEE80211_EHT_PHY_CAP0_BEAMFORMEE_SS_80MHZ_MASK);
5321 eht_cap_elem->phy_cap_info[1] =
5322 u8_encode_bits(u8_get_bits(sts - 1, GENMASK(2, 1)),
5323 IEEE80211_EHT_PHY_CAP1_BEAMFORMEE_SS_80MHZ_MASK) |
5324 u8_encode_bits(sts - 1,
5325 IEEE80211_EHT_PHY_CAP1_BEAMFORMEE_SS_160MHZ_MASK);
5326 if (support_320mhz)
5327 eht_cap_elem->phy_cap_info[1] |=
5328 u8_encode_bits(sts - 1,
5329 IEEE80211_EHT_PHY_CAP1_BEAMFORMEE_SS_320MHZ_MASK);
5330
5331 eht_cap_elem->phy_cap_info[2] = 0;
5332
5333 eht_cap_elem->phy_cap_info[3] =
5334 IEEE80211_EHT_PHY_CAP3_CODEBOOK_4_2_SU_FDBK |
5335 IEEE80211_EHT_PHY_CAP3_CODEBOOK_7_5_MU_FDBK |
5336 IEEE80211_EHT_PHY_CAP3_TRIG_SU_BF_FDBK |
5337 IEEE80211_EHT_PHY_CAP3_TRIG_MU_BF_PART_BW_FDBK;
5338
5339 eht_cap_elem->phy_cap_info[4] =
5340 IEEE80211_EHT_PHY_CAP4_POWER_BOOST_FACT_SUPP |
5341 u8_encode_bits(1, IEEE80211_EHT_PHY_CAP4_MAX_NC_MASK);
5342
5343 eht_cap_elem->phy_cap_info[5] =
5344 u8_encode_bits(IEEE80211_EHT_PHY_CAP5_COMMON_NOMINAL_PKT_PAD_20US,
5345 IEEE80211_EHT_PHY_CAP5_COMMON_NOMINAL_PKT_PAD_MASK);
5346
5347 eht_cap_elem->phy_cap_info[6] = 0;
5348 eht_cap_elem->phy_cap_info[7] = 0;
5349 eht_cap_elem->phy_cap_info[8] = 0;
5350
5351 val = u8_encode_bits(hal->rx_nss, IEEE80211_EHT_MCS_NSS_RX) |
5352 u8_encode_bits(hal->tx_nss, IEEE80211_EHT_MCS_NSS_TX);
5353 val_mcs13 = support_mcs_12_13 ? val : 0;
5354
5355 eht_nss->bw._80.rx_tx_mcs9_max_nss = val;
5356 eht_nss->bw._80.rx_tx_mcs11_max_nss = val;
5357 eht_nss->bw._80.rx_tx_mcs13_max_nss = val_mcs13;
5358 eht_nss->bw._160.rx_tx_mcs9_max_nss = val;
5359 eht_nss->bw._160.rx_tx_mcs11_max_nss = val;
5360 eht_nss->bw._160.rx_tx_mcs13_max_nss = val_mcs13;
5361 if (support_320mhz) {
5362 eht_nss->bw._320.rx_tx_mcs9_max_nss = val;
5363 eht_nss->bw._320.rx_tx_mcs11_max_nss = val;
5364 eht_nss->bw._320.rx_tx_mcs13_max_nss = val_mcs13;
5365 }
5366 }
5367
5368 #define RTW89_SBAND_IFTYPES_NR 2
5369
rtw89_init_he_eht_cap(struct rtw89_dev * rtwdev,enum nl80211_band band,struct ieee80211_supported_band * sband)5370 static int rtw89_init_he_eht_cap(struct rtw89_dev *rtwdev,
5371 enum nl80211_band band,
5372 struct ieee80211_supported_band *sband)
5373 {
5374 struct ieee80211_sband_iftype_data *iftype_data;
5375 enum nl80211_iftype iftype;
5376 int idx = 0;
5377
5378 iftype_data = devm_kcalloc(rtwdev->dev, RTW89_SBAND_IFTYPES_NR,
5379 sizeof(*iftype_data), GFP_KERNEL);
5380 if (!iftype_data)
5381 return -ENOMEM;
5382
5383 for (iftype = 0; iftype < NUM_NL80211_IFTYPES; iftype++) {
5384 switch (iftype) {
5385 case NL80211_IFTYPE_STATION:
5386 case NL80211_IFTYPE_AP:
5387 break;
5388 default:
5389 continue;
5390 }
5391
5392 if (idx >= RTW89_SBAND_IFTYPES_NR) {
5393 rtw89_warn(rtwdev, "run out of iftype_data\n");
5394 break;
5395 }
5396
5397 iftype_data[idx].types_mask = BIT(iftype);
5398
5399 rtw89_init_he_cap(rtwdev, band, iftype, &iftype_data[idx]);
5400 rtw89_init_eht_cap(rtwdev, band, iftype, &iftype_data[idx]);
5401
5402 idx++;
5403 }
5404
5405 _ieee80211_set_sband_iftype_data(sband, iftype_data, idx);
5406 return 0;
5407 }
5408
5409 static struct ieee80211_supported_band *
rtw89_core_sband_dup(struct rtw89_dev * rtwdev,const struct ieee80211_supported_band * sband)5410 rtw89_core_sband_dup(struct rtw89_dev *rtwdev,
5411 const struct ieee80211_supported_band *sband)
5412 {
5413 struct ieee80211_supported_band *dup;
5414
5415 dup = devm_kmemdup(rtwdev->dev, sband, sizeof(*sband), GFP_KERNEL);
5416 if (!dup)
5417 return NULL;
5418
5419 dup->channels = devm_kmemdup(rtwdev->dev, sband->channels,
5420 sizeof(*sband->channels) * sband->n_channels,
5421 GFP_KERNEL);
5422 if (!dup->channels)
5423 return NULL;
5424
5425 dup->bitrates = devm_kmemdup(rtwdev->dev, sband->bitrates,
5426 sizeof(*sband->bitrates) * sband->n_bitrates,
5427 GFP_KERNEL);
5428 if (!dup->bitrates)
5429 return NULL;
5430
5431 return dup;
5432 }
5433
rtw89_core_set_supported_band(struct rtw89_dev * rtwdev)5434 static int rtw89_core_set_supported_band(struct rtw89_dev *rtwdev)
5435 {
5436 struct ieee80211_hw *hw = rtwdev->hw;
5437 struct ieee80211_supported_band *sband;
5438 u8 support_bands = rtwdev->chip->support_bands;
5439 int ret;
5440
5441 if (support_bands & BIT(NL80211_BAND_2GHZ)) {
5442 sband = rtw89_core_sband_dup(rtwdev, &rtw89_sband_2ghz);
5443 if (!sband)
5444 return -ENOMEM;
5445 #if defined(__FreeBSD__)
5446 if (rtw_ht_support)
5447 #endif
5448 rtw89_init_ht_cap(rtwdev, &sband->ht_cap);
5449 #if defined(__FreeBSD__)
5450 if (rtw_eht_support) {
5451 #endif
5452 ret = rtw89_init_he_eht_cap(rtwdev, NL80211_BAND_2GHZ, sband);
5453 if (ret)
5454 return ret;
5455 #if defined(__FreeBSD__)
5456 }
5457 #endif
5458 hw->wiphy->bands[NL80211_BAND_2GHZ] = sband;
5459 }
5460
5461 if (support_bands & BIT(NL80211_BAND_5GHZ)) {
5462 sband = rtw89_core_sband_dup(rtwdev, &rtw89_sband_5ghz);
5463 if (!sband)
5464 return -ENOMEM;
5465 #if defined(__FreeBSD__)
5466 if (rtw_ht_support)
5467 #endif
5468 rtw89_init_ht_cap(rtwdev, &sband->ht_cap);
5469 #if defined(__FreeBSD__)
5470 if (rtw_vht_support)
5471 #endif
5472 rtw89_init_vht_cap(rtwdev, &sband->vht_cap);
5473 #if defined(__FreeBSD__)
5474 if (rtw_eht_support) {
5475 #endif
5476 ret = rtw89_init_he_eht_cap(rtwdev, NL80211_BAND_5GHZ, sband);
5477 if (ret)
5478 return ret;
5479 #if defined(__FreeBSD__)
5480 }
5481 #endif
5482 hw->wiphy->bands[NL80211_BAND_5GHZ] = sband;
5483 }
5484
5485 #if defined(__FreeBSD__)
5486 if (rtw_eht_support)
5487 #endif
5488 if (support_bands & BIT(NL80211_BAND_6GHZ)) {
5489 sband = rtw89_core_sband_dup(rtwdev, &rtw89_sband_6ghz);
5490 if (!sband)
5491 return -ENOMEM;
5492 ret = rtw89_init_he_eht_cap(rtwdev, NL80211_BAND_6GHZ, sband);
5493 if (ret)
5494 return ret;
5495 hw->wiphy->bands[NL80211_BAND_6GHZ] = sband;
5496 }
5497
5498 return 0;
5499 }
5500
rtw89_core_ppdu_sts_init(struct rtw89_dev * rtwdev)5501 static void rtw89_core_ppdu_sts_init(struct rtw89_dev *rtwdev)
5502 {
5503 int i;
5504
5505 for (i = 0; i < RTW89_PHY_NUM; i++)
5506 skb_queue_head_init(&rtwdev->ppdu_sts.rx_queue[i]);
5507 for (i = 0; i < RTW89_PHY_NUM; i++)
5508 rtwdev->ppdu_sts.curr_rx_ppdu_cnt[i] = U8_MAX;
5509 }
5510
rtw89_core_update_beacon_work(struct wiphy * wiphy,struct wiphy_work * work)5511 void rtw89_core_update_beacon_work(struct wiphy *wiphy, struct wiphy_work *work)
5512 {
5513 struct rtw89_dev *rtwdev;
5514 struct rtw89_vif_link *rtwvif_link = container_of(work, struct rtw89_vif_link,
5515 update_beacon_work);
5516
5517 lockdep_assert_wiphy(wiphy);
5518
5519 if (rtwvif_link->net_type != RTW89_NET_TYPE_AP_MODE)
5520 return;
5521
5522 rtwdev = rtwvif_link->rtwvif->rtwdev;
5523
5524 rtw89_chip_h2c_update_beacon(rtwdev, rtwvif_link);
5525 }
5526
rtw89_core_csa_beacon_work(struct wiphy * wiphy,struct wiphy_work * work)5527 void rtw89_core_csa_beacon_work(struct wiphy *wiphy, struct wiphy_work *work)
5528 {
5529 struct rtw89_vif_link *rtwvif_link =
5530 container_of(work, struct rtw89_vif_link, csa_beacon_work.work);
5531 struct rtw89_vif *rtwvif = rtwvif_link->rtwvif;
5532 struct ieee80211_vif *vif = rtwvif_to_vif(rtwvif);
5533 struct rtw89_dev *rtwdev = rtwvif->rtwdev;
5534 struct ieee80211_bss_conf *bss_conf;
5535 unsigned int delay;
5536
5537 lockdep_assert_wiphy(wiphy);
5538
5539 if (rtwvif_link->net_type != RTW89_NET_TYPE_AP_MODE)
5540 return;
5541
5542 rcu_read_lock();
5543
5544 bss_conf = rtw89_vif_rcu_dereference_link(rtwvif_link, true);
5545 if (!bss_conf->csa_active) {
5546 rcu_read_unlock();
5547 return;
5548 }
5549
5550 delay = ieee80211_tu_to_usec(bss_conf->beacon_int);
5551
5552 rcu_read_unlock();
5553
5554 if (!ieee80211_beacon_cntdwn_is_complete(vif, rtwvif_link->link_id)) {
5555 rtw89_chip_h2c_update_beacon(rtwdev, rtwvif_link);
5556
5557 wiphy_delayed_work_queue(wiphy, &rtwvif_link->csa_beacon_work,
5558 usecs_to_jiffies(delay));
5559 } else {
5560 ieee80211_csa_finish(vif, rtwvif_link->link_id);
5561 }
5562 }
5563
5564 struct rtw89_wait_response *
rtw89_wait_for_cond_prep(struct rtw89_wait_info * wait,unsigned int cond)5565 rtw89_wait_for_cond_prep(struct rtw89_wait_info *wait, unsigned int cond)
5566 {
5567 struct rtw89_wait_response *prep;
5568 unsigned int cur;
5569
5570 /* use -EPERM _iff_ telling eval side not to make any changes */
5571
5572 cur = atomic_cmpxchg(&wait->cond, RTW89_WAIT_COND_IDLE, cond);
5573 if (cur != RTW89_WAIT_COND_IDLE)
5574 return ERR_PTR(-EPERM);
5575
5576 prep = kzalloc(sizeof(*prep), GFP_KERNEL);
5577 if (!prep)
5578 return ERR_PTR(-ENOMEM);
5579
5580 init_completion(&prep->completion);
5581
5582 rcu_assign_pointer(wait->resp, prep);
5583
5584 return prep;
5585 }
5586
rtw89_wait_for_cond_eval(struct rtw89_wait_info * wait,struct rtw89_wait_response * prep,int err)5587 int rtw89_wait_for_cond_eval(struct rtw89_wait_info *wait,
5588 struct rtw89_wait_response *prep, int err)
5589 {
5590 unsigned long time_left;
5591
5592 if (IS_ERR(prep)) {
5593 err = err ?: PTR_ERR(prep);
5594
5595 /* special error case: no permission to reset anything */
5596 if (PTR_ERR(prep) == -EPERM)
5597 return err;
5598
5599 goto reset;
5600 }
5601
5602 if (err)
5603 goto cleanup;
5604
5605 time_left = wait_for_completion_timeout(&prep->completion,
5606 RTW89_WAIT_FOR_COND_TIMEOUT);
5607 if (time_left == 0) {
5608 err = -ETIMEDOUT;
5609 goto cleanup;
5610 }
5611
5612 wait->data = prep->data;
5613
5614 cleanup:
5615 rcu_assign_pointer(wait->resp, NULL);
5616 kfree_rcu(prep, rcu_head);
5617
5618 reset:
5619 atomic_set(&wait->cond, RTW89_WAIT_COND_IDLE);
5620
5621 if (err)
5622 return err;
5623
5624 if (wait->data.err)
5625 return -EFAULT;
5626
5627 return 0;
5628 }
5629
rtw89_complete_cond_resp(struct rtw89_wait_response * resp,const struct rtw89_completion_data * data)5630 static void rtw89_complete_cond_resp(struct rtw89_wait_response *resp,
5631 const struct rtw89_completion_data *data)
5632 {
5633 resp->data = *data;
5634 complete(&resp->completion);
5635 }
5636
rtw89_complete_cond(struct rtw89_wait_info * wait,unsigned int cond,const struct rtw89_completion_data * data)5637 void rtw89_complete_cond(struct rtw89_wait_info *wait, unsigned int cond,
5638 const struct rtw89_completion_data *data)
5639 {
5640 struct rtw89_wait_response *resp;
5641 unsigned int cur;
5642
5643 guard(rcu)();
5644
5645 resp = rcu_dereference(wait->resp);
5646 if (!resp)
5647 return;
5648
5649 cur = atomic_cmpxchg(&wait->cond, cond, RTW89_WAIT_COND_IDLE);
5650 if (cur != cond)
5651 return;
5652
5653 rtw89_complete_cond_resp(resp, data);
5654 }
5655
rtw89_core_ntfy_btc_event(struct rtw89_dev * rtwdev,enum rtw89_btc_hmsg event)5656 void rtw89_core_ntfy_btc_event(struct rtw89_dev *rtwdev, enum rtw89_btc_hmsg event)
5657 {
5658 u16 bt_req_len;
5659
5660 switch (event) {
5661 case RTW89_BTC_HMSG_SET_BT_REQ_SLOT:
5662 bt_req_len = rtw89_coex_query_bt_req_len(rtwdev, RTW89_PHY_0);
5663 rtw89_debug(rtwdev, RTW89_DBG_BTC,
5664 "coex updates BT req len to %d TU\n", bt_req_len);
5665 rtw89_queue_chanctx_change(rtwdev, RTW89_CHANCTX_BT_SLOT_CHANGE);
5666 break;
5667 default:
5668 if (event < NUM_OF_RTW89_BTC_HMSG)
5669 rtw89_debug(rtwdev, RTW89_DBG_BTC,
5670 "unhandled BTC HMSG event: %d\n", event);
5671 else
5672 rtw89_warn(rtwdev,
5673 "unrecognized BTC HMSG event: %d\n", event);
5674 break;
5675 }
5676 }
5677
rtw89_check_quirks(struct rtw89_dev * rtwdev,const struct dmi_system_id * quirks)5678 void rtw89_check_quirks(struct rtw89_dev *rtwdev, const struct dmi_system_id *quirks)
5679 {
5680 const struct dmi_system_id *match;
5681 enum rtw89_quirks quirk;
5682
5683 if (!quirks)
5684 return;
5685
5686 for (match = dmi_first_match(quirks); match; match = dmi_first_match(match + 1)) {
5687 quirk = (uintptr_t)match->driver_data;
5688 if (quirk >= NUM_OF_RTW89_QUIRKS)
5689 continue;
5690
5691 set_bit(quirk, rtwdev->quirks);
5692 }
5693 }
5694 EXPORT_SYMBOL(rtw89_check_quirks);
5695
rtw89_core_start(struct rtw89_dev * rtwdev)5696 int rtw89_core_start(struct rtw89_dev *rtwdev)
5697 {
5698 bool no_bbmcu = !rtwdev->chip->bbmcu_nr;
5699 int ret;
5700
5701 ret = rtw89_mac_preinit(rtwdev);
5702 if (ret) {
5703 rtw89_err(rtwdev, "mac preinit fail, ret: %d\n", ret);
5704 return ret;
5705 }
5706
5707 if (no_bbmcu)
5708 rtw89_chip_bb_preinit(rtwdev);
5709
5710 rtw89_phy_init_bb_afe(rtwdev);
5711
5712 /* above do preinit before downloading firmware */
5713
5714 ret = rtw89_mac_init(rtwdev);
5715 if (ret) {
5716 rtw89_err(rtwdev, "mac init fail, ret:%d\n", ret);
5717 return ret;
5718 }
5719
5720 rtw89_btc_ntfy_poweron(rtwdev);
5721
5722 /* efuse process */
5723
5724 /* pre-config BB/RF, BB reset/RFC reset */
5725 ret = rtw89_chip_reset_bb_rf(rtwdev);
5726 if (ret)
5727 return ret;
5728
5729 rtw89_phy_init_bb_reg(rtwdev);
5730 rtw89_chip_bb_postinit(rtwdev);
5731 rtw89_phy_init_rf_reg(rtwdev, false);
5732
5733 rtw89_btc_ntfy_init(rtwdev, BTC_MODE_NORMAL);
5734
5735 rtw89_phy_dm_init(rtwdev);
5736
5737 rtw89_mac_cfg_ppdu_status_bands(rtwdev, true);
5738 rtw89_mac_cfg_phy_rpt_bands(rtwdev, true);
5739 rtw89_mac_update_rts_threshold(rtwdev);
5740
5741 ret = rtw89_hci_start(rtwdev);
5742 if (ret) {
5743 rtw89_err(rtwdev, "failed to start hci\n");
5744 return ret;
5745 }
5746
5747 wiphy_delayed_work_queue(rtwdev->hw->wiphy, &rtwdev->track_work,
5748 RTW89_TRACK_WORK_PERIOD);
5749 wiphy_delayed_work_queue(rtwdev->hw->wiphy, &rtwdev->track_ps_work,
5750 RTW89_TRACK_PS_WORK_PERIOD);
5751
5752 set_bit(RTW89_FLAG_RUNNING, rtwdev->flags);
5753
5754 rtw89_chip_rfk_init_late(rtwdev);
5755 rtw89_btc_ntfy_radio_state(rtwdev, BTC_RFCTRL_WL_ON);
5756 rtw89_fw_h2c_fw_log(rtwdev, rtwdev->fw.log.enable);
5757 rtw89_fw_h2c_init_ba_cam(rtwdev);
5758 rtw89_tas_fw_timer_enable(rtwdev, true);
5759 rtwdev->ps_hang_cnt = 0;
5760
5761 return 0;
5762 }
5763
rtw89_core_stop(struct rtw89_dev * rtwdev)5764 void rtw89_core_stop(struct rtw89_dev *rtwdev)
5765 {
5766 struct wiphy *wiphy = rtwdev->hw->wiphy;
5767 struct rtw89_btc *btc = &rtwdev->btc;
5768
5769 lockdep_assert_wiphy(wiphy);
5770
5771 /* Prvent to stop twice; enter_ips and ops_stop */
5772 if (!test_bit(RTW89_FLAG_RUNNING, rtwdev->flags))
5773 return;
5774
5775 rtw89_tas_fw_timer_enable(rtwdev, false);
5776 rtw89_btc_ntfy_radio_state(rtwdev, BTC_RFCTRL_WL_OFF);
5777
5778 clear_bit(RTW89_FLAG_RUNNING, rtwdev->flags);
5779
5780 wiphy_work_cancel(wiphy, &rtwdev->c2h_work);
5781 wiphy_work_cancel(wiphy, &rtwdev->cancel_6ghz_probe_work);
5782 wiphy_work_cancel(wiphy, &btc->eapol_notify_work);
5783 wiphy_work_cancel(wiphy, &btc->arp_notify_work);
5784 wiphy_work_cancel(wiphy, &btc->dhcp_notify_work);
5785 wiphy_work_cancel(wiphy, &btc->icmp_notify_work);
5786 cancel_delayed_work_sync(&rtwdev->txq_reinvoke_work);
5787 wiphy_delayed_work_cancel(wiphy, &rtwdev->tx_wait_work);
5788 wiphy_delayed_work_cancel(wiphy, &rtwdev->track_work);
5789 wiphy_delayed_work_cancel(wiphy, &rtwdev->track_ps_work);
5790 wiphy_delayed_work_cancel(wiphy, &rtwdev->chanctx_work);
5791 wiphy_delayed_work_cancel(wiphy, &rtwdev->coex_act1_work);
5792 wiphy_delayed_work_cancel(wiphy, &rtwdev->coex_bt_devinfo_work);
5793 wiphy_delayed_work_cancel(wiphy, &rtwdev->coex_rfk_chk_work);
5794 wiphy_delayed_work_cancel(wiphy, &rtwdev->cfo_track_work);
5795 wiphy_delayed_work_cancel(wiphy, &rtwdev->mcc_prepare_done_work);
5796 cancel_delayed_work_sync(&rtwdev->forbid_ba_work);
5797 wiphy_delayed_work_cancel(wiphy, &rtwdev->antdiv_work);
5798
5799 rtw89_btc_ntfy_poweroff(rtwdev);
5800 rtw89_hci_flush_queues(rtwdev, BIT(rtwdev->hw->queues) - 1, true);
5801 rtw89_mac_flush_txq(rtwdev, BIT(rtwdev->hw->queues) - 1, true);
5802 rtw89_hci_stop(rtwdev);
5803 rtw89_hci_deinit(rtwdev);
5804 rtw89_mac_pwr_off(rtwdev);
5805 rtw89_hci_reset(rtwdev);
5806 }
5807
rtw89_acquire_mac_id(struct rtw89_dev * rtwdev)5808 u8 rtw89_acquire_mac_id(struct rtw89_dev *rtwdev)
5809 {
5810 const struct rtw89_chip_info *chip = rtwdev->chip;
5811 u8 mac_id_num;
5812 u8 mac_id;
5813
5814 if (rtwdev->support_mlo)
5815 mac_id_num = chip->support_macid_num / chip->support_link_num;
5816 else
5817 mac_id_num = chip->support_macid_num;
5818
5819 mac_id = find_first_zero_bit(rtwdev->mac_id_map, mac_id_num);
5820 if (mac_id == mac_id_num)
5821 return RTW89_MAX_MAC_ID_NUM;
5822
5823 set_bit(mac_id, rtwdev->mac_id_map);
5824 return mac_id;
5825 }
5826
rtw89_release_mac_id(struct rtw89_dev * rtwdev,u8 mac_id)5827 void rtw89_release_mac_id(struct rtw89_dev *rtwdev, u8 mac_id)
5828 {
5829 clear_bit(mac_id, rtwdev->mac_id_map);
5830 }
5831
rtw89_init_vif(struct rtw89_dev * rtwdev,struct rtw89_vif * rtwvif,u8 mac_id,u8 port)5832 void rtw89_init_vif(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif,
5833 u8 mac_id, u8 port)
5834 {
5835 const struct rtw89_chip_info *chip = rtwdev->chip;
5836 u8 support_link_num = chip->support_link_num;
5837 u8 support_mld_num = 0;
5838 unsigned int link_id;
5839 u8 index;
5840
5841 bitmap_zero(rtwvif->links_inst_map, __RTW89_MLD_MAX_LINK_NUM);
5842 for (link_id = 0; link_id < IEEE80211_MLD_MAX_NUM_LINKS; link_id++)
5843 rtwvif->links[link_id] = NULL;
5844
5845 rtwvif->rtwdev = rtwdev;
5846
5847 if (rtwdev->support_mlo) {
5848 rtwvif->links_inst_valid_num = support_link_num;
5849 support_mld_num = chip->support_macid_num / support_link_num;
5850 } else {
5851 rtwvif->links_inst_valid_num = 1;
5852 }
5853
5854 for (index = 0; index < rtwvif->links_inst_valid_num; index++) {
5855 struct rtw89_vif_link *inst = &rtwvif->links_inst[index];
5856
5857 inst->rtwvif = rtwvif;
5858 inst->mac_id = mac_id + index * support_mld_num;
5859 inst->mac_idx = RTW89_MAC_0 + index;
5860 inst->phy_idx = RTW89_PHY_0 + index;
5861
5862 /* multi-link use the same port id on different HW bands */
5863 inst->port = port;
5864 }
5865 }
5866
rtw89_init_sta(struct rtw89_dev * rtwdev,struct rtw89_vif * rtwvif,struct rtw89_sta * rtwsta,u8 mac_id)5867 void rtw89_init_sta(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif,
5868 struct rtw89_sta *rtwsta, u8 mac_id)
5869 {
5870 const struct rtw89_chip_info *chip = rtwdev->chip;
5871 u8 support_link_num = chip->support_link_num;
5872 u8 support_mld_num = 0;
5873 unsigned int link_id;
5874 u8 index;
5875
5876 bitmap_zero(rtwsta->links_inst_map, __RTW89_MLD_MAX_LINK_NUM);
5877 for (link_id = 0; link_id < IEEE80211_MLD_MAX_NUM_LINKS; link_id++)
5878 rtwsta->links[link_id] = NULL;
5879
5880 rtwsta->rtwdev = rtwdev;
5881 rtwsta->rtwvif = rtwvif;
5882
5883 if (rtwdev->support_mlo) {
5884 rtwsta->links_inst_valid_num = support_link_num;
5885 support_mld_num = chip->support_macid_num / support_link_num;
5886 } else {
5887 rtwsta->links_inst_valid_num = 1;
5888 }
5889
5890 for (index = 0; index < rtwsta->links_inst_valid_num; index++) {
5891 struct rtw89_sta_link *inst = &rtwsta->links_inst[index];
5892
5893 inst->rtwvif_link = &rtwvif->links_inst[index];
5894
5895 inst->rtwsta = rtwsta;
5896 inst->mac_id = mac_id + index * support_mld_num;
5897 }
5898 }
5899
rtw89_vif_set_link(struct rtw89_vif * rtwvif,unsigned int link_id)5900 struct rtw89_vif_link *rtw89_vif_set_link(struct rtw89_vif *rtwvif,
5901 unsigned int link_id)
5902 {
5903 struct rtw89_vif_link *rtwvif_link = rtwvif->links[link_id];
5904 u8 index;
5905 int ret;
5906
5907 if (rtwvif_link)
5908 return rtwvif_link;
5909
5910 index = find_first_zero_bit(rtwvif->links_inst_map,
5911 rtwvif->links_inst_valid_num);
5912 if (index == rtwvif->links_inst_valid_num) {
5913 ret = -EBUSY;
5914 goto err;
5915 }
5916
5917 rtwvif_link = &rtwvif->links_inst[index];
5918 rtwvif_link->link_id = link_id;
5919
5920 set_bit(index, rtwvif->links_inst_map);
5921 rtwvif->links[link_id] = rtwvif_link;
5922 list_add_tail(&rtwvif_link->dlink_schd, &rtwvif->dlink_pool);
5923 return rtwvif_link;
5924
5925 err:
5926 rtw89_err(rtwvif->rtwdev, "vif (link_id %u) failed to set link: %d\n",
5927 link_id, ret);
5928 return NULL;
5929 }
5930
rtw89_vif_unset_link(struct rtw89_vif * rtwvif,unsigned int link_id)5931 void rtw89_vif_unset_link(struct rtw89_vif *rtwvif, unsigned int link_id)
5932 {
5933 struct rtw89_vif_link **container = &rtwvif->links[link_id];
5934 struct rtw89_vif_link *link = *container;
5935 u8 index;
5936
5937 if (!link)
5938 return;
5939
5940 index = rtw89_vif_link_inst_get_index(link);
5941 clear_bit(index, rtwvif->links_inst_map);
5942 *container = NULL;
5943 list_del(&link->dlink_schd);
5944 }
5945
rtw89_sta_set_link(struct rtw89_sta * rtwsta,unsigned int link_id)5946 struct rtw89_sta_link *rtw89_sta_set_link(struct rtw89_sta *rtwsta,
5947 unsigned int link_id)
5948 {
5949 struct rtw89_vif *rtwvif = rtwsta->rtwvif;
5950 struct rtw89_vif_link *rtwvif_link = rtwvif->links[link_id];
5951 struct rtw89_sta_link *rtwsta_link = rtwsta->links[link_id];
5952 u8 index;
5953 int ret;
5954
5955 if (rtwsta_link)
5956 return rtwsta_link;
5957
5958 if (!rtwvif_link) {
5959 ret = -ENOLINK;
5960 goto err;
5961 }
5962
5963 index = rtw89_vif_link_inst_get_index(rtwvif_link);
5964 if (test_bit(index, rtwsta->links_inst_map)) {
5965 ret = -EBUSY;
5966 goto err;
5967 }
5968
5969 rtwsta_link = &rtwsta->links_inst[index];
5970 rtwsta_link->link_id = link_id;
5971
5972 set_bit(index, rtwsta->links_inst_map);
5973 rtwsta->links[link_id] = rtwsta_link;
5974 list_add_tail(&rtwsta_link->dlink_schd, &rtwsta->dlink_pool);
5975 return rtwsta_link;
5976
5977 err:
5978 rtw89_err(rtwsta->rtwdev, "sta (link_id %u) failed to set link: %d\n",
5979 link_id, ret);
5980 return NULL;
5981 }
5982
rtw89_sta_unset_link(struct rtw89_sta * rtwsta,unsigned int link_id)5983 void rtw89_sta_unset_link(struct rtw89_sta *rtwsta, unsigned int link_id)
5984 {
5985 struct rtw89_sta_link **container = &rtwsta->links[link_id];
5986 struct rtw89_sta_link *link = *container;
5987 u8 index;
5988
5989 if (!link)
5990 return;
5991
5992 index = rtw89_sta_link_inst_get_index(link);
5993 clear_bit(index, rtwsta->links_inst_map);
5994 *container = NULL;
5995 list_del(&link->dlink_schd);
5996 }
5997
rtw89_core_init(struct rtw89_dev * rtwdev)5998 int rtw89_core_init(struct rtw89_dev *rtwdev)
5999 {
6000 struct rtw89_btc *btc = &rtwdev->btc;
6001 u8 band;
6002
6003 INIT_LIST_HEAD(&rtwdev->ba_list);
6004 INIT_LIST_HEAD(&rtwdev->forbid_ba_list);
6005 INIT_LIST_HEAD(&rtwdev->rtwvifs_list);
6006 INIT_LIST_HEAD(&rtwdev->early_h2c_list);
6007 for (band = NL80211_BAND_2GHZ; band < NUM_NL80211_BANDS; band++) {
6008 if (!(rtwdev->chip->support_bands & BIT(band)))
6009 continue;
6010 INIT_LIST_HEAD(&rtwdev->scan_info.pkt_list[band]);
6011 }
6012 INIT_LIST_HEAD(&rtwdev->scan_info.chan_list);
6013 INIT_LIST_HEAD(&rtwdev->tx_waits);
6014 INIT_WORK(&rtwdev->ba_work, rtw89_core_ba_work);
6015 INIT_WORK(&rtwdev->txq_work, rtw89_core_txq_work);
6016 INIT_DELAYED_WORK(&rtwdev->txq_reinvoke_work, rtw89_core_txq_reinvoke_work);
6017 wiphy_delayed_work_init(&rtwdev->track_work, rtw89_track_work);
6018 wiphy_delayed_work_init(&rtwdev->track_ps_work, rtw89_track_ps_work);
6019 wiphy_delayed_work_init(&rtwdev->chanctx_work, rtw89_chanctx_work);
6020 wiphy_delayed_work_init(&rtwdev->coex_act1_work, rtw89_coex_act1_work);
6021 wiphy_delayed_work_init(&rtwdev->coex_bt_devinfo_work, rtw89_coex_bt_devinfo_work);
6022 wiphy_delayed_work_init(&rtwdev->coex_rfk_chk_work, rtw89_coex_rfk_chk_work);
6023 wiphy_delayed_work_init(&rtwdev->cfo_track_work, rtw89_phy_cfo_track_work);
6024 wiphy_delayed_work_init(&rtwdev->mcc_prepare_done_work, rtw89_mcc_prepare_done_work);
6025 wiphy_delayed_work_init(&rtwdev->tx_wait_work, rtw89_tx_wait_work);
6026 INIT_DELAYED_WORK(&rtwdev->forbid_ba_work, rtw89_forbid_ba_work);
6027 wiphy_delayed_work_init(&rtwdev->antdiv_work, rtw89_phy_antdiv_work);
6028 rtwdev->txq_wq = alloc_workqueue("rtw89_tx_wq", WQ_UNBOUND | WQ_HIGHPRI, 0);
6029 if (!rtwdev->txq_wq)
6030 return -ENOMEM;
6031 spin_lock_init(&rtwdev->ba_lock);
6032 spin_lock_init(&rtwdev->rpwm_lock);
6033 mutex_init(&rtwdev->rf_mutex);
6034 rtwdev->total_sta_assoc = 0;
6035
6036 rtw89_init_wait(&rtwdev->mcc.wait);
6037 rtw89_init_wait(&rtwdev->mlo.wait);
6038 rtw89_init_wait(&rtwdev->mac.fw_ofld_wait);
6039 rtw89_init_wait(&rtwdev->wow.wait);
6040 rtw89_init_wait(&rtwdev->mac.ps_wait);
6041
6042 wiphy_work_init(&rtwdev->c2h_work, rtw89_fw_c2h_work);
6043 wiphy_work_init(&rtwdev->ips_work, rtw89_ips_work);
6044 wiphy_work_init(&rtwdev->cancel_6ghz_probe_work, rtw89_cancel_6ghz_probe_work);
6045 INIT_WORK(&rtwdev->load_firmware_work, rtw89_load_firmware_work);
6046
6047 spin_lock_init(&rtwdev->tx_rpt.skb_lock);
6048 skb_queue_head_init(&rtwdev->c2h_queue);
6049 rtw89_core_ppdu_sts_init(rtwdev);
6050 rtw89_traffic_stats_init(rtwdev, &rtwdev->stats);
6051
6052 rtwdev->hal.rx_fltr = DEFAULT_AX_RX_FLTR;
6053 rtwdev->dbcc_en = false;
6054 rtwdev->mlo_dbcc_mode = MLO_DBCC_NOT_SUPPORT;
6055 rtwdev->mac.qta_mode = RTW89_QTA_SCC;
6056
6057 if (rtwdev->chip->chip_gen == RTW89_CHIP_BE) {
6058 rtwdev->dbcc_en = true;
6059 rtwdev->mac.qta_mode = RTW89_QTA_DBCC;
6060 rtwdev->mlo_dbcc_mode = MLO_1_PLUS_1_1RF;
6061 }
6062
6063 rtwdev->bbs[RTW89_PHY_0].phy_idx = RTW89_PHY_0;
6064 rtwdev->bbs[RTW89_PHY_1].phy_idx = RTW89_PHY_1;
6065
6066 wiphy_work_init(&btc->eapol_notify_work, rtw89_btc_ntfy_eapol_packet_work);
6067 wiphy_work_init(&btc->arp_notify_work, rtw89_btc_ntfy_arp_packet_work);
6068 wiphy_work_init(&btc->dhcp_notify_work, rtw89_btc_ntfy_dhcp_packet_work);
6069 wiphy_work_init(&btc->icmp_notify_work, rtw89_btc_ntfy_icmp_packet_work);
6070
6071 init_completion(&rtwdev->fw.req.completion);
6072 init_completion(&rtwdev->rfk_wait.completion);
6073
6074 schedule_work(&rtwdev->load_firmware_work);
6075
6076 rtw89_ser_init(rtwdev);
6077 rtw89_entity_init(rtwdev);
6078 rtw89_sar_init(rtwdev);
6079 rtw89_phy_ant_gain_init(rtwdev);
6080
6081 return 0;
6082 }
6083 EXPORT_SYMBOL(rtw89_core_init);
6084
rtw89_core_deinit(struct rtw89_dev * rtwdev)6085 void rtw89_core_deinit(struct rtw89_dev *rtwdev)
6086 {
6087 rtw89_ser_deinit(rtwdev);
6088 rtw89_unload_firmware(rtwdev);
6089 __rtw89_fw_free_all_early_h2c(rtwdev);
6090
6091 destroy_workqueue(rtwdev->txq_wq);
6092 mutex_destroy(&rtwdev->rf_mutex);
6093 }
6094 EXPORT_SYMBOL(rtw89_core_deinit);
6095
rtw89_core_scan_start(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link,const u8 * mac_addr,bool hw_scan)6096 void rtw89_core_scan_start(struct rtw89_dev *rtwdev, struct rtw89_vif_link *rtwvif_link,
6097 const u8 *mac_addr, bool hw_scan)
6098 {
6099 const struct rtw89_chan *chan = rtw89_chan_get(rtwdev,
6100 rtwvif_link->chanctx_idx);
6101 struct rtw89_bb_ctx *bb = rtw89_get_bb_ctx(rtwdev, rtwvif_link->phy_idx);
6102
6103 rtwdev->scanning = true;
6104
6105 ether_addr_copy(rtwvif_link->mac_addr, mac_addr);
6106 rtw89_btc_ntfy_scan_start(rtwdev, rtwvif_link->phy_idx, chan->band_type);
6107 rtw89_chip_rfk_scan(rtwdev, rtwvif_link, true);
6108 rtw89_hci_recalc_int_mit(rtwdev);
6109 rtw89_phy_config_edcca(rtwdev, bb, true);
6110 rtw89_tas_scan(rtwdev, true);
6111
6112 rtw89_fw_h2c_cam(rtwdev, rtwvif_link, NULL, mac_addr,
6113 RTW89_ROLE_INFO_CHANGE);
6114 }
6115
rtw89_core_scan_complete(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link,bool hw_scan)6116 void rtw89_core_scan_complete(struct rtw89_dev *rtwdev,
6117 struct rtw89_vif_link *rtwvif_link, bool hw_scan)
6118 {
6119 struct ieee80211_bss_conf *bss_conf;
6120 struct rtw89_bb_ctx *bb;
6121 int ret;
6122
6123 if (!rtwvif_link)
6124 return;
6125
6126 rcu_read_lock();
6127
6128 bss_conf = rtw89_vif_rcu_dereference_link(rtwvif_link, true);
6129 ether_addr_copy(rtwvif_link->mac_addr, bss_conf->addr);
6130
6131 rcu_read_unlock();
6132
6133 rtw89_fw_h2c_cam(rtwdev, rtwvif_link, NULL, NULL,
6134 RTW89_ROLE_INFO_CHANGE);
6135
6136 rtw89_chip_rfk_scan(rtwdev, rtwvif_link, false);
6137 rtw89_btc_ntfy_scan_finish(rtwdev, rtwvif_link->phy_idx);
6138 bb = rtw89_get_bb_ctx(rtwdev, rtwvif_link->phy_idx);
6139 rtw89_phy_config_edcca(rtwdev, bb, false);
6140 rtw89_tas_scan(rtwdev, false);
6141
6142 if (hw_scan) {
6143 ret = rtw89_core_send_nullfunc(rtwdev, rtwvif_link, false, false,
6144 RTW89_SCAN_NULL_TIMEOUT);
6145 if (ret)
6146 rtw89_debug(rtwdev, RTW89_DBG_TXRX,
6147 "scan send null-0 failed: %d\n", ret);
6148 }
6149
6150 rtwdev->scanning = false;
6151 rtw89_for_each_active_bb(rtwdev, bb)
6152 bb->dig.bypass_dig = true;
6153 if (hw_scan && (rtwdev->hw->conf.flags & IEEE80211_CONF_IDLE))
6154 wiphy_work_queue(rtwdev->hw->wiphy, &rtwdev->ips_work);
6155 }
6156
rtw89_read_chip_ver(struct rtw89_dev * rtwdev)6157 static void rtw89_read_chip_ver(struct rtw89_dev *rtwdev)
6158 {
6159 const struct rtw89_chip_info *chip = rtwdev->chip;
6160 int ret;
6161 u8 val;
6162 u8 cv;
6163
6164 cv = rtw89_read32_mask(rtwdev, R_AX_SYS_CFG1, B_AX_CHIP_VER_MASK);
6165 if (chip->chip_id == RTL8852A && cv <= CHIP_CBV) {
6166 if (rtw89_read32(rtwdev, R_AX_GPIO0_7_FUNC_SEL) == RTW89_R32_DEAD)
6167 cv = CHIP_CAV;
6168 else
6169 cv = CHIP_CBV;
6170 }
6171
6172 rtwdev->hal.cv = cv;
6173
6174 if (rtw89_is_rtl885xb(rtwdev)) {
6175 ret = rtw89_mac_read_xtal_si(rtwdev, XTAL_SI_CV, &val);
6176 if (ret)
6177 return;
6178
6179 rtwdev->hal.acv = u8_get_bits(val, XTAL_SI_ACV_MASK);
6180 }
6181 }
6182
rtw89_core_setup_phycap(struct rtw89_dev * rtwdev)6183 static void rtw89_core_setup_phycap(struct rtw89_dev *rtwdev)
6184 {
6185 const struct rtw89_chip_info *chip = rtwdev->chip;
6186
6187 rtwdev->hal.support_cckpd =
6188 !(rtwdev->chip->chip_id == RTL8852A && rtwdev->hal.cv <= CHIP_CBV) &&
6189 !(rtwdev->chip->chip_id == RTL8852B && rtwdev->hal.cv <= CHIP_CAV);
6190 rtwdev->hal.support_igi =
6191 rtwdev->chip->chip_id == RTL8852A && rtwdev->hal.cv <= CHIP_CBV;
6192
6193 if (test_bit(RTW89_QUIRK_THERMAL_PROT_120C, rtwdev->quirks))
6194 rtwdev->hal.thermal_prot_th = chip->thermal_th[1];
6195 else if (test_bit(RTW89_QUIRK_THERMAL_PROT_110C, rtwdev->quirks))
6196 rtwdev->hal.thermal_prot_th = chip->thermal_th[0];
6197 else
6198 rtwdev->hal.thermal_prot_th = 0;
6199 }
6200
rtw89_core_setup_rfe_parms(struct rtw89_dev * rtwdev)6201 static void rtw89_core_setup_rfe_parms(struct rtw89_dev *rtwdev)
6202 {
6203 const struct rtw89_chip_info *chip = rtwdev->chip;
6204 const struct rtw89_rfe_parms_conf *conf = chip->rfe_parms_conf;
6205 struct rtw89_efuse *efuse = &rtwdev->efuse;
6206 const struct rtw89_rfe_parms *sel;
6207 u8 rfe_type = efuse->rfe_type;
6208
6209 if (!conf) {
6210 sel = chip->dflt_parms;
6211 goto out;
6212 }
6213
6214 while (conf->rfe_parms) {
6215 if (rfe_type == conf->rfe_type) {
6216 sel = conf->rfe_parms;
6217 goto out;
6218 }
6219 conf++;
6220 }
6221
6222 sel = chip->dflt_parms;
6223
6224 out:
6225 rtwdev->rfe_parms = rtw89_load_rfe_data_from_fw(rtwdev, sel);
6226 rtw89_load_txpwr_table(rtwdev, rtwdev->rfe_parms->byr_tbl);
6227 }
6228
rtw89_core_mlsr_switch(struct rtw89_dev * rtwdev,struct rtw89_vif * rtwvif,unsigned int link_id)6229 int rtw89_core_mlsr_switch(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif,
6230 unsigned int link_id)
6231 {
6232 struct ieee80211_vif *vif = rtwvif_to_vif(rtwvif);
6233 u16 usable_links = ieee80211_vif_usable_links(vif);
6234 u16 active_links = vif->active_links;
6235 struct rtw89_vif_link *target;
6236 int ret;
6237
6238 lockdep_assert_wiphy(rtwdev->hw->wiphy);
6239
6240 if (unlikely(!ieee80211_vif_is_mld(vif)))
6241 return -EOPNOTSUPP;
6242
6243 if (unlikely(link_id >= IEEE80211_MLD_MAX_NUM_LINKS ||
6244 !(usable_links & BIT(link_id)))) {
6245 rtw89_warn(rtwdev, "%s: link id %u is not usable\n", __func__,
6246 link_id);
6247 return -ENOLINK;
6248 }
6249
6250 if (active_links == BIT(link_id))
6251 return 0;
6252
6253 rtw89_debug(rtwdev, RTW89_DBG_STATE, "%s: switch to link id %u MLSR\n",
6254 __func__, link_id);
6255
6256 rtw89_leave_lps(rtwdev);
6257
6258 ieee80211_stop_queues(rtwdev->hw);
6259 flush_work(&rtwdev->txq_work);
6260
6261 ret = ieee80211_set_active_links(vif, BIT(link_id));
6262 if (ret) {
6263 rtw89_err(rtwdev, "%s: failed to work on link id %u\n",
6264 __func__, link_id);
6265 goto wake_queue;
6266 }
6267
6268 target = rtwvif->links[link_id];
6269 if (unlikely(!target)) {
6270 rtw89_err(rtwdev, "%s: failed to confirm link id %u\n",
6271 __func__, link_id);
6272
6273 ieee80211_set_active_links(vif, active_links);
6274 ret = -EFAULT;
6275 goto wake_queue;
6276 }
6277
6278 rtw89_chip_rfk_channel(rtwdev, target);
6279
6280 rtwvif->mlo_mode = RTW89_MLO_MODE_MLSR;
6281
6282 wake_queue:
6283 ieee80211_wake_queues(rtwdev->hw);
6284
6285 return ret;
6286 }
6287
rtw89_chip_efuse_info_setup(struct rtw89_dev * rtwdev)6288 static int rtw89_chip_efuse_info_setup(struct rtw89_dev *rtwdev)
6289 {
6290 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;
6291 int ret;
6292
6293 ret = rtw89_mac_partial_init(rtwdev, false);
6294 if (ret)
6295 return ret;
6296
6297 ret = mac->parse_efuse_map(rtwdev);
6298 if (ret)
6299 return ret;
6300
6301 ret = mac->parse_phycap_map(rtwdev);
6302 if (ret)
6303 return ret;
6304
6305 ret = rtw89_mac_setup_phycap(rtwdev);
6306 if (ret)
6307 return ret;
6308
6309 rtw89_core_setup_phycap(rtwdev);
6310
6311 rtw89_hci_mac_pre_deinit(rtwdev);
6312
6313 return 0;
6314 }
6315
rtw89_chip_board_info_setup(struct rtw89_dev * rtwdev)6316 static int rtw89_chip_board_info_setup(struct rtw89_dev *rtwdev)
6317 {
6318 rtw89_chip_fem_setup(rtwdev);
6319
6320 return 0;
6321 }
6322
rtw89_chip_has_rfkill(struct rtw89_dev * rtwdev)6323 static bool rtw89_chip_has_rfkill(struct rtw89_dev *rtwdev)
6324 {
6325 return !!rtwdev->chip->rfkill_init;
6326 }
6327
rtw89_core_rfkill_init(struct rtw89_dev * rtwdev)6328 static void rtw89_core_rfkill_init(struct rtw89_dev *rtwdev)
6329 {
6330 const struct rtw89_rfkill_regs *regs = rtwdev->chip->rfkill_init;
6331
6332 rtw89_write16_mask(rtwdev, regs->pinmux.addr,
6333 regs->pinmux.mask, regs->pinmux.data);
6334 rtw89_write16_mask(rtwdev, regs->mode.addr,
6335 regs->mode.mask, regs->mode.data);
6336 }
6337
rtw89_core_rfkill_get(struct rtw89_dev * rtwdev)6338 static bool rtw89_core_rfkill_get(struct rtw89_dev *rtwdev)
6339 {
6340 const struct rtw89_reg_def *reg = &rtwdev->chip->rfkill_get;
6341
6342 return !rtw89_read8_mask(rtwdev, reg->addr, reg->mask);
6343 }
6344
rtw89_rfkill_polling_init(struct rtw89_dev * rtwdev)6345 static void rtw89_rfkill_polling_init(struct rtw89_dev *rtwdev)
6346 {
6347 if (!rtw89_chip_has_rfkill(rtwdev))
6348 return;
6349
6350 rtw89_core_rfkill_init(rtwdev);
6351 rtw89_core_rfkill_poll(rtwdev, true);
6352 wiphy_rfkill_start_polling(rtwdev->hw->wiphy);
6353 }
6354
rtw89_rfkill_polling_deinit(struct rtw89_dev * rtwdev)6355 static void rtw89_rfkill_polling_deinit(struct rtw89_dev *rtwdev)
6356 {
6357 if (!rtw89_chip_has_rfkill(rtwdev))
6358 return;
6359
6360 wiphy_rfkill_stop_polling(rtwdev->hw->wiphy);
6361 }
6362
rtw89_core_rfkill_poll(struct rtw89_dev * rtwdev,bool force)6363 void rtw89_core_rfkill_poll(struct rtw89_dev *rtwdev, bool force)
6364 {
6365 bool prev, blocked;
6366
6367 if (!rtw89_chip_has_rfkill(rtwdev))
6368 return;
6369
6370 prev = test_bit(RTW89_FLAG_HW_RFKILL_STATE, rtwdev->flags);
6371 blocked = rtw89_core_rfkill_get(rtwdev);
6372
6373 if (!force && prev == blocked)
6374 return;
6375
6376 rtw89_info(rtwdev, "rfkill hardware state changed to %s\n",
6377 blocked ? "disable" : "enable");
6378
6379 if (blocked)
6380 set_bit(RTW89_FLAG_HW_RFKILL_STATE, rtwdev->flags);
6381 else
6382 clear_bit(RTW89_FLAG_HW_RFKILL_STATE, rtwdev->flags);
6383
6384 wiphy_rfkill_set_hw_state(rtwdev->hw->wiphy, blocked);
6385 }
6386
rtw89_chip_info_setup(struct rtw89_dev * rtwdev)6387 int rtw89_chip_info_setup(struct rtw89_dev *rtwdev)
6388 {
6389 int ret;
6390
6391 rtw89_read_chip_ver(rtwdev);
6392
6393 ret = rtw89_mac_pwr_on(rtwdev);
6394 if (ret) {
6395 rtw89_err(rtwdev, "failed to power on\n");
6396 return ret;
6397 }
6398
6399 ret = rtw89_wait_firmware_completion(rtwdev);
6400 if (ret) {
6401 rtw89_err(rtwdev, "failed to wait firmware completion\n");
6402 goto out;
6403 }
6404
6405 ret = rtw89_fw_recognize(rtwdev);
6406 if (ret) {
6407 rtw89_err(rtwdev, "failed to recognize firmware\n");
6408 goto out;
6409 }
6410
6411 ret = rtw89_chip_efuse_info_setup(rtwdev);
6412 if (ret)
6413 goto out;
6414
6415 ret = rtw89_fw_recognize_elements(rtwdev);
6416 if (ret) {
6417 rtw89_err(rtwdev, "failed to recognize firmware elements\n");
6418 goto out;
6419 }
6420
6421 ret = rtw89_chip_board_info_setup(rtwdev);
6422 if (ret)
6423 goto out;
6424
6425 rtw89_core_setup_rfe_parms(rtwdev);
6426 rtwdev->ps_mode = rtw89_update_ps_mode(rtwdev);
6427
6428 out:
6429 rtw89_mac_pwr_off(rtwdev);
6430
6431 return ret;
6432 }
6433 EXPORT_SYMBOL(rtw89_chip_info_setup);
6434
rtw89_chip_cfg_txpwr_ul_tb_offset(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link)6435 void rtw89_chip_cfg_txpwr_ul_tb_offset(struct rtw89_dev *rtwdev,
6436 struct rtw89_vif_link *rtwvif_link)
6437 {
6438 struct ieee80211_vif *vif = rtwvif_link_to_vif(rtwvif_link);
6439 const struct rtw89_chip_info *chip = rtwdev->chip;
6440 struct ieee80211_bss_conf *bss_conf;
6441
6442 rcu_read_lock();
6443
6444 bss_conf = rtw89_vif_rcu_dereference_link(rtwvif_link, false);
6445 if (!bss_conf->he_support || !vif->cfg.assoc) {
6446 rcu_read_unlock();
6447 return;
6448 }
6449
6450 rcu_read_unlock();
6451
6452 if (chip->ops->set_txpwr_ul_tb_offset)
6453 chip->ops->set_txpwr_ul_tb_offset(rtwdev, 0, rtwvif_link->mac_idx);
6454 }
6455
rtw89_core_register_hw(struct rtw89_dev * rtwdev)6456 static int rtw89_core_register_hw(struct rtw89_dev *rtwdev)
6457 {
6458 const struct rtw89_chip_info *chip = rtwdev->chip;
6459 u8 n = rtwdev->support_mlo ? chip->support_link_num : 1;
6460 struct ieee80211_hw *hw = rtwdev->hw;
6461 struct rtw89_efuse *efuse = &rtwdev->efuse;
6462 struct rtw89_hal *hal = &rtwdev->hal;
6463 int ret;
6464 int tx_headroom = IEEE80211_HT_CTL_LEN;
6465
6466 if (rtwdev->hci.type == RTW89_HCI_TYPE_USB)
6467 tx_headroom += chip->txwd_body_size + chip->txwd_info_size;
6468
6469 hw->vif_data_size = struct_size_t(struct rtw89_vif, links_inst, n);
6470 hw->sta_data_size = struct_size_t(struct rtw89_sta, links_inst, n);
6471 hw->txq_data_size = sizeof(struct rtw89_txq);
6472 hw->chanctx_data_size = sizeof(struct rtw89_chanctx_cfg);
6473
6474 SET_IEEE80211_PERM_ADDR(hw, efuse->addr);
6475
6476 hw->extra_tx_headroom = tx_headroom;
6477 hw->queues = IEEE80211_NUM_ACS;
6478 hw->max_rx_aggregation_subframes = RTW89_MAX_RX_AGG_NUM;
6479 hw->max_tx_aggregation_subframes = RTW89_MAX_TX_AGG_NUM;
6480 hw->uapsd_max_sp_len = IEEE80211_WMM_IE_STA_QOSINFO_SP_ALL;
6481
6482 hw->radiotap_mcs_details |= IEEE80211_RADIOTAP_MCS_HAVE_FEC |
6483 IEEE80211_RADIOTAP_MCS_HAVE_STBC;
6484 hw->radiotap_vht_details |= IEEE80211_RADIOTAP_VHT_KNOWN_STBC;
6485
6486 ieee80211_hw_set(hw, SIGNAL_DBM);
6487 ieee80211_hw_set(hw, HAS_RATE_CONTROL);
6488 ieee80211_hw_set(hw, MFP_CAPABLE);
6489 ieee80211_hw_set(hw, REPORTS_TX_ACK_STATUS);
6490 ieee80211_hw_set(hw, AMPDU_AGGREGATION);
6491 ieee80211_hw_set(hw, RX_INCLUDES_FCS);
6492 ieee80211_hw_set(hw, TX_AMSDU);
6493 ieee80211_hw_set(hw, SUPPORT_FAST_XMIT);
6494 ieee80211_hw_set(hw, SUPPORTS_AMSDU_IN_AMPDU);
6495 ieee80211_hw_set(hw, SUPPORTS_PS);
6496 ieee80211_hw_set(hw, SUPPORTS_DYNAMIC_PS);
6497 ieee80211_hw_set(hw, SINGLE_SCAN_ON_ALL_BANDS);
6498 ieee80211_hw_set(hw, SUPPORTS_MULTI_BSSID);
6499 ieee80211_hw_set(hw, WANT_MONITOR_VIF);
6500 ieee80211_hw_set(hw, CHANCTX_STA_CSA);
6501
6502 if (chip->support_bandwidths & BIT(NL80211_CHAN_WIDTH_160))
6503 ieee80211_hw_set(hw, SUPPORTS_VHT_EXT_NSS_BW);
6504
6505 if (RTW89_CHK_FW_FEATURE(BEACON_FILTER, &rtwdev->fw))
6506 ieee80211_hw_set(hw, CONNECTION_MONITOR);
6507
6508 if (RTW89_CHK_FW_FEATURE(NOTIFY_AP_INFO, &rtwdev->fw))
6509 ieee80211_hw_set(hw, AP_LINK_PS);
6510
6511 hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
6512 BIT(NL80211_IFTYPE_AP) |
6513 BIT(NL80211_IFTYPE_P2P_CLIENT) |
6514 BIT(NL80211_IFTYPE_P2P_GO);
6515
6516 if (hal->ant_diversity) {
6517 hw->wiphy->available_antennas_tx = 0x3;
6518 hw->wiphy->available_antennas_rx = 0x3;
6519 } else {
6520 hw->wiphy->available_antennas_tx = BIT(rtwdev->chip->rf_path_num) - 1;
6521 hw->wiphy->available_antennas_rx = BIT(rtwdev->chip->rf_path_num) - 1;
6522 }
6523
6524 hw->wiphy->flags |= WIPHY_FLAG_SUPPORTS_TDLS |
6525 WIPHY_FLAG_TDLS_EXTERNAL_SETUP |
6526 WIPHY_FLAG_AP_UAPSD |
6527 WIPHY_FLAG_HAS_CHANNEL_SWITCH |
6528 WIPHY_FLAG_SUPPORTS_EXT_KEK_KCK;
6529
6530 if (!chip->support_rnr)
6531 hw->wiphy->flags |= WIPHY_FLAG_SPLIT_SCAN_6GHZ;
6532
6533 if (chip->chip_gen == RTW89_CHIP_BE)
6534 hw->wiphy->flags |= WIPHY_FLAG_DISABLE_WEXT;
6535
6536 if (rtwdev->support_mlo) {
6537 hw->wiphy->flags |= WIPHY_FLAG_SUPPORTS_MLO;
6538 hw->wiphy->iftype_ext_capab = rtw89_iftypes_ext_capa;
6539 hw->wiphy->num_iftype_ext_capab = ARRAY_SIZE(rtw89_iftypes_ext_capa);
6540 }
6541
6542 hw->wiphy->features |= NL80211_FEATURE_SCAN_RANDOM_MAC_ADDR;
6543
6544 hw->wiphy->max_scan_ssids = RTW89_SCANOFLD_MAX_SSID;
6545 hw->wiphy->max_scan_ie_len = RTW89_SCANOFLD_MAX_IE_LEN;
6546
6547 #ifdef CONFIG_PM
6548 hw->wiphy->wowlan = rtwdev->chip->wowlan_stub;
6549 hw->wiphy->max_sched_scan_ssids = RTW89_SCANOFLD_MAX_SSID;
6550 #endif
6551
6552 hw->wiphy->tid_config_support.vif |= BIT(NL80211_TID_CONFIG_ATTR_AMPDU_CTRL);
6553 hw->wiphy->tid_config_support.peer |= BIT(NL80211_TID_CONFIG_ATTR_AMPDU_CTRL);
6554 hw->wiphy->tid_config_support.vif |= BIT(NL80211_TID_CONFIG_ATTR_AMSDU_CTRL);
6555 hw->wiphy->tid_config_support.peer |= BIT(NL80211_TID_CONFIG_ATTR_AMSDU_CTRL);
6556 hw->wiphy->max_remain_on_channel_duration = 1000;
6557
6558 wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_CAN_REPLACE_PTK0);
6559 wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_SCAN_RANDOM_SN);
6560 wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_SET_SCAN_DWELL);
6561
6562 ret = rtw89_core_set_supported_band(rtwdev);
6563 if (ret) {
6564 rtw89_err(rtwdev, "failed to set supported band\n");
6565 return ret;
6566 }
6567
6568 ret = rtw89_regd_setup(rtwdev);
6569 if (ret) {
6570 rtw89_err(rtwdev, "failed to set up regd\n");
6571 return ret;
6572 }
6573
6574 hw->wiphy->sar_capa = &rtw89_sar_capa;
6575
6576 ret = ieee80211_register_hw(hw);
6577 if (ret) {
6578 rtw89_err(rtwdev, "failed to register hw\n");
6579 return ret;
6580 }
6581
6582 ret = rtw89_regd_init_hint(rtwdev);
6583 if (ret) {
6584 rtw89_err(rtwdev, "failed to init regd\n");
6585 goto err_unregister_hw;
6586 }
6587
6588 rtw89_rfkill_polling_init(rtwdev);
6589
6590 return 0;
6591
6592 err_unregister_hw:
6593 ieee80211_unregister_hw(hw);
6594
6595 return ret;
6596 }
6597
rtw89_core_unregister_hw(struct rtw89_dev * rtwdev)6598 static void rtw89_core_unregister_hw(struct rtw89_dev *rtwdev)
6599 {
6600 struct ieee80211_hw *hw = rtwdev->hw;
6601
6602 rtw89_rfkill_polling_deinit(rtwdev);
6603 ieee80211_unregister_hw(hw);
6604 }
6605
rtw89_core_register(struct rtw89_dev * rtwdev)6606 int rtw89_core_register(struct rtw89_dev *rtwdev)
6607 {
6608 int ret;
6609
6610 ret = rtw89_core_register_hw(rtwdev);
6611 if (ret) {
6612 rtw89_err(rtwdev, "failed to register core hw\n");
6613 return ret;
6614 }
6615
6616 rtw89_phy_dm_init_data(rtwdev);
6617 rtw89_debugfs_init(rtwdev);
6618
6619 return 0;
6620 }
6621 EXPORT_SYMBOL(rtw89_core_register);
6622
rtw89_core_unregister(struct rtw89_dev * rtwdev)6623 void rtw89_core_unregister(struct rtw89_dev *rtwdev)
6624 {
6625 rtw89_core_unregister_hw(rtwdev);
6626
6627 rtw89_debugfs_deinit(rtwdev);
6628 }
6629 EXPORT_SYMBOL(rtw89_core_unregister);
6630
rtw89_alloc_ieee80211_hw(struct device * device,u32 bus_data_size,const struct rtw89_chip_info * chip,const struct rtw89_chip_variant * variant)6631 struct rtw89_dev *rtw89_alloc_ieee80211_hw(struct device *device,
6632 u32 bus_data_size,
6633 const struct rtw89_chip_info *chip,
6634 const struct rtw89_chip_variant *variant)
6635 {
6636 struct rtw89_fw_info early_fw = {};
6637 const struct firmware *firmware;
6638 struct ieee80211_hw *hw;
6639 struct rtw89_dev *rtwdev;
6640 struct ieee80211_ops *ops;
6641 u32 driver_data_size;
6642 int fw_format = -1;
6643 bool support_mlo;
6644 bool no_chanctx;
6645
6646 firmware = rtw89_early_fw_feature_recognize(device, chip, &early_fw, &fw_format);
6647
6648 ops = kmemdup(&rtw89_ops, sizeof(rtw89_ops), GFP_KERNEL);
6649 if (!ops)
6650 goto err;
6651
6652 no_chanctx = chip->support_chanctx_num == 0 ||
6653 !RTW89_CHK_FW_FEATURE(SCAN_OFFLOAD, &early_fw) ||
6654 !RTW89_CHK_FW_FEATURE(BEACON_FILTER, &early_fw);
6655
6656 if (no_chanctx) {
6657 ops->add_chanctx = ieee80211_emulate_add_chanctx;
6658 ops->remove_chanctx = ieee80211_emulate_remove_chanctx;
6659 ops->change_chanctx = ieee80211_emulate_change_chanctx;
6660 ops->switch_vif_chanctx = ieee80211_emulate_switch_vif_chanctx;
6661 ops->assign_vif_chanctx = NULL;
6662 ops->unassign_vif_chanctx = NULL;
6663 ops->remain_on_channel = NULL;
6664 ops->cancel_remain_on_channel = NULL;
6665 }
6666
6667 if (!chip->support_noise)
6668 ops->get_survey = NULL;
6669
6670 driver_data_size = sizeof(struct rtw89_dev) + bus_data_size;
6671 hw = ieee80211_alloc_hw(driver_data_size, ops);
6672 if (!hw)
6673 goto err;
6674
6675 /* Currently, our AP_LINK_PS handling only works for non-MLD softap
6676 * or MLD-single-link softap. If RTW89_MLD_NON_STA_LINK_NUM enlarges,
6677 * please tweak entire AP_LINKS_PS handling before supporting MLO.
6678 */
6679 support_mlo = !no_chanctx && chip->support_link_num &&
6680 RTW89_CHK_FW_FEATURE(NOTIFY_AP_INFO, &early_fw) &&
6681 RTW89_MLD_NON_STA_LINK_NUM == 1;
6682
6683 hw->wiphy->iface_combinations = rtw89_iface_combs;
6684
6685 if (no_chanctx || chip->support_chanctx_num == 1)
6686 hw->wiphy->n_iface_combinations = 1;
6687 else
6688 hw->wiphy->n_iface_combinations = ARRAY_SIZE(rtw89_iface_combs);
6689
6690 rtwdev = hw->priv;
6691 rtwdev->hw = hw;
6692 rtwdev->dev = device;
6693 rtwdev->ops = ops;
6694 rtwdev->chip = chip;
6695 rtwdev->variant = variant;
6696 rtwdev->fw.req.firmware = firmware;
6697 rtwdev->fw.fw_format = fw_format;
6698 rtwdev->support_mlo = support_mlo;
6699
6700 rtw89_debug(rtwdev, RTW89_DBG_CHAN, "probe driver %s chanctx\n",
6701 no_chanctx ? "without" : "with");
6702 rtw89_debug(rtwdev, RTW89_DBG_CHAN, "probe driver %s MLO cap\n",
6703 support_mlo ? "with" : "without");
6704
6705 return rtwdev;
6706
6707 err:
6708 kfree(ops);
6709 release_firmware(firmware);
6710 return NULL;
6711 }
6712 EXPORT_SYMBOL(rtw89_alloc_ieee80211_hw);
6713
rtw89_free_ieee80211_hw(struct rtw89_dev * rtwdev)6714 void rtw89_free_ieee80211_hw(struct rtw89_dev *rtwdev)
6715 {
6716 kfree(rtwdev->ops);
6717 kfree(rtwdev->rfe_data);
6718 release_firmware(rtwdev->fw.req.firmware);
6719 ieee80211_free_hw(rtwdev->hw);
6720 }
6721 EXPORT_SYMBOL(rtw89_free_ieee80211_hw);
6722
6723 MODULE_AUTHOR("Realtek Corporation");
6724 MODULE_DESCRIPTION("Realtek 802.11ax wireless core module");
6725 MODULE_LICENSE("Dual BSD/GPL");
6726 #if defined(__FreeBSD__)
6727 MODULE_VERSION(rtw89, 1);
6728 MODULE_DEPEND(rtw89, linuxkpi, 1, 1, 1);
6729 MODULE_DEPEND(rtw89, linuxkpi_wlan, 1, 1, 1);
6730 #endif
6731