1 /*-
2 * Copyright (c) 2014 Andrew Turner
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 */
27
28 #include <sys/param.h>
29 #include <sys/systm.h>
30 #include <sys/exec.h>
31 #include <sys/imgact.h>
32 #include <sys/kdb.h>
33 #include <sys/kernel.h>
34 #include <sys/ktr.h>
35 #include <sys/limits.h>
36 #include <sys/lock.h>
37 #include <sys/mutex.h>
38 #include <sys/proc.h>
39 #include <sys/ptrace.h>
40 #include <sys/reg.h>
41 #include <sys/rwlock.h>
42 #include <sys/signalvar.h>
43 #include <sys/syscallsubr.h>
44 #include <sys/sysent.h>
45 #include <sys/sysproto.h>
46 #include <sys/ucontext.h>
47
48 #include <vm/vm.h>
49 #include <vm/vm_param.h>
50 #include <vm/pmap.h>
51 #include <vm/vm_map.h>
52
53 #include <machine/armreg.h>
54 #include <machine/elf.h>
55 #include <machine/kdb.h>
56 #include <machine/md_var.h>
57 #include <machine/pcb.h>
58
59 #ifdef VFP
60 #include <machine/vfp.h>
61 #endif
62
63 #define CTX_SIZE_SVE(buf_size) \
64 roundup2(sizeof(struct sve_context) + (buf_size), \
65 _Alignof(struct sve_context))
66
67 _Static_assert(sizeof(mcontext_t) == 880, "mcontext_t size incorrect");
68 _Static_assert(sizeof(ucontext_t) == 960, "ucontext_t size incorrect");
69 _Static_assert(sizeof(siginfo_t) == 80, "siginfo_t size incorrect");
70
71 static void get_fpcontext(struct thread *td, mcontext_t *mcp);
72 static void set_fpcontext(struct thread *td, mcontext_t *mcp);
73
74 int
fill_regs(struct thread * td,struct reg * regs)75 fill_regs(struct thread *td, struct reg *regs)
76 {
77 struct trapframe *frame;
78
79 frame = td->td_frame;
80 regs->sp = frame->tf_sp;
81 regs->lr = frame->tf_lr;
82 regs->elr = frame->tf_elr;
83 regs->spsr = frame->tf_spsr;
84
85 memcpy(regs->x, frame->tf_x, sizeof(regs->x));
86
87 #ifdef COMPAT_FREEBSD32
88 /*
89 * We may be called here for a 32bits process, if we're using a
90 * 64bits debugger. If so, put PC and SPSR where it expects it.
91 */
92 if (SV_PROC_FLAG(td->td_proc, SV_ILP32)) {
93 regs->x[15] = frame->tf_elr;
94 regs->x[16] = frame->tf_spsr;
95 }
96 #endif
97 return (0);
98 }
99
100 int
set_regs(struct thread * td,struct reg * regs)101 set_regs(struct thread *td, struct reg *regs)
102 {
103 struct trapframe *frame;
104
105 frame = td->td_frame;
106 frame->tf_sp = regs->sp;
107 frame->tf_lr = regs->lr;
108
109 memcpy(frame->tf_x, regs->x, sizeof(frame->tf_x));
110
111 #ifdef COMPAT_FREEBSD32
112 if (SV_PROC_FLAG(td->td_proc, SV_ILP32)) {
113 /*
114 * We may be called for a 32bits process if we're using
115 * a 64bits debugger. If so, get PC and SPSR from where
116 * it put it.
117 */
118 frame->tf_elr = regs->x[15];
119 frame->tf_spsr &= ~PSR_SETTABLE_32;
120 frame->tf_spsr |= regs->x[16] & PSR_SETTABLE_32;
121 /* Don't allow userspace to ask to continue single stepping.
122 * The SPSR.SS field doesn't exist when the EL1 is AArch32.
123 * As the SPSR.DIT field has moved in its place don't
124 * allow userspace to set the SPSR.SS field.
125 */
126 } else
127 #endif
128 {
129 frame->tf_elr = regs->elr;
130 /*
131 * frame->tf_spsr and regs->spsr on FreeBSD 13 was 32-bit
132 * where from 14 they are 64 bit. As PSR_SETTABLE_64 clears
133 * the upper 32 bits no compatibility handling is needed,
134 * however if this is ever not the case we will need to add
135 * these, similar to how it is done in set_mcontext.
136 */
137 frame->tf_spsr &= ~PSR_SETTABLE_64;
138 frame->tf_spsr |= regs->spsr & PSR_SETTABLE_64;
139 /* Enable single stepping if userspace asked fot it */
140 if ((frame->tf_spsr & PSR_SS) != 0) {
141 td->td_pcb->pcb_flags |= PCB_SINGLE_STEP;
142
143 WRITE_SPECIALREG(mdscr_el1,
144 READ_SPECIALREG(mdscr_el1) | MDSCR_SS);
145 isb();
146 }
147 }
148 return (0);
149 }
150
151 int
fill_fpregs(struct thread * td,struct fpreg * regs)152 fill_fpregs(struct thread *td, struct fpreg *regs)
153 {
154 #ifdef VFP
155 struct pcb *pcb;
156
157 pcb = td->td_pcb;
158 if ((pcb->pcb_fpflags & PCB_FP_STARTED) != 0) {
159 /*
160 * If we have just been running VFP instructions we will
161 * need to save the state to memcpy it below.
162 */
163 if (td == curthread)
164 vfp_save_state(td, pcb);
165 }
166
167 KASSERT(pcb->pcb_fpusaved == &pcb->pcb_fpustate,
168 ("Called fill_fpregs while the kernel is using the VFP"));
169 memcpy(regs->fp_q, pcb->pcb_fpustate.vfp_regs,
170 sizeof(regs->fp_q));
171 regs->fp_cr = pcb->pcb_fpustate.vfp_fpcr;
172 regs->fp_sr = pcb->pcb_fpustate.vfp_fpsr;
173 #else
174 memset(regs, 0, sizeof(*regs));
175 #endif
176 return (0);
177 }
178
179 int
set_fpregs(struct thread * td,struct fpreg * regs)180 set_fpregs(struct thread *td, struct fpreg *regs)
181 {
182 #ifdef VFP
183 struct pcb *pcb;
184
185 pcb = td->td_pcb;
186 KASSERT(pcb->pcb_fpusaved == &pcb->pcb_fpustate,
187 ("Called set_fpregs while the kernel is using the VFP"));
188 memcpy(pcb->pcb_fpustate.vfp_regs, regs->fp_q, sizeof(regs->fp_q));
189 pcb->pcb_fpustate.vfp_fpcr = regs->fp_cr;
190 pcb->pcb_fpustate.vfp_fpsr = regs->fp_sr;
191 #endif
192 return (0);
193 }
194
195 int
fill_dbregs(struct thread * td,struct dbreg * regs)196 fill_dbregs(struct thread *td, struct dbreg *regs)
197 {
198 struct debug_monitor_state *monitor;
199 uint64_t dfr0;
200 int i;
201 uint8_t debug_ver, nbkpts, nwtpts;
202
203 memset(regs, 0, sizeof(*regs));
204
205 /*
206 * Read these the Debug Feature Register 0 to get info we need.
207 * It will be identical on FreeBSD and Linux, so there is no need
208 * to check which the target is.
209 */
210 if (!get_user_reg(ID_AA64DFR0_EL1, &dfr0, true)) {
211 debug_ver = ID_AA64DFR0_DebugVer_8;
212 nbkpts = 0;
213 nwtpts = 0;
214 } else {
215 debug_ver = ID_AA64DFR0_DebugVer_VAL(dfr0) >>
216 ID_AA64DFR0_DebugVer_SHIFT;
217 nbkpts = ID_AA64DFR0_BRPs_VAL(dfr0) >> ID_AA64DFR0_BRPs_SHIFT;
218 nwtpts = ID_AA64DFR0_WRPs_VAL(dfr0) >> ID_AA64DFR0_WRPs_SHIFT;
219 }
220
221 /*
222 * The BRPs field contains the number of breakpoints - 1. Armv8-A
223 * allows the hardware to provide 2-16 breakpoints so this won't
224 * overflow an 8 bit value. The same applies to the WRPs field.
225 */
226 nbkpts++;
227 nwtpts++;
228
229 regs->db_debug_ver = debug_ver;
230 regs->db_nbkpts = nbkpts;
231 regs->db_nwtpts = nwtpts;
232
233 monitor = &td->td_pcb->pcb_dbg_regs;
234 if ((monitor->dbg_flags & DBGMON_ENABLED) != 0) {
235 for (i = 0; i < nbkpts; i++) {
236 regs->db_breakregs[i].dbr_addr = monitor->dbg_bvr[i];
237 regs->db_breakregs[i].dbr_ctrl = monitor->dbg_bcr[i];
238 }
239 for (i = 0; i < nwtpts; i++) {
240 regs->db_watchregs[i].dbw_addr = monitor->dbg_wvr[i];
241 regs->db_watchregs[i].dbw_ctrl = monitor->dbg_wcr[i];
242 }
243 }
244
245 return (0);
246 }
247
248 int
set_dbregs(struct thread * td,struct dbreg * regs)249 set_dbregs(struct thread *td, struct dbreg *regs)
250 {
251 struct debug_monitor_state *monitor;
252 uint64_t addr;
253 uint32_t ctrl;
254 int i;
255
256 monitor = &td->td_pcb->pcb_dbg_regs;
257 monitor->dbg_enable_count = 0;
258
259 for (i = 0; i < DBG_BRP_MAX; i++) {
260 addr = regs->db_breakregs[i].dbr_addr;
261 ctrl = regs->db_breakregs[i].dbr_ctrl;
262
263 /*
264 * Don't let the user set a breakpoint on a kernel or
265 * non-canonical user address.
266 */
267 if (addr >= VM_MAXUSER_ADDRESS)
268 return (EINVAL);
269
270 /*
271 * The lowest 2 bits are ignored, so record the effective
272 * address.
273 */
274 addr = rounddown2(addr, 4);
275
276 /*
277 * Some control fields are ignored, and other bits reserved.
278 * Only unlinked, address-matching breakpoints are supported.
279 *
280 * XXX: fields that appear unvalidated, such as BAS, have
281 * constrained undefined behaviour. If the user mis-programs
282 * these, there is no risk to the system.
283 */
284 ctrl &= DBGBCR_EN | DBGBCR_PMC | DBGBCR_BAS;
285 if ((ctrl & DBGBCR_EN) != 0) {
286 /* Only target EL0. */
287 if ((ctrl & DBGBCR_PMC) != DBGBCR_PMC_EL0)
288 return (EINVAL);
289
290 monitor->dbg_enable_count++;
291 }
292
293 monitor->dbg_bvr[i] = addr;
294 monitor->dbg_bcr[i] = ctrl;
295 }
296
297 for (i = 0; i < DBG_WRP_MAX; i++) {
298 addr = regs->db_watchregs[i].dbw_addr;
299 ctrl = regs->db_watchregs[i].dbw_ctrl;
300
301 /*
302 * Don't let the user set a watchpoint on a kernel or
303 * non-canonical user address.
304 */
305 if (addr >= VM_MAXUSER_ADDRESS)
306 return (EINVAL);
307
308 /*
309 * Some control fields are ignored, and other bits reserved.
310 * Only unlinked watchpoints are supported.
311 */
312 ctrl &= DBGWCR_EN | DBGWCR_PAC | DBGWCR_LSC | DBGWCR_BAS |
313 DBGWCR_MASK;
314
315 if ((ctrl & DBGWCR_EN) != 0) {
316 /* Only target EL0. */
317 if ((ctrl & DBGWCR_PAC) != DBGWCR_PAC_EL0)
318 return (EINVAL);
319
320 /* Must set at least one of the load/store bits. */
321 if ((ctrl & DBGWCR_LSC) == 0)
322 return (EINVAL);
323
324 /*
325 * When specifying the address range with BAS, the MASK
326 * field must be zero.
327 */
328 if ((ctrl & DBGWCR_BAS) != DBGWCR_BAS &&
329 (ctrl & DBGWCR_MASK) != 0)
330 return (EINVAL);
331
332 monitor->dbg_enable_count++;
333 }
334 monitor->dbg_wvr[i] = addr;
335 monitor->dbg_wcr[i] = ctrl;
336 }
337
338 if (monitor->dbg_enable_count > 0)
339 monitor->dbg_flags |= DBGMON_ENABLED;
340
341 return (0);
342 }
343
344 #ifdef COMPAT_FREEBSD32
345 int
fill_regs32(struct thread * td,struct reg32 * regs)346 fill_regs32(struct thread *td, struct reg32 *regs)
347 {
348 int i;
349 struct trapframe *tf;
350
351 tf = td->td_frame;
352 for (i = 0; i < 13; i++)
353 regs->r[i] = tf->tf_x[i];
354 /* For arm32, SP is r13 and LR is r14 */
355 regs->r_sp = tf->tf_x[13];
356 regs->r_lr = tf->tf_x[14];
357 regs->r_pc = tf->tf_elr;
358 regs->r_cpsr = tf->tf_spsr;
359
360 return (0);
361 }
362
363 int
set_regs32(struct thread * td,struct reg32 * regs)364 set_regs32(struct thread *td, struct reg32 *regs)
365 {
366 int i;
367 struct trapframe *tf;
368
369 tf = td->td_frame;
370 for (i = 0; i < 13; i++)
371 tf->tf_x[i] = regs->r[i];
372 /* For arm 32, SP is r13 an LR is r14 */
373 tf->tf_x[13] = regs->r_sp;
374 tf->tf_x[14] = regs->r_lr;
375 tf->tf_elr = regs->r_pc;
376 tf->tf_spsr &= ~PSR_SETTABLE_32;
377 tf->tf_spsr |= regs->r_cpsr & PSR_SETTABLE_32;
378
379 return (0);
380 }
381
382 /* XXX fill/set dbregs/fpregs are stubbed on 32-bit arm. */
383 int
fill_fpregs32(struct thread * td,struct fpreg32 * regs)384 fill_fpregs32(struct thread *td, struct fpreg32 *regs)
385 {
386
387 memset(regs, 0, sizeof(*regs));
388 return (0);
389 }
390
391 int
set_fpregs32(struct thread * td,struct fpreg32 * regs)392 set_fpregs32(struct thread *td, struct fpreg32 *regs)
393 {
394
395 return (0);
396 }
397
398 int
fill_dbregs32(struct thread * td,struct dbreg32 * regs)399 fill_dbregs32(struct thread *td, struct dbreg32 *regs)
400 {
401
402 memset(regs, 0, sizeof(*regs));
403 return (0);
404 }
405
406 int
set_dbregs32(struct thread * td,struct dbreg32 * regs)407 set_dbregs32(struct thread *td, struct dbreg32 *regs)
408 {
409
410 return (0);
411 }
412 #endif
413
414 void
exec_setregs(struct thread * td,struct image_params * imgp,uintptr_t stack)415 exec_setregs(struct thread *td, struct image_params *imgp, uintptr_t stack)
416 {
417 struct trapframe *tf = td->td_frame;
418 struct pcb *pcb = td->td_pcb;
419 uint64_t new_tcr, tcr;
420
421 memset(tf, 0, sizeof(struct trapframe));
422
423 tf->tf_x[0] = stack;
424 tf->tf_sp = STACKALIGN(stack);
425 tf->tf_lr = imgp->entry_addr;
426 tf->tf_elr = imgp->entry_addr;
427
428 td->td_pcb->pcb_tpidr_el0 = 0;
429 td->td_pcb->pcb_tpidrro_el0 = 0;
430 WRITE_SPECIALREG(tpidrro_el0, 0);
431 WRITE_SPECIALREG(tpidr_el0, 0);
432
433 #ifdef VFP
434 vfp_reset_state(td, pcb);
435 #endif
436
437 /*
438 * Clear debug register state. It is not applicable to the new process.
439 */
440 bzero(&pcb->pcb_dbg_regs, sizeof(pcb->pcb_dbg_regs));
441
442 /* If the process is new enough enable TBI */
443 if (td->td_proc->p_osrel >= TBI_VERSION)
444 new_tcr = TCR_TBI0;
445 else
446 new_tcr = 0;
447 td->td_proc->p_md.md_tcr = new_tcr;
448
449 /* TODO: should create a pmap function for this... */
450 tcr = READ_SPECIALREG(tcr_el1);
451 if ((tcr & MD_TCR_FIELDS) != new_tcr) {
452 uint64_t asid;
453
454 tcr &= ~MD_TCR_FIELDS;
455 tcr |= new_tcr;
456 WRITE_SPECIALREG(tcr_el1, tcr);
457 isb();
458
459 /*
460 * TCR_EL1.TBI0 is permitted to be cached in the TLB, so
461 * we need to perform a TLB invalidation.
462 */
463 asid = READ_SPECIALREG(ttbr0_el1) & TTBR_ASID_MASK;
464 __asm __volatile(
465 "tlbi aside1is, %0 \n"
466 "dsb ish \n"
467 "isb \n"
468 : : "r" (asid));
469 }
470
471 /* Generate new pointer authentication keys */
472 ptrauth_exec(td);
473 }
474
475 /* Sanity check these are the same size, they will be memcpy'd to and from */
476 CTASSERT(sizeof(((struct trapframe *)0)->tf_x) ==
477 sizeof((struct gpregs *)0)->gp_x);
478 CTASSERT(sizeof(((struct trapframe *)0)->tf_x) ==
479 sizeof((struct reg *)0)->x);
480
481 int
get_mcontext(struct thread * td,mcontext_t * mcp,int clear_ret)482 get_mcontext(struct thread *td, mcontext_t *mcp, int clear_ret)
483 {
484 struct trapframe *tf = td->td_frame;
485
486 if (clear_ret & GET_MC_CLEAR_RET) {
487 mcp->mc_gpregs.gp_x[0] = 0;
488 mcp->mc_gpregs.gp_spsr = tf->tf_spsr & ~PSR_C;
489 } else {
490 mcp->mc_gpregs.gp_x[0] = tf->tf_x[0];
491 mcp->mc_gpregs.gp_spsr = tf->tf_spsr;
492 }
493
494 memcpy(&mcp->mc_gpregs.gp_x[1], &tf->tf_x[1],
495 sizeof(mcp->mc_gpregs.gp_x[1]) * (nitems(mcp->mc_gpregs.gp_x) - 1));
496
497 mcp->mc_gpregs.gp_sp = tf->tf_sp;
498 mcp->mc_gpregs.gp_lr = tf->tf_lr;
499 mcp->mc_gpregs.gp_elr = tf->tf_elr;
500 get_fpcontext(td, mcp);
501
502 return (0);
503 }
504
505 int
set_mcontext(struct thread * td,mcontext_t * mcp)506 set_mcontext(struct thread *td, mcontext_t *mcp)
507 {
508 #define PSR_13_MASK 0xfffffffful
509 struct arm64_reg_context ctx;
510 struct trapframe *tf = td->td_frame;
511 struct pcb *pcb;
512 uint64_t spsr;
513 vm_offset_t addr;
514 int error, seen_types;
515 bool done;
516
517 spsr = mcp->mc_gpregs.gp_spsr;
518 #ifdef COMPAT_FREEBSD13
519 if (td->td_proc->p_osrel < P_OSREL_ARM64_SPSR) {
520 /*
521 * Before FreeBSD 14 gp_spsr was 32 bit. The size of mc_gpregs
522 * was identical because of padding so mask of the upper bits
523 * that may be invalid on earlier releases.
524 */
525 spsr &= PSR_13_MASK;
526 }
527 #endif
528
529 if ((spsr & PSR_M_MASK) != PSR_M_EL0t ||
530 (spsr & PSR_AARCH32) != 0 ||
531 (spsr & PSR_DAIF) != (td->td_frame->tf_spsr & PSR_DAIF))
532 return (EINVAL);
533
534 memcpy(tf->tf_x, mcp->mc_gpregs.gp_x, sizeof(tf->tf_x));
535
536 tf->tf_sp = mcp->mc_gpregs.gp_sp;
537 tf->tf_lr = mcp->mc_gpregs.gp_lr;
538 tf->tf_elr = mcp->mc_gpregs.gp_elr;
539 #ifdef COMPAT_FREEBSD13
540 if (td->td_proc->p_osrel < P_OSREL_ARM64_SPSR) {
541 /* Keep the upper 32 bits of spsr on older releases */
542 tf->tf_spsr &= ~PSR_13_MASK;
543 tf->tf_spsr |= spsr;
544 } else
545 #endif
546 tf->tf_spsr = spsr;
547 if ((tf->tf_spsr & PSR_SS) != 0) {
548 td->td_pcb->pcb_flags |= PCB_SINGLE_STEP;
549
550 WRITE_SPECIALREG(mdscr_el1,
551 READ_SPECIALREG(mdscr_el1) | MDSCR_SS);
552 isb();
553 }
554
555 set_fpcontext(td, mcp);
556
557 /* Read any register contexts we find */
558 if (mcp->mc_ptr != 0) {
559 addr = mcp->mc_ptr;
560 pcb = td->td_pcb;
561
562 #define CTX_TYPE_FLAG_SVE (1 << 0)
563
564 seen_types = 0;
565 done = false;
566 do {
567 if (!__is_aligned(addr,
568 _Alignof(struct arm64_reg_context)))
569 return (EINVAL);
570
571 error = copyin((const void *)addr, &ctx, sizeof(ctx));
572 if (error != 0)
573 return (error);
574
575 switch (ctx.ctx_id) {
576 #ifdef VFP
577 case ARM64_CTX_SVE: {
578 struct sve_context sve_ctx;
579 size_t buf_size;
580
581 if ((seen_types & CTX_TYPE_FLAG_SVE) != 0)
582 return (EINVAL);
583 seen_types |= CTX_TYPE_FLAG_SVE;
584
585 if (pcb->pcb_svesaved == NULL)
586 return (EINVAL);
587
588 /* XXX: Check pcb_svesaved is valid */
589
590 buf_size = sve_buf_size(td);
591 /* Check the size is valid */
592 if (ctx.ctx_size != CTX_SIZE_SVE(buf_size))
593 return (EINVAL);
594
595 memset(pcb->pcb_svesaved, 0,
596 sve_max_buf_size());
597
598 /* Copy the SVE registers from userspace */
599 if (copyin((void *)(addr + sizeof(sve_ctx)),
600 pcb->pcb_svesaved, buf_size) != 0)
601 return (EINVAL);
602
603 pcb->pcb_fpflags |= PCB_FP_SVEVALID;
604 break;
605 }
606 #endif
607 case ARM64_CTX_END:
608 done = true;
609 break;
610 default:
611 return (EINVAL);
612 }
613
614 addr += ctx.ctx_size;
615 } while (!done);
616
617 #undef CTX_TYPE_FLAG_SVE
618 }
619
620 return (0);
621 #undef PSR_13_MASK
622 }
623
624 static void
get_fpcontext(struct thread * td,mcontext_t * mcp)625 get_fpcontext(struct thread *td, mcontext_t *mcp)
626 {
627 #ifdef VFP
628 struct pcb *curpcb;
629
630 MPASS(td == curthread);
631
632 curpcb = curthread->td_pcb;
633 if ((curpcb->pcb_fpflags & PCB_FP_STARTED) != 0) {
634 /*
635 * If we have just been running VFP instructions we will
636 * need to save the state to memcpy it below.
637 */
638 vfp_save_state(td, curpcb);
639 }
640
641 KASSERT(curpcb->pcb_fpusaved == &curpcb->pcb_fpustate,
642 ("Called get_fpcontext while the kernel is using the VFP"));
643 KASSERT((curpcb->pcb_fpflags & ~PCB_FP_USERMASK) == 0,
644 ("Non-userspace FPU flags set in get_fpcontext"));
645 memcpy(mcp->mc_fpregs.fp_q, curpcb->pcb_fpustate.vfp_regs,
646 sizeof(mcp->mc_fpregs.fp_q));
647 mcp->mc_fpregs.fp_cr = curpcb->pcb_fpustate.vfp_fpcr;
648 mcp->mc_fpregs.fp_sr = curpcb->pcb_fpustate.vfp_fpsr;
649 mcp->mc_fpregs.fp_flags = curpcb->pcb_fpflags;
650 mcp->mc_flags |= _MC_FP_VALID;
651 #endif
652 }
653
654 static void
set_fpcontext(struct thread * td,mcontext_t * mcp)655 set_fpcontext(struct thread *td, mcontext_t *mcp)
656 {
657 #ifdef VFP
658 struct pcb *curpcb;
659
660 MPASS(td == curthread);
661 if ((mcp->mc_flags & _MC_FP_VALID) != 0) {
662 curpcb = curthread->td_pcb;
663
664 /*
665 * Discard any vfp state for the current thread, we
666 * are about to override it.
667 */
668 critical_enter();
669 vfp_discard(td);
670 critical_exit();
671
672 KASSERT(curpcb->pcb_fpusaved == &curpcb->pcb_fpustate,
673 ("Called set_fpcontext while the kernel is using the VFP"));
674 memcpy(curpcb->pcb_fpustate.vfp_regs, mcp->mc_fpregs.fp_q,
675 sizeof(mcp->mc_fpregs.fp_q));
676 curpcb->pcb_fpustate.vfp_fpcr = mcp->mc_fpregs.fp_cr;
677 curpcb->pcb_fpustate.vfp_fpsr = mcp->mc_fpregs.fp_sr;
678 curpcb->pcb_fpflags = mcp->mc_fpregs.fp_flags & PCB_FP_STARTED;
679 }
680 #endif
681 }
682
683 int
sys_sigreturn(struct thread * td,struct sigreturn_args * uap)684 sys_sigreturn(struct thread *td, struct sigreturn_args *uap)
685 {
686 ucontext_t uc;
687 int error;
688
689 if (copyin(uap->sigcntxp, &uc, sizeof(uc)))
690 return (EFAULT);
691
692 /* Stop an interrupt from causing the sve state to be dropped */
693 td->td_sa.code = -1;
694 error = set_mcontext(td, &uc.uc_mcontext);
695 if (error != 0)
696 return (error);
697
698 /*
699 * Sync the VFP and SVE registers. To be backwards compatible we
700 * use the VFP registers to restore the lower bits of the SVE
701 * register it aliases.
702 */
703 vfp_to_sve_sync(td);
704
705 /* Restore signal mask. */
706 kern_sigprocmask(td, SIG_SETMASK, &uc.uc_sigmask, NULL, 0);
707
708 return (EJUSTRETURN);
709 }
710
711 static bool
sendsig_ctx_end(struct thread * td,vm_offset_t * addrp)712 sendsig_ctx_end(struct thread *td, vm_offset_t *addrp)
713 {
714 struct arm64_reg_context end_ctx;
715 vm_offset_t ctx_addr;
716
717 *addrp -= sizeof(end_ctx);
718 ctx_addr = *addrp;
719
720 memset(&end_ctx, 0, sizeof(end_ctx));
721 end_ctx.ctx_id = ARM64_CTX_END;
722 end_ctx.ctx_size = sizeof(end_ctx);
723
724 if (copyout(&end_ctx, (void *)ctx_addr, sizeof(end_ctx)) != 0)
725 return (false);
726
727 return (true);
728 }
729
730 static bool
sendsig_ctx_sve(struct thread * td,vm_offset_t * addrp)731 sendsig_ctx_sve(struct thread *td, vm_offset_t *addrp)
732 {
733 struct sve_context ctx;
734 struct pcb *pcb;
735 size_t buf_size, ctx_size;
736 vm_offset_t ctx_addr;
737
738 pcb = td->td_pcb;
739 /* Do nothing if sve hasn't started */
740 if (pcb->pcb_svesaved == NULL)
741 return (true);
742
743 MPASS(pcb->pcb_svesaved != NULL);
744
745 buf_size = sve_buf_size(td);
746 ctx_size = CTX_SIZE_SVE(buf_size);
747
748 /* Address for the full context */
749 *addrp -= ctx_size;
750 ctx_addr = *addrp;
751
752 memset(&ctx, 0, sizeof(ctx));
753 ctx.sve_ctx.ctx_id = ARM64_CTX_SVE;
754 ctx.sve_ctx.ctx_size = ctx_size;
755 ctx.sve_vector_len = pcb->pcb_sve_len;
756 ctx.sve_flags = 0;
757
758 /* Copy out the header and data */
759 if (copyout(&ctx, (void *)ctx_addr, sizeof(ctx)) != 0)
760 return (false);
761 if (copyout(pcb->pcb_svesaved, (void *)(ctx_addr + sizeof(ctx)),
762 buf_size) != 0)
763 return (false);
764
765 return (true);
766 }
767
768 typedef bool(*ctx_func)(struct thread *, vm_offset_t *);
769 static const ctx_func ctx_funcs[] = {
770 sendsig_ctx_end, /* Must be first to end the linked list */
771 sendsig_ctx_sve,
772 NULL,
773 };
774
775 void
sendsig(sig_t catcher,ksiginfo_t * ksi,sigset_t * mask)776 sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
777 {
778 struct thread *td;
779 struct proc *p;
780 struct trapframe *tf;
781 struct sigframe *fp, frame;
782 struct sigacts *psp;
783 vm_offset_t addr;
784 int onstack, sig;
785
786 td = curthread;
787 p = td->td_proc;
788 PROC_LOCK_ASSERT(p, MA_OWNED);
789
790 sig = ksi->ksi_signo;
791 psp = p->p_sigacts;
792 mtx_assert(&psp->ps_mtx, MA_OWNED);
793
794 tf = td->td_frame;
795 onstack = sigonstack(tf->tf_sp);
796
797 CTR4(KTR_SIG, "sendsig: td=%p (%s) catcher=%p sig=%d", td, p->p_comm,
798 catcher, sig);
799
800 /* Allocate and validate space for the signal handler context. */
801 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !onstack &&
802 SIGISMEMBER(psp->ps_sigonstack, sig)) {
803 addr = ((uintptr_t)td->td_sigstk.ss_sp +
804 td->td_sigstk.ss_size);
805 #if defined(COMPAT_43)
806 td->td_sigstk.ss_flags |= SS_ONSTACK;
807 #endif
808 } else {
809 addr = td->td_frame->tf_sp;
810 }
811
812 /* Fill in the frame to copy out */
813 bzero(&frame, sizeof(frame));
814 get_mcontext(td, &frame.sf_uc.uc_mcontext, 0);
815 frame.sf_si = ksi->ksi_info;
816 frame.sf_uc.uc_sigmask = *mask;
817 frame.sf_uc.uc_stack = td->td_sigstk;
818 frame.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK) != 0 ?
819 (onstack ? SS_ONSTACK : 0) : SS_DISABLE;
820 mtx_unlock(&psp->ps_mtx);
821 PROC_UNLOCK(td->td_proc);
822
823 for (int i = 0; ctx_funcs[i] != NULL; i++) {
824 if (!ctx_funcs[i](td, &addr)) {
825 /* Process has trashed its stack. Kill it. */
826 CTR4(KTR_SIG,
827 "sendsig: frame sigexit td=%p fp=%#lx func[%d]=%p",
828 td, addr, i, ctx_funcs[i]);
829 PROC_LOCK(p);
830 sigexit(td, SIGILL);
831 /* NOTREACHED */
832 }
833 }
834
835 /* Point at the first context */
836 frame.sf_uc.uc_mcontext.mc_ptr = addr;
837
838 /* Make room, keeping the stack aligned */
839 fp = (struct sigframe *)addr;
840 fp--;
841 fp = STACKALIGN(fp);
842
843 /* Copy the sigframe out to the user's stack. */
844 if (copyout(&frame, fp, sizeof(*fp)) != 0) {
845 /* Process has trashed its stack. Kill it. */
846 CTR2(KTR_SIG, "sendsig: sigexit td=%p fp=%p", td, fp);
847 PROC_LOCK(p);
848 sigexit(td, SIGILL);
849 }
850
851 tf->tf_x[0] = sig;
852 tf->tf_x[1] = (register_t)&fp->sf_si;
853 tf->tf_x[2] = (register_t)&fp->sf_uc;
854 tf->tf_x[8] = (register_t)catcher;
855 tf->tf_sp = (register_t)fp;
856 tf->tf_elr = (register_t)PROC_SIGCODE(p);
857
858 /* Clear the single step flag while in the signal handler */
859 if ((td->td_pcb->pcb_flags & PCB_SINGLE_STEP) != 0) {
860 td->td_pcb->pcb_flags &= ~PCB_SINGLE_STEP;
861 WRITE_SPECIALREG(mdscr_el1,
862 READ_SPECIALREG(mdscr_el1) & ~MDSCR_SS);
863 isb();
864 }
865
866 CTR3(KTR_SIG, "sendsig: return td=%p pc=%#x sp=%#x", td, tf->tf_elr,
867 tf->tf_sp);
868
869 PROC_LOCK(p);
870 mtx_lock(&psp->ps_mtx);
871 }
872