xref: /src/sys/amd64/amd64/cpu_switch.S (revision 377c053a43f347588ce6800627adb634f87f8cf9)
1/*-
2 * Copyright (c) 2003 Peter Wemm.
3 * Copyright (c) 1990 The Regents of the University of California.
4 * All rights reserved.
5 *
6 * This code is derived from software contributed to Berkeley by
7 * William Jolitz.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 *    notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 *    notice, this list of conditions and the following disclaimer in the
16 *    documentation and/or other materials provided with the distribution.
17 * 3. Neither the name of the University nor the names of its contributors
18 *    may be used to endorse or promote products derived from this software
19 *    without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 */
33
34#include <machine/asmacros.h>
35#include <machine/specialreg.h>
36
37#include "assym.inc"
38
39/*****************************************************************************/
40/* Scheduling                                                                */
41/*****************************************************************************/
42
43	.text
44
45/*
46 * cpu_throw()
47 *
48 * This is the second half of cpu_switch(). It is used when the current
49 * thread is either a dummy or slated to die, and we no longer care
50 * about its state.  This is only a slight optimization and is probably
51 * not worth it anymore.  Note that we need to clear the pm_active bits so
52 * we do need the old proc if it still exists.
53 * %rdi = oldtd
54 * %rsi = newtd
55 */
56ENTRY(cpu_throw)
57	movq	%rsi,%r12
58	movq	%rsi,%rdi
59	call	pmap_activate_sw
60	jmp	sw1
61END(cpu_throw)
62
63/*
64 * cpu_switch(old, new, mtx)
65 *
66 * Save the current thread state, then select the next thread to run
67 * and load its state.
68 * %rdi = oldtd
69 * %rsi = newtd
70 * %rdx = mtx
71 */
72ENTRY(cpu_switch)
73	/* Switch to new thread.  First, save context. */
74	leaq	TD_MD_PCB(%rdi),%r8
75
76	movq	(%rsp),%rax			/* Hardware registers */
77	movq	%r15,PCB_R15(%r8)
78	movq	%r14,PCB_R14(%r8)
79	movq	%r13,PCB_R13(%r8)
80	movq	%r12,PCB_R12(%r8)
81	movq	%rbp,PCB_RBP(%r8)
82	movq	%rsp,PCB_RSP(%r8)
83	movq	%rbx,PCB_RBX(%r8)
84	movq	%rax,PCB_RIP(%r8)
85
86	testl	$PCB_FULL_IRET,PCB_FLAGS(%r8)
87	jnz	2f
88	orl	$PCB_FULL_IRET,PCB_FLAGS(%r8)
89	testl	$TDP_KTHREAD,TD_PFLAGS(%rdi)
90	jnz	2f
91	testb	$CPUID_STDEXT_FSGSBASE,cpu_stdext_feature(%rip)
92	jz	2f
93	rdfsbase %rax
94	movq	%rax,PCB_FSBASE(%r8)
95	movq	%rdx,%r12
96	movl	$MSR_KGSBASE,%ecx		/* Read user gs base */
97	rdmsr
98	shlq	$32,%rdx
99	orq	%rdx,%rax
100	movq	%rax,PCB_GSBASE(%r8)
101	movq	%r12,%rdx
102
1032:
104	testl	$PCB_DBREGS,PCB_FLAGS(%r8)
105	jnz	store_dr			/* static predict not taken */
106done_store_dr:
107
108	/* have we used fp, and need a save? */
109	cmpq	%rdi,PCPU(FPCURTHREAD)
110	jne	ctx_switch_fpusave_done
111	movq	PCB_SAVEFPU(%r8),%r9
112	clts
113	cmpl	$0,use_xsave(%rip)
114	jne	1f
115	fxsave	(%r9)
116	jmp	ctx_switch_fpusave_done
1171:	movq	%rdx,%rcx
118	movl	xsave_mask,%eax
119	movl	xsave_mask+4,%edx
120	testl	$PCB_32BIT,PCB_FLAGS(%r8)
121	jne	ctx_switch_xsave32
122	.globl	ctx_switch_xsave
123ctx_switch_xsave:
124	/* This is patched to xsaveopt if supported, see fpuinit_bsp1() */
125	xsave64	(%r9)
126ctx_switch_xsave_done:
127	movq	%rcx,%rdx
128ctx_switch_fpusave_done:
129	/* Save is done.  Now fire up new thread. Leave old vmspace. */
130	movq	%rsi,%r12
131	movq	%rdi,%r13
132	movq	%rdx,%r15
133	movq	%rsi,%rdi
134	callq	pmap_activate_sw
135	movq	%r15,TD_LOCK(%r13)		/* Release the old thread */
136sw1:
137	leaq	TD_MD_PCB(%r12),%r8
138	movq	$blocked_lock, %rdx
139	movq	TD_LOCK(%r12),%rcx
140	cmpq	%rcx, %rdx
141	je	sw1wait
142sw1cont:
143	/*
144	 * At this point, we've switched address spaces and are ready
145	 * to load up the rest of the next context.
146	 */
147
148	/* Skip loading LDT and user fsbase/gsbase for kthreads */
149	testl	$TDP_KTHREAD,TD_PFLAGS(%r12)
150	jnz	do_kthread
151
152	/*
153	 * Load ldt register
154	 */
155	movq	TD_PROC(%r12),%rcx
156	cmpq	$0, P_MD+MD_LDT(%rcx)
157	jne	do_ldt
158	xorl	%eax,%eax
159ld_ldt:	lldt	%ax
160
161	/* Restore fs base in GDT */
162	movl	PCB_FSBASE(%r8),%eax
163	movq	PCPU(FS32P),%rdx
164	movw	%ax,2(%rdx)
165	shrl	$16,%eax
166	movb	%al,4(%rdx)
167	shrl	$8,%eax
168	movb	%al,7(%rdx)
169
170	/* Restore gs base in GDT */
171	movl	PCB_GSBASE(%r8),%eax
172	movq	PCPU(GS32P),%rdx
173	movw	%ax,2(%rdx)
174	shrl	$16,%eax
175	movb	%al,4(%rdx)
176	shrl	$8,%eax
177	movb	%al,7(%rdx)
178
179do_kthread:
180	/* Do we need to reload tss ? */
181	movq	PCPU(TSSP),%rax
182	movq	PCB_TSSP(%r8),%rdx
183	movq	PCPU(PRVSPACE),%r13
184	addq	$PC_COMMONTSS,%r13
185	testq	%rdx,%rdx
186	cmovzq	%r13,%rdx
187	cmpq	%rax,%rdx
188	jne	do_tss
189done_tss:
190	movq	TD_MD_STACK_BASE(%r12),%r9
191	movq	%r9,PCPU(RSP0)
192	movq	%r8,PCPU(CURPCB)
193	movq	PCPU(PTI_RSP0),%rax
194	cmpq	$~0,PCPU(UCR3)
195	cmove	%r9,%rax
196	movq	%rax,TSS_RSP0(%rdx)
197	movq	%r12,PCPU(CURTHREAD)		/* into next thread */
198
199	/* Test if debug registers should be restored. */
200	testl	$PCB_DBREGS,PCB_FLAGS(%r8)
201	jnz	load_dr				/* static predict not taken */
202done_load_dr:
203
204	/* Restore context. */
205	movq	PCB_R15(%r8),%r15
206	movq	PCB_R14(%r8),%r14
207	movq	PCB_R13(%r8),%r13
208	movq	PCB_R12(%r8),%r12
209	movq	PCB_RBP(%r8),%rbp
210	movq	PCB_RSP(%r8),%rsp
211	movq	PCB_RBX(%r8),%rbx
212	movq	PCB_RIP(%r8),%rax
213	movq	%rax,(%rsp)
214	movq	PCPU(CURTHREAD),%rdi
215	call	fpu_activate_sw
216	cmpb	$0,cpu_flush_rsb_ctxsw(%rip)
217	jne	rsb_flush
218	ret
219
220	/*
221	 * We order these strangely for several reasons.
222	 * 1: I wanted to use static branch prediction hints
223	 * 2: Most athlon64/opteron cpus don't have them.  They define
224	 *    a forward branch as 'predict not taken'.  Intel cores have
225	 *    the 'rep' prefix to invert this.
226	 * So, to make it work on both forms of cpu we do the detour.
227	 * We use jumps rather than call in order to avoid the stack.
228	 */
229
230store_dr:
231	movq	%dr7,%rax			/* yes, do the save */
232	movq	%dr0,%r15
233	movq	%dr1,%r14
234	movq	%dr2,%r13
235	movq	%dr3,%r12
236	movq	%dr6,%r11
237	movq	%r15,PCB_DR0(%r8)
238	movq	%r14,PCB_DR1(%r8)
239	movq	%r13,PCB_DR2(%r8)
240	movq	%r12,PCB_DR3(%r8)
241	movq	%r11,PCB_DR6(%r8)
242	movq	%rax,PCB_DR7(%r8)
243	andq	$0x0000fc00, %rax		/* disable all watchpoints */
244	movq	%rax,%dr7
245	jmp	done_store_dr
246
247load_dr:
248	movq	%dr7,%rax
249	movq	PCB_DR0(%r8),%r15
250	movq	PCB_DR1(%r8),%r14
251	movq	PCB_DR2(%r8),%r13
252	movq	PCB_DR3(%r8),%r12
253	movq	PCB_DR6(%r8),%r11
254	movq	PCB_DR7(%r8),%rcx
255	movq	%r15,%dr0
256	movq	%r14,%dr1
257	/* Preserve reserved bits in %dr7 */
258	andq	$0x0000fc00,%rax
259	andq	$~0x0000fc00,%rcx
260	movq	%r13,%dr2
261	movq	%r12,%dr3
262	orq	%rcx,%rax
263	movq	%r11,%dr6
264	movq	%rax,%dr7
265	jmp	done_load_dr
266
267do_tss:	movq	%rdx,PCPU(TSSP)
268	movq	%rdx,%rcx
269	movq	PCPU(TSS),%rax
270	movw	%cx,2(%rax)
271	shrq	$16,%rcx
272	movb	%cl,4(%rax)
273	shrq	$8,%rcx
274	movb	%cl,7(%rax)
275	shrq	$8,%rcx
276	movl	%ecx,8(%rax)
277	movb	$0x89,5(%rax)	/* unset busy */
278	movl	$TSSSEL,%eax
279	ltr	%ax
280	jmp	done_tss
281
282do_ldt:	movq	PCPU(LDT),%rax
283	movq	P_MD+MD_LDT_SD(%rcx),%rdx
284	movq	%rdx,(%rax)
285	movq	P_MD+MD_LDT_SD+8(%rcx),%rdx
286	movq	%rdx,8(%rax)
287	movl	$LDTSEL,%eax
288	jmp	ld_ldt
289
290	.globl	ctx_switch_xsave32
291ctx_switch_xsave32:
292	xsave	(%r9)
293	jmp	ctx_switch_xsave_done
294END(cpu_switch)
295
296/*
297 * savectx(pcb)
298 * Update pcb, saving current processor state.
299 */
300ENTRY(savectx)
301	/* Save caller's return address. */
302	movq	(%rsp),%rax
303	movq	%rax,PCB_RIP(%rdi)
304
305	movq	%rbx,PCB_RBX(%rdi)
306	movq	%rsp,PCB_RSP(%rdi)
307	movq	%rbp,PCB_RBP(%rdi)
308	movq	%r12,PCB_R12(%rdi)
309	movq	%r13,PCB_R13(%rdi)
310	movq	%r14,PCB_R14(%rdi)
311	movq	%r15,PCB_R15(%rdi)
312
313	movq	%cr0,%rax
314	movq	%rax,PCB_CR0(%rdi)
315	movq	%cr2,%rax
316	movq	%rax,PCB_CR2(%rdi)
317	movq	%cr3,%rax
318	movq	%rax,PCB_CR3(%rdi)
319	movq	%cr4,%rax
320	movq	%rax,PCB_CR4(%rdi)
321
322	movq	%dr0,%rax
323	movq	%rax,PCB_DR0(%rdi)
324	movq	%dr1,%rax
325	movq	%rax,PCB_DR1(%rdi)
326	movq	%dr2,%rax
327	movq	%rax,PCB_DR2(%rdi)
328	movq	%dr3,%rax
329	movq	%rax,PCB_DR3(%rdi)
330	movq	%dr6,%rax
331	movq	%rax,PCB_DR6(%rdi)
332	movq	%dr7,%rax
333	movq	%rax,PCB_DR7(%rdi)
334
335	movl	$MSR_FSBASE,%ecx
336	rdmsr
337	movl	%eax,PCB_FSBASE(%rdi)
338	movl	%edx,PCB_FSBASE+4(%rdi)
339	movl	$MSR_GSBASE,%ecx
340	rdmsr
341	movl	%eax,PCB_GSBASE(%rdi)
342	movl	%edx,PCB_GSBASE+4(%rdi)
343	movl	$MSR_KGSBASE,%ecx
344	rdmsr
345	movl	%eax,PCB_KGSBASE(%rdi)
346	movl	%edx,PCB_KGSBASE+4(%rdi)
347	movl	$MSR_EFER,%ecx
348	rdmsr
349	movl	%eax,PCB_EFER(%rdi)
350	movl	%edx,PCB_EFER+4(%rdi)
351	movl	$MSR_STAR,%ecx
352	rdmsr
353	movl	%eax,PCB_STAR(%rdi)
354	movl	%edx,PCB_STAR+4(%rdi)
355	movl	$MSR_LSTAR,%ecx
356	rdmsr
357	movl	%eax,PCB_LSTAR(%rdi)
358	movl	%edx,PCB_LSTAR+4(%rdi)
359	movl	$MSR_CSTAR,%ecx
360	rdmsr
361	movl	%eax,PCB_CSTAR(%rdi)
362	movl	%edx,PCB_CSTAR+4(%rdi)
363	movl	$MSR_SF_MASK,%ecx
364	rdmsr
365	movl	%eax,PCB_SFMASK(%rdi)
366	movl	%edx,PCB_SFMASK+4(%rdi)
367
368	sgdt	PCB_GDT(%rdi)
369	sidt	PCB_IDT(%rdi)
370	sldt	PCB_LDT(%rdi)
371	str	PCB_TR(%rdi)
372
373	movl	$1,%eax
374	ret
375END(savectx)
376
377/*
378 * resumectx(pcb)
379 * Resuming processor state from pcb.
380 */
381ENTRY(resumectx)
382	/* Switch to KPML5/4phys. */
383	movq	KPML4phys,%rax
384	movq	KPML5phys,%rcx
385	cmpl	$0, la57
386	cmovne	%rcx, %rax
387	movq	%rax,%cr3
388
389	/* Force kernel segment registers. */
390	movl	$KDSEL,%eax
391	movw	%ax,%ds
392	movw	%ax,%es
393	movw	%ax,%ss
394	movl	$KUF32SEL,%eax
395	movw	%ax,%fs
396	movl	$KUG32SEL,%eax
397	movw	%ax,%gs
398
399	movl	$MSR_FSBASE,%ecx
400	movl	PCB_FSBASE(%rdi),%eax
401	movl	4 + PCB_FSBASE(%rdi),%edx
402	wrmsr
403	movl	$MSR_GSBASE,%ecx
404	movl	PCB_GSBASE(%rdi),%eax
405	movl	4 + PCB_GSBASE(%rdi),%edx
406	wrmsr
407	movl	$MSR_KGSBASE,%ecx
408	movl	PCB_KGSBASE(%rdi),%eax
409	movl	4 + PCB_KGSBASE(%rdi),%edx
410	wrmsr
411
412	/* Restore EFER one more time. */
413	movl	$MSR_EFER,%ecx
414	movl	PCB_EFER(%rdi),%eax
415	wrmsr
416
417	/* Restore fast syscall stuff. */
418	movl	$MSR_STAR,%ecx
419	movl	PCB_STAR(%rdi),%eax
420	movl	4 + PCB_STAR(%rdi),%edx
421	wrmsr
422	movl	$MSR_LSTAR,%ecx
423	movl	PCB_LSTAR(%rdi),%eax
424	movl	4 + PCB_LSTAR(%rdi),%edx
425	wrmsr
426	movl	$MSR_CSTAR,%ecx
427	movl	PCB_CSTAR(%rdi),%eax
428	movl	4 + PCB_CSTAR(%rdi),%edx
429	wrmsr
430	movl	$MSR_SF_MASK,%ecx
431	movl	PCB_SFMASK(%rdi),%eax
432	wrmsr
433
434	/* Restore CR0, CR2, CR4 and CR3. */
435	movq	PCB_CR0(%rdi),%rax
436	movq	%rax,%cr0
437	movq	PCB_CR2(%rdi),%rax
438	movq	%rax,%cr2
439	movq	PCB_CR4(%rdi),%rax
440	movq	%rax,%cr4
441	movq	PCB_CR3(%rdi),%rax
442	movq	%rax,%cr3
443
444	/* Restore descriptor tables. */
445	lidt	PCB_IDT(%rdi)
446	lldt	PCB_LDT(%rdi)
447
448#define	SDT_SYSTSS	9
449#define	SDT_SYSBSY	11
450
451	/* Clear "task busy" bit and reload TR. */
452	movq	PCPU(TSS),%rax
453	andb	$(~SDT_SYSBSY | SDT_SYSTSS),5(%rax)
454	movw	PCB_TR(%rdi),%ax
455	ltr	%ax
456
457#undef	SDT_SYSTSS
458#undef	SDT_SYSBSY
459
460	/* Restore debug registers. */
461	movq	PCB_DR0(%rdi),%rax
462	movq	%rax,%dr0
463	movq	PCB_DR1(%rdi),%rax
464	movq	%rax,%dr1
465	movq	PCB_DR2(%rdi),%rax
466	movq	%rax,%dr2
467	movq	PCB_DR3(%rdi),%rax
468	movq	%rax,%dr3
469	movq	PCB_DR6(%rdi),%rax
470	movq	%rax,%dr6
471	movq	PCB_DR7(%rdi),%rax
472	movq	%rax,%dr7
473
474	/* Restore other callee saved registers. */
475	movq	PCB_R15(%rdi),%r15
476	movq	PCB_R14(%rdi),%r14
477	movq	PCB_R13(%rdi),%r13
478	movq	PCB_R12(%rdi),%r12
479	movq	PCB_RBP(%rdi),%rbp
480	movq	PCB_RSP(%rdi),%rsp
481	movq	PCB_RBX(%rdi),%rbx
482
483	/* Restore return address. */
484	movq	PCB_RIP(%rdi),%rax
485	movq	%rax,(%rsp)
486
487	xorl	%eax,%eax
488	ret
489END(resumectx)
490
491/* Wait for the new thread to become unblocked */
492sw1wait:
4931:
494	pause
495	movq	TD_LOCK(%r12),%rcx
496	cmpq	%rcx, %rdx
497	je	1b
498	jmp	sw1cont
499