1 /* 2 * QTest testcase for the ASPEED Hash and Crypto Engine 3 * 4 * SPDX-License-Identifier: GPL-2.0-or-later 5 * Copyright 2021 IBM Corp. 6 */ 7 8 #ifndef TESTS_ASPEED_HACE_UTILS_H 9 #define TESTS_ASPEED_HACE_UTILS_H 10 11 #include "qemu/osdep.h" 12 #include "libqtest.h" 13 #include "qemu/bitops.h" 14 15 #define HACE_CMD 0x10 16 #define HACE_SHA_BE_EN BIT(3) 17 #define HACE_MD5_LE_EN BIT(2) 18 #define HACE_ALGO_MD5 0 19 #define HACE_ALGO_SHA1 BIT(5) 20 #define HACE_ALGO_SHA224 BIT(6) 21 #define HACE_ALGO_SHA256 (BIT(4) | BIT(6)) 22 #define HACE_ALGO_SHA512 (BIT(5) | BIT(6)) 23 #define HACE_ALGO_SHA384 (BIT(5) | BIT(6) | BIT(10)) 24 #define HACE_SG_EN BIT(18) 25 #define HACE_ACCUM_EN BIT(8) 26 27 #define HACE_STS 0x1c 28 #define HACE_RSA_ISR BIT(13) 29 #define HACE_CRYPTO_ISR BIT(12) 30 #define HACE_HASH_ISR BIT(9) 31 #define HACE_RSA_BUSY BIT(2) 32 #define HACE_CRYPTO_BUSY BIT(1) 33 #define HACE_HASH_BUSY BIT(0) 34 #define HACE_HASH_SRC 0x20 35 #define HACE_HASH_DIGEST 0x24 36 #define HACE_HASH_KEY_BUFF 0x28 37 #define HACE_HASH_DATA_LEN 0x2c 38 #define HACE_HASH_CMD 0x30 39 #define HACE_HASH_SRC_HI 0x90 40 #define HACE_HASH_DIGEST_HI 0x94 41 #define HACE_HASH_KEY_BUFF_HI 0x98 42 43 /* Scatter-Gather Hash */ 44 #define SG_LIST_LEN_LAST BIT(31) 45 struct AspeedSgList { 46 uint32_t len; 47 uint32_t addr; 48 } __attribute__ ((__packed__)); 49 50 struct AspeedMasks { 51 uint32_t src; 52 uint32_t dest; 53 uint32_t key; 54 uint32_t len; 55 uint32_t src_hi; 56 uint32_t dest_hi; 57 uint32_t key_hi; 58 }; 59 60 void aspeed_test_md5(const char *machine, const uint32_t base, 61 const uint64_t src_addr); 62 void aspeed_test_sha256(const char *machine, const uint32_t base, 63 const uint64_t src_addr); 64 void aspeed_test_sha384(const char *machine, const uint32_t base, 65 const uint64_t src_addr); 66 void aspeed_test_sha512(const char *machine, const uint32_t base, 67 const uint64_t src_addr); 68 void aspeed_test_sha256_sg(const char *machine, const uint32_t base, 69 const uint64_t src_addr); 70 void aspeed_test_sha384_sg(const char *machine, const uint32_t base, 71 const uint64_t src_addr); 72 void aspeed_test_sha512_sg(const char *machine, const uint32_t base, 73 const uint64_t src_addr); 74 void aspeed_test_sha256_accum(const char *machine, const uint32_t base, 75 const uint64_t src_addr); 76 void aspeed_test_sha384_accum(const char *machine, const uint32_t base, 77 const uint64_t src_addr); 78 void aspeed_test_sha512_accum(const char *machine, const uint32_t base, 79 const uint64_t src_addr); 80 void aspeed_test_addresses(const char *machine, const uint32_t base, 81 const struct AspeedMasks *expected); 82 83 #endif /* TESTS_ASPEED_HACE_UTILS_H */ 84 85