17316329aSStefan Weil /* 27316329aSStefan Weil * Tiny Code Generator for QEMU 37316329aSStefan Weil * 47316329aSStefan Weil * Copyright (c) 2009, 2011 Stefan Weil 57316329aSStefan Weil * 67316329aSStefan Weil * Permission is hereby granted, free of charge, to any person obtaining a copy 77316329aSStefan Weil * of this software and associated documentation files (the "Software"), to deal 87316329aSStefan Weil * in the Software without restriction, including without limitation the rights 97316329aSStefan Weil * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 107316329aSStefan Weil * copies of the Software, and to permit persons to whom the Software is 117316329aSStefan Weil * furnished to do so, subject to the following conditions: 127316329aSStefan Weil * 137316329aSStefan Weil * The above copyright notice and this permission notice shall be included in 147316329aSStefan Weil * all copies or substantial portions of the Software. 157316329aSStefan Weil * 167316329aSStefan Weil * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 177316329aSStefan Weil * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 187316329aSStefan Weil * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 197316329aSStefan Weil * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 207316329aSStefan Weil * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 217316329aSStefan Weil * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 227316329aSStefan Weil * THE SOFTWARE. 237316329aSStefan Weil */ 247316329aSStefan Weil 257316329aSStefan Weil /* 267316329aSStefan Weil * This code implements a TCG which does not generate machine code for some 277316329aSStefan Weil * real target machine but which generates virtual machine code for an 287316329aSStefan Weil * interpreter. Interpreted pseudo code is slow, but it works on any host. 297316329aSStefan Weil * 307316329aSStefan Weil * Some remarks might help in understanding the code: 317316329aSStefan Weil * 327316329aSStefan Weil * "target" or "TCG target" is the machine which runs the generated code. 337316329aSStefan Weil * This is different to the usual meaning in QEMU where "target" is the 347316329aSStefan Weil * emulated machine. So normally QEMU host is identical to TCG target. 357316329aSStefan Weil * Here the TCG target is a virtual machine, but this virtual machine must 367316329aSStefan Weil * use the same word size like the real machine. 377316329aSStefan Weil * Therefore, we need both 32 and 64 bit virtual machines (interpreter). 387316329aSStefan Weil */ 397316329aSStefan Weil 407316329aSStefan Weil #if !defined(TCG_TARGET_H) 417316329aSStefan Weil #define TCG_TARGET_H 427316329aSStefan Weil 437316329aSStefan Weil #include "config-host.h" 447316329aSStefan Weil 457316329aSStefan Weil #define TCG_TARGET_INTERPRETER 1 467316329aSStefan Weil 477316329aSStefan Weil #ifdef CONFIG_DEBUG_TCG 487316329aSStefan Weil /* Enable debug output. */ 497316329aSStefan Weil #define CONFIG_DEBUG_TCG_INTERPRETER 507316329aSStefan Weil #endif 517316329aSStefan Weil 527316329aSStefan Weil #if 0 /* TCI tries to emulate a little endian host. */ 537316329aSStefan Weil #if defined(HOST_WORDS_BIGENDIAN) 547316329aSStefan Weil # define TCG_TARGET_WORDS_BIGENDIAN 557316329aSStefan Weil #endif 567316329aSStefan Weil #endif 577316329aSStefan Weil 587316329aSStefan Weil /* Optional instructions. */ 597316329aSStefan Weil 607316329aSStefan Weil #define TCG_TARGET_HAS_bswap16_i32 1 617316329aSStefan Weil #define TCG_TARGET_HAS_bswap32_i32 1 627316329aSStefan Weil /* Not more than one of the next two defines must be 1. */ 637316329aSStefan Weil #define TCG_TARGET_HAS_div_i32 1 647316329aSStefan Weil #define TCG_TARGET_HAS_div2_i32 0 657316329aSStefan Weil #define TCG_TARGET_HAS_ext8s_i32 1 667316329aSStefan Weil #define TCG_TARGET_HAS_ext16s_i32 1 677316329aSStefan Weil #define TCG_TARGET_HAS_ext8u_i32 1 687316329aSStefan Weil #define TCG_TARGET_HAS_ext16u_i32 1 697316329aSStefan Weil #define TCG_TARGET_HAS_andc_i32 0 70e24dc9feSStefan Weil #define TCG_TARGET_HAS_deposit_i32 1 717316329aSStefan Weil #define TCG_TARGET_HAS_eqv_i32 0 727316329aSStefan Weil #define TCG_TARGET_HAS_nand_i32 0 737316329aSStefan Weil #define TCG_TARGET_HAS_nor_i32 0 747316329aSStefan Weil #define TCG_TARGET_HAS_neg_i32 1 757316329aSStefan Weil #define TCG_TARGET_HAS_not_i32 1 767316329aSStefan Weil #define TCG_TARGET_HAS_orc_i32 0 777316329aSStefan Weil #define TCG_TARGET_HAS_rot_i32 1 78ffc5ea09SRichard Henderson #define TCG_TARGET_HAS_movcond_i32 0 794d3203fdSRichard Henderson #define TCG_TARGET_HAS_muls2_i32 0 807316329aSStefan Weil 817316329aSStefan Weil #if TCG_TARGET_REG_BITS == 64 827316329aSStefan Weil #define TCG_TARGET_HAS_bswap16_i64 1 837316329aSStefan Weil #define TCG_TARGET_HAS_bswap32_i64 1 847316329aSStefan Weil #define TCG_TARGET_HAS_bswap64_i64 1 85e24dc9feSStefan Weil #define TCG_TARGET_HAS_deposit_i64 1 867316329aSStefan Weil /* Not more than one of the next two defines must be 1. */ 877316329aSStefan Weil #define TCG_TARGET_HAS_div_i64 0 887316329aSStefan Weil #define TCG_TARGET_HAS_div2_i64 0 897316329aSStefan Weil #define TCG_TARGET_HAS_ext8s_i64 1 907316329aSStefan Weil #define TCG_TARGET_HAS_ext16s_i64 1 917316329aSStefan Weil #define TCG_TARGET_HAS_ext32s_i64 1 927316329aSStefan Weil #define TCG_TARGET_HAS_ext8u_i64 1 937316329aSStefan Weil #define TCG_TARGET_HAS_ext16u_i64 1 947316329aSStefan Weil #define TCG_TARGET_HAS_ext32u_i64 1 957316329aSStefan Weil #define TCG_TARGET_HAS_andc_i64 0 967316329aSStefan Weil #define TCG_TARGET_HAS_eqv_i64 0 977316329aSStefan Weil #define TCG_TARGET_HAS_nand_i64 0 987316329aSStefan Weil #define TCG_TARGET_HAS_nor_i64 0 997316329aSStefan Weil #define TCG_TARGET_HAS_neg_i64 1 1007316329aSStefan Weil #define TCG_TARGET_HAS_not_i64 1 1017316329aSStefan Weil #define TCG_TARGET_HAS_orc_i64 0 1027316329aSStefan Weil #define TCG_TARGET_HAS_rot_i64 1 103ffc5ea09SRichard Henderson #define TCG_TARGET_HAS_movcond_i64 0 1044d3203fdSRichard Henderson #define TCG_TARGET_HAS_muls2_i64 0 105e6a72734SRichard Henderson 106e6a72734SRichard Henderson #define TCG_TARGET_HAS_add2_i32 0 107e6a72734SRichard Henderson #define TCG_TARGET_HAS_sub2_i32 0 108e6a72734SRichard Henderson #define TCG_TARGET_HAS_mulu2_i32 0 109d7156f7cSRichard Henderson #define TCG_TARGET_HAS_add2_i64 0 110d7156f7cSRichard Henderson #define TCG_TARGET_HAS_sub2_i64 0 111d7156f7cSRichard Henderson #define TCG_TARGET_HAS_mulu2_i64 0 1127316329aSStefan Weil #endif /* TCG_TARGET_REG_BITS == 64 */ 1137316329aSStefan Weil 1147316329aSStefan Weil /* Number of registers available. 1157316329aSStefan Weil For 32 bit hosts, we need more than 8 registers (call arguments). */ 1167316329aSStefan Weil /* #define TCG_TARGET_NB_REGS 8 */ 1177316329aSStefan Weil #define TCG_TARGET_NB_REGS 16 1187316329aSStefan Weil /* #define TCG_TARGET_NB_REGS 32 */ 1197316329aSStefan Weil 1207316329aSStefan Weil /* List of registers which are used by TCG. */ 1217316329aSStefan Weil typedef enum { 1227316329aSStefan Weil TCG_REG_R0 = 0, 1237316329aSStefan Weil TCG_REG_R1, 1247316329aSStefan Weil TCG_REG_R2, 1257316329aSStefan Weil TCG_REG_R3, 1267316329aSStefan Weil TCG_REG_R4, 1277316329aSStefan Weil TCG_REG_R5, 1287316329aSStefan Weil TCG_REG_R6, 1297316329aSStefan Weil TCG_REG_R7, 1307316329aSStefan Weil #if TCG_TARGET_NB_REGS >= 16 1317316329aSStefan Weil TCG_REG_R8, 1327316329aSStefan Weil TCG_REG_R9, 1337316329aSStefan Weil TCG_REG_R10, 1347316329aSStefan Weil TCG_REG_R11, 1357316329aSStefan Weil TCG_REG_R12, 1367316329aSStefan Weil TCG_REG_R13, 1377316329aSStefan Weil TCG_REG_R14, 1387316329aSStefan Weil TCG_REG_R15, 1397316329aSStefan Weil #if TCG_TARGET_NB_REGS >= 32 1407316329aSStefan Weil TCG_REG_R16, 1417316329aSStefan Weil TCG_REG_R17, 1427316329aSStefan Weil TCG_REG_R18, 1437316329aSStefan Weil TCG_REG_R19, 1447316329aSStefan Weil TCG_REG_R20, 1457316329aSStefan Weil TCG_REG_R21, 1467316329aSStefan Weil TCG_REG_R22, 1477316329aSStefan Weil TCG_REG_R23, 1487316329aSStefan Weil TCG_REG_R24, 1497316329aSStefan Weil TCG_REG_R25, 1507316329aSStefan Weil TCG_REG_R26, 1517316329aSStefan Weil TCG_REG_R27, 1527316329aSStefan Weil TCG_REG_R28, 1537316329aSStefan Weil TCG_REG_R29, 1547316329aSStefan Weil TCG_REG_R30, 1557316329aSStefan Weil TCG_REG_R31, 1567316329aSStefan Weil #endif 1577316329aSStefan Weil #endif 1587316329aSStefan Weil /* Special value UINT8_MAX is used by TCI to encode constant values. */ 1597316329aSStefan Weil TCG_CONST = UINT8_MAX 160771142c2SRichard Henderson } TCGReg; 1617316329aSStefan Weil 162*ee79c356SRichard Henderson #define TCG_AREG0 (TCG_TARGET_NB_REGS - 2) 163*ee79c356SRichard Henderson 164*ee79c356SRichard Henderson /* Used for function call generation. */ 165*ee79c356SRichard Henderson #define TCG_REG_CALL_STACK (TCG_TARGET_NB_REGS - 1) 166*ee79c356SRichard Henderson #define TCG_TARGET_CALL_STACK_OFFSET 0 167*ee79c356SRichard Henderson #define TCG_TARGET_STACK_ALIGN 16 168*ee79c356SRichard Henderson 1697316329aSStefan Weil void tci_disas(uint8_t opc); 1707316329aSStefan Weil 17169784eaeSStefan Weil tcg_target_ulong tcg_qemu_tb_exec(CPUArchState *env, uint8_t *tb_ptr); 1727316329aSStefan Weil #define tcg_qemu_tb_exec tcg_qemu_tb_exec 1737316329aSStefan Weil 174f57a5160SStefan Weil static inline void flush_icache_range(tcg_target_ulong start, 175f57a5160SStefan Weil tcg_target_ulong stop) 17651711aeeSStefan Weil { 17751711aeeSStefan Weil } 17851711aeeSStefan Weil 1797316329aSStefan Weil #endif /* TCG_TARGET_H */ 180