1 /* SPDX-License-Identifier: MIT */ 2 /* 3 * Define target-specific opcode support 4 * Copyright (c) 2018 SiFive, Inc 5 */ 6 7 #ifndef TCG_TARGET_HAS_H 8 #define TCG_TARGET_HAS_H 9 10 #include "host/cpuinfo.h" 11 12 /* optional instructions */ 13 #define TCG_TARGET_HAS_add2_i32 1 14 #define TCG_TARGET_HAS_sub2_i32 1 15 #define TCG_TARGET_HAS_qemu_st8_i32 0 16 17 #define TCG_TARGET_HAS_extr_i64_i32 1 18 #define TCG_TARGET_HAS_add2_i64 1 19 #define TCG_TARGET_HAS_sub2_i64 1 20 21 #define TCG_TARGET_HAS_qemu_ldst_i128 0 22 23 #define TCG_TARGET_HAS_tst 0 24 25 /* vector instructions */ 26 #define TCG_TARGET_HAS_v64 (cpuinfo & CPUINFO_ZVE64X) 27 #define TCG_TARGET_HAS_v128 (cpuinfo & CPUINFO_ZVE64X) 28 #define TCG_TARGET_HAS_v256 (cpuinfo & CPUINFO_ZVE64X) 29 #define TCG_TARGET_HAS_andc_vec 0 30 #define TCG_TARGET_HAS_orc_vec 0 31 #define TCG_TARGET_HAS_nand_vec 0 32 #define TCG_TARGET_HAS_nor_vec 0 33 #define TCG_TARGET_HAS_eqv_vec 0 34 #define TCG_TARGET_HAS_not_vec 1 35 #define TCG_TARGET_HAS_neg_vec 1 36 #define TCG_TARGET_HAS_abs_vec 0 37 #define TCG_TARGET_HAS_roti_vec 1 38 #define TCG_TARGET_HAS_rots_vec 1 39 #define TCG_TARGET_HAS_rotv_vec 1 40 #define TCG_TARGET_HAS_shi_vec 1 41 #define TCG_TARGET_HAS_shs_vec 1 42 #define TCG_TARGET_HAS_shv_vec 1 43 #define TCG_TARGET_HAS_mul_vec 1 44 #define TCG_TARGET_HAS_sat_vec 1 45 #define TCG_TARGET_HAS_minmax_vec 1 46 #define TCG_TARGET_HAS_bitsel_vec 0 47 #define TCG_TARGET_HAS_cmpsel_vec 1 48 49 #define TCG_TARGET_HAS_tst_vec 0 50 51 static inline bool 52 tcg_target_extract_valid(TCGType type, unsigned ofs, unsigned len) 53 { 54 if (type == TCG_TYPE_I64 && ofs + len == 32) { 55 /* ofs > 0 uses SRLIW; ofs == 0 uses add.uw. */ 56 return ofs || (cpuinfo & CPUINFO_ZBA); 57 } 58 switch (len) { 59 case 1: 60 return (cpuinfo & CPUINFO_ZBS) && ofs != 0; 61 case 16: 62 return (cpuinfo & CPUINFO_ZBB) && ofs == 0; 63 } 64 return false; 65 } 66 #define TCG_TARGET_extract_valid tcg_target_extract_valid 67 68 static inline bool 69 tcg_target_sextract_valid(TCGType type, unsigned ofs, unsigned len) 70 { 71 if (type == TCG_TYPE_I64 && ofs + len == 32) { 72 return true; 73 } 74 return (cpuinfo & CPUINFO_ZBB) && ofs == 0 && (len == 8 || len == 16); 75 } 76 #define TCG_TARGET_sextract_valid tcg_target_sextract_valid 77 78 #define TCG_TARGET_deposit_valid(type, ofs, len) 0 79 80 #endif 81