1 /* SPDX-License-Identifier: MIT */ 2 /* 3 * Define target-specific opcode support 4 * Copyright (c) 2008 Fabrice Bellard 5 */ 6 7 #ifndef TCG_TARGET_HAS_H 8 #define TCG_TARGET_HAS_H 9 10 #include "host/cpuinfo.h" 11 12 #define have_bmi1 (cpuinfo & CPUINFO_BMI1) 13 #define have_popcnt (cpuinfo & CPUINFO_POPCNT) 14 #define have_avx1 (cpuinfo & CPUINFO_AVX1) 15 #define have_avx2 (cpuinfo & CPUINFO_AVX2) 16 #define have_movbe (cpuinfo & CPUINFO_MOVBE) 17 18 /* 19 * There are interesting instructions in AVX512, so long as we have AVX512VL, 20 * which indicates support for EVEX on sizes smaller than 512 bits. 21 */ 22 #define have_avx512vl ((cpuinfo & CPUINFO_AVX512VL) && \ 23 (cpuinfo & CPUINFO_AVX512F)) 24 #define have_avx512bw ((cpuinfo & CPUINFO_AVX512BW) && have_avx512vl) 25 #define have_avx512dq ((cpuinfo & CPUINFO_AVX512DQ) && have_avx512vl) 26 #define have_avx512vbmi2 ((cpuinfo & CPUINFO_AVX512VBMI2) && have_avx512vl) 27 28 /* optional instructions */ 29 #define TCG_TARGET_HAS_bswap16_i32 1 30 #define TCG_TARGET_HAS_bswap32_i32 1 31 #define TCG_TARGET_HAS_extract2_i32 1 32 #define TCG_TARGET_HAS_negsetcond_i32 1 33 #define TCG_TARGET_HAS_add2_i32 1 34 #define TCG_TARGET_HAS_sub2_i32 1 35 #define TCG_TARGET_HAS_mulu2_i32 1 36 #define TCG_TARGET_HAS_muls2_i32 1 37 38 #if TCG_TARGET_REG_BITS == 64 39 /* Keep 32-bit values zero-extended in a register. */ 40 #define TCG_TARGET_HAS_extr_i64_i32 1 41 #define TCG_TARGET_HAS_bswap16_i64 1 42 #define TCG_TARGET_HAS_bswap32_i64 1 43 #define TCG_TARGET_HAS_bswap64_i64 1 44 #define TCG_TARGET_HAS_extract2_i64 1 45 #define TCG_TARGET_HAS_negsetcond_i64 1 46 #define TCG_TARGET_HAS_add2_i64 1 47 #define TCG_TARGET_HAS_sub2_i64 1 48 #define TCG_TARGET_HAS_mulu2_i64 1 49 #define TCG_TARGET_HAS_muls2_i64 1 50 #define TCG_TARGET_HAS_qemu_st8_i32 0 51 #else 52 #define TCG_TARGET_HAS_qemu_st8_i32 1 53 #endif 54 55 #define TCG_TARGET_HAS_qemu_ldst_i128 \ 56 (TCG_TARGET_REG_BITS == 64 && (cpuinfo & CPUINFO_ATOMIC_VMOVDQA)) 57 58 #define TCG_TARGET_HAS_tst 1 59 60 /* We do not support older SSE systems, only beginning with AVX1. */ 61 #define TCG_TARGET_HAS_v64 have_avx1 62 #define TCG_TARGET_HAS_v128 have_avx1 63 #define TCG_TARGET_HAS_v256 have_avx2 64 65 #define TCG_TARGET_HAS_andc_vec 1 66 #define TCG_TARGET_HAS_orc_vec have_avx512vl 67 #define TCG_TARGET_HAS_nand_vec have_avx512vl 68 #define TCG_TARGET_HAS_nor_vec have_avx512vl 69 #define TCG_TARGET_HAS_eqv_vec have_avx512vl 70 #define TCG_TARGET_HAS_not_vec have_avx512vl 71 #define TCG_TARGET_HAS_neg_vec 0 72 #define TCG_TARGET_HAS_abs_vec 1 73 #define TCG_TARGET_HAS_roti_vec have_avx512vl 74 #define TCG_TARGET_HAS_rots_vec 0 75 #define TCG_TARGET_HAS_rotv_vec have_avx512vl 76 #define TCG_TARGET_HAS_shi_vec 1 77 #define TCG_TARGET_HAS_shs_vec 1 78 #define TCG_TARGET_HAS_shv_vec have_avx2 79 #define TCG_TARGET_HAS_mul_vec 1 80 #define TCG_TARGET_HAS_sat_vec 1 81 #define TCG_TARGET_HAS_minmax_vec 1 82 #define TCG_TARGET_HAS_bitsel_vec have_avx512vl 83 #define TCG_TARGET_HAS_cmpsel_vec 1 84 #define TCG_TARGET_HAS_tst_vec have_avx512bw 85 86 #define TCG_TARGET_deposit_valid(type, ofs, len) \ 87 (((ofs) == 0 && ((len) == 8 || (len) == 16)) || \ 88 (TCG_TARGET_REG_BITS == 32 && (ofs) == 8 && (len) == 8)) 89 90 /* 91 * Check for the possibility of low byte/word extraction, high-byte extraction 92 * and zero-extending 32-bit right-shift. 93 * 94 * We cannot sign-extend from high byte to 64-bits without using the 95 * REX prefix that explicitly excludes access to the high-byte registers. 96 */ 97 static inline bool 98 tcg_target_sextract_valid(TCGType type, unsigned ofs, unsigned len) 99 { 100 switch (ofs) { 101 case 0: 102 switch (len) { 103 case 8: 104 case 16: 105 return true; 106 case 32: 107 return type == TCG_TYPE_I64; 108 } 109 return false; 110 case 8: 111 return len == 8 && type == TCG_TYPE_I32; 112 } 113 return false; 114 } 115 #define TCG_TARGET_sextract_valid tcg_target_sextract_valid 116 117 static inline bool 118 tcg_target_extract_valid(TCGType type, unsigned ofs, unsigned len) 119 { 120 if (type == TCG_TYPE_I64 && ofs + len == 32) { 121 return true; 122 } 123 switch (ofs) { 124 case 0: 125 return len == 8 || len == 16; 126 case 8: 127 return len == 8; 128 } 129 return false; 130 } 131 #define TCG_TARGET_extract_valid tcg_target_extract_valid 132 133 #endif 134