1 /*
2 * MIPS internal definitions and helpers (TCG accelerator)
3 *
4 * SPDX-License-Identifier: GPL-2.0-or-later
5 *
6 * This work is licensed under the terms of the GNU GPL, version 2 or later.
7 * See the COPYING file in the top-level directory.
8 */
9
10 #ifndef MIPS_TCG_INTERNAL_H
11 #define MIPS_TCG_INTERNAL_H
12
13 #include "tcg/tcg.h"
14 #include "exec/memattrs.h"
15 #include "hw/core/cpu.h"
16 #include "cpu.h"
17
18 void mips_tcg_init(void);
19 void mips_translate_code(CPUState *cs, TranslationBlock *tb,
20 int *max_insns, vaddr pc, void *host_pc);
21
22 void mips_cpu_synchronize_from_tb(CPUState *cs, const TranslationBlock *tb);
23 G_NORETURN void mips_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
24 MMUAccessType access_type, int mmu_idx,
25 uintptr_t retaddr);
26 void mips_restore_state_to_opc(CPUState *cs,
27 const TranslationBlock *tb,
28 const uint64_t *data);
29
30 const char *mips_exception_name(int32_t exception);
31
32 G_NORETURN void do_raise_exception_err(CPUMIPSState *env, uint32_t exception,
33 int error_code, uintptr_t pc);
34
35 static inline G_NORETURN
do_raise_exception(CPUMIPSState * env,uint32_t exception,uintptr_t pc)36 void do_raise_exception(CPUMIPSState *env,
37 uint32_t exception,
38 uintptr_t pc)
39 {
40 do_raise_exception_err(env, exception, 0, pc);
41 }
42
43 #if !defined(CONFIG_USER_ONLY)
44
45 void mips_cpu_do_interrupt(CPUState *cpu);
46 bool mips_cpu_exec_interrupt(CPUState *cpu, int int_req);
47
48 void mmu_init(CPUMIPSState *env, const mips_def_t *def);
49
50 uint32_t compute_pagemask(uint32_t val);
51
52 void r4k_invalidate_tlb(CPUMIPSState *env, int idx, int use_extra);
53 uint32_t cpu_mips_get_random(CPUMIPSState *env);
54
55 bool mips_io_recompile_replay_branch(CPUState *cs, const TranslationBlock *tb);
56
57 hwaddr cpu_mips_translate_address(CPUMIPSState *env, target_ulong address,
58 MMUAccessType access_type, uintptr_t retaddr);
59 void mips_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr,
60 vaddr addr, unsigned size,
61 MMUAccessType access_type,
62 int mmu_idx, MemTxAttrs attrs,
63 MemTxResult response, uintptr_t retaddr);
64 void cpu_mips_tlb_flush(CPUMIPSState *env);
65
66 bool mips_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
67 MMUAccessType access_type, int mmu_idx,
68 bool probe, uintptr_t retaddr);
69
70 void mips_semihosting(CPUMIPSState *env);
71
72 #endif /* !CONFIG_USER_ONLY */
73
74 #endif
75