xref: /qemu/target/arm/cpu-sysregs.h (revision 7698afc42b5af9e55f12ab2236618e38e5a1c23f)
1 /*
2  * Definitions for Arm ID system registers
3  *
4  * SPDX-License-Identifier: GPL-2.0-or-later
5  */
6 #ifndef ARM_CPU_SYSREGS_H
7 #define ARM_CPU_SYSREGS_H
8 
9 /*
10  * Following is similar to the coprocessor regs encodings, but with an argument
11  * ordering that matches the ARM ARM. We also reuse the various CP_REG_ defines
12  * that actually are the same as the equivalent KVM_REG_ values.
13  */
14 #define ENCODE_ID_REG(op0, op1, crn, crm, op2)          \
15     (((op0) << CP_REG_ARM64_SYSREG_OP0_SHIFT) |         \
16      ((op1) << CP_REG_ARM64_SYSREG_OP1_SHIFT) |         \
17      ((crn) << CP_REG_ARM64_SYSREG_CRN_SHIFT) |         \
18      ((crm) << CP_REG_ARM64_SYSREG_CRM_SHIFT) |         \
19      ((op2) << CP_REG_ARM64_SYSREG_OP2_SHIFT))
20 
21 #define DEF(NAME, OP0, OP1, CRN, CRM, OP2) NAME##_IDX,
22 
23 typedef enum ARMIDRegisterIdx {
24 #include "cpu-sysregs.h.inc"
25     NUM_ID_IDX,
26 } ARMIDRegisterIdx;
27 
28 #undef DEF
29 #define DEF(NAME, OP0, OP1, CRN, CRM, OP2) \
30     SYS_##NAME = ENCODE_ID_REG(OP0, OP1, CRN, CRM, OP2),
31 
32 typedef enum ARMSysRegs {
33 #include "cpu-sysregs.h.inc"
34 } ARMSysRegs;
35 
36 #undef DEF
37 
38 extern const uint32_t id_register_sysreg[NUM_ID_IDX];
39 
40 int get_sysreg_idx(ARMSysRegs sysreg);
41 
42 #endif /* ARM_CPU_SYSREGS_H */
43