1*a2e3508aSEric Auger /* 2*a2e3508aSEric Auger * Definitions for Arm ID system registers 3*a2e3508aSEric Auger * 4*a2e3508aSEric Auger * SPDX-License-Identifier: GPL-2.0-or-later 5*a2e3508aSEric Auger */ 6*a2e3508aSEric Auger #ifndef ARM_CPU_SYSREGS_H 7*a2e3508aSEric Auger #define ARM_CPU_SYSREGS_H 8*a2e3508aSEric Auger 9*a2e3508aSEric Auger /* 10*a2e3508aSEric Auger * Following is similar to the coprocessor regs encodings, but with an argument 11*a2e3508aSEric Auger * ordering that matches the ARM ARM. We also reuse the various CP_REG_ defines 12*a2e3508aSEric Auger * that actually are the same as the equivalent KVM_REG_ values. 13*a2e3508aSEric Auger */ 14*a2e3508aSEric Auger #define ENCODE_ID_REG(op0, op1, crn, crm, op2) \ 15*a2e3508aSEric Auger (((op0) << CP_REG_ARM64_SYSREG_OP0_SHIFT) | \ 16*a2e3508aSEric Auger ((op1) << CP_REG_ARM64_SYSREG_OP1_SHIFT) | \ 17*a2e3508aSEric Auger ((crn) << CP_REG_ARM64_SYSREG_CRN_SHIFT) | \ 18*a2e3508aSEric Auger ((crm) << CP_REG_ARM64_SYSREG_CRM_SHIFT) | \ 19*a2e3508aSEric Auger ((op2) << CP_REG_ARM64_SYSREG_OP2_SHIFT)) 20*a2e3508aSEric Auger 21*a2e3508aSEric Auger #define DEF(NAME, OP0, OP1, CRN, CRM, OP2) NAME##_IDX, 22*a2e3508aSEric Auger 23*a2e3508aSEric Auger typedef enum ARMIDRegisterIdx { 24*a2e3508aSEric Auger #include "cpu-sysregs.h.inc" 25*a2e3508aSEric Auger NUM_ID_IDX, 26*a2e3508aSEric Auger } ARMIDRegisterIdx; 27*a2e3508aSEric Auger 28*a2e3508aSEric Auger #undef DEF 29*a2e3508aSEric Auger #define DEF(NAME, OP0, OP1, CRN, CRM, OP2) \ 30*a2e3508aSEric Auger SYS_##NAME = ENCODE_ID_REG(OP0, OP1, CRN, CRM, OP2), 31*a2e3508aSEric Auger 32*a2e3508aSEric Auger typedef enum ARMSysRegs { 33*a2e3508aSEric Auger #include "cpu-sysregs.h.inc" 34*a2e3508aSEric Auger } ARMSysRegs; 35*a2e3508aSEric Auger 36*a2e3508aSEric Auger #undef DEF 37*a2e3508aSEric Auger 38*a2e3508aSEric Auger extern const uint32_t id_register_sysreg[NUM_ID_IDX]; 39*a2e3508aSEric Auger 40*a2e3508aSEric Auger int get_sysreg_idx(ARMSysRegs sysreg); 41*a2e3508aSEric Auger 42*a2e3508aSEric Auger #endif /* ARM_CPU_SYSREGS_H */ 43