1bef6a77fSGustavo Romero /* 2bef6a77fSGustavo Romero * ARM MemTag convenience functions. 3bef6a77fSGustavo Romero * 4bef6a77fSGustavo Romero * This code is licensed under the GNU GPL v2 or later. 5bef6a77fSGustavo Romero * 6bef6a77fSGustavo Romero * SPDX-License-Identifier: LGPL-2.1-or-later 7bef6a77fSGustavo Romero */ 8bef6a77fSGustavo Romero 9bef6a77fSGustavo Romero #ifndef AARCH64_MTE_USER_HELPER_H 10bef6a77fSGustavo Romero #define AARCH64_MTE USER_HELPER_H 11bef6a77fSGustavo Romero 12*a6c0102aSPhilippe Mathieu-Daudé #include "user/abitypes.h" 13*a6c0102aSPhilippe Mathieu-Daudé 14bef6a77fSGustavo Romero #ifndef PR_MTE_TCF_SHIFT 15bef6a77fSGustavo Romero # define PR_MTE_TCF_SHIFT 1 16bef6a77fSGustavo Romero # define PR_MTE_TCF_NONE (0UL << PR_MTE_TCF_SHIFT) 17bef6a77fSGustavo Romero # define PR_MTE_TCF_SYNC (1UL << PR_MTE_TCF_SHIFT) 18bef6a77fSGustavo Romero # define PR_MTE_TCF_ASYNC (2UL << PR_MTE_TCF_SHIFT) 19bef6a77fSGustavo Romero # define PR_MTE_TCF_MASK (3UL << PR_MTE_TCF_SHIFT) 20bef6a77fSGustavo Romero # define PR_MTE_TAG_SHIFT 3 21bef6a77fSGustavo Romero # define PR_MTE_TAG_MASK (0xffffUL << PR_MTE_TAG_SHIFT) 22bef6a77fSGustavo Romero #endif 23bef6a77fSGustavo Romero 24bef6a77fSGustavo Romero /** 25bef6a77fSGustavo Romero * arm_set_mte_tcf0 - Set TCF0 field in SCTLR_EL1 register 26bef6a77fSGustavo Romero * @env: The CPU environment 27bef6a77fSGustavo Romero * @value: The value to be set for the Tag Check Fault in EL0 field. 28bef6a77fSGustavo Romero * 29bef6a77fSGustavo Romero * Only SYNC and ASYNC modes can be selected. If ASYMM mode is given, the SYNC 30bef6a77fSGustavo Romero * mode is selected instead. So, there is no way to set the ASYMM mode. 31bef6a77fSGustavo Romero */ 32bef6a77fSGustavo Romero void arm_set_mte_tcf0(CPUArchState *env, abi_long value); 33bef6a77fSGustavo Romero 34bef6a77fSGustavo Romero #endif /* AARCH64_MTE_USER_HELPER_H */ 35