1 /* 2 * ARM MemTag convenience functions. 3 * 4 * This code is licensed under the GNU GPL v2 or later. 5 * 6 * SPDX-License-Identifier: LGPL-2.1-or-later 7 */ 8 9 #ifndef AARCH64_MTE_USER_HELPER_H 10 #define AARCH64_MTE USER_HELPER_H 11 12 #include "user/abitypes.h" 13 14 #ifndef PR_MTE_TCF_SHIFT 15 # define PR_MTE_TCF_SHIFT 1 16 # define PR_MTE_TCF_NONE (0UL << PR_MTE_TCF_SHIFT) 17 # define PR_MTE_TCF_SYNC (1UL << PR_MTE_TCF_SHIFT) 18 # define PR_MTE_TCF_ASYNC (2UL << PR_MTE_TCF_SHIFT) 19 # define PR_MTE_TCF_MASK (3UL << PR_MTE_TCF_SHIFT) 20 # define PR_MTE_TAG_SHIFT 3 21 # define PR_MTE_TAG_MASK (0xffffUL << PR_MTE_TAG_SHIFT) 22 #endif 23 24 /** 25 * arm_set_mte_tcf0 - Set TCF0 field in SCTLR_EL1 register 26 * @env: The CPU environment 27 * @value: The value to be set for the Tag Check Fault in EL0 field. 28 * 29 * Only SYNC and ASYNC modes can be selected. If ASYMM mode is given, the SYNC 30 * mode is selected instead. So, there is no way to set the ASYMM mode. 31 */ 32 void arm_set_mte_tcf0(CPUArchState *env, abi_long value); 33 34 #endif /* AARCH64_MTE_USER_HELPER_H */ 35