1 /* 2 * ASPEED INTC Controller 3 * 4 * Copyright (C) 2024 ASPEED Technology Inc. 5 * 6 * SPDX-License-Identifier: GPL-2.0-or-later 7 */ 8 #ifndef ASPEED_INTC_H 9 #define ASPEED_INTC_H 10 11 #include "hw/sysbus.h" 12 #include "qom/object.h" 13 #include "hw/or-irq.h" 14 15 #define TYPE_ASPEED_INTC "aspeed.intc" 16 #define TYPE_ASPEED_2700_INTC TYPE_ASPEED_INTC "-ast2700" 17 #define TYPE_ASPEED_2700_INTCIO TYPE_ASPEED_INTC "io-ast2700" 18 OBJECT_DECLARE_TYPE(AspeedINTCState, AspeedINTCClass, ASPEED_INTC) 19 20 #define ASPEED_INTC_MAX_INPINS 10 21 #define ASPEED_INTC_MAX_OUTPINS 19 22 23 typedef struct AspeedINTCIRQ { 24 int inpin_idx; 25 int outpin_idx; 26 int num_outpins; 27 uint32_t enable_reg; 28 uint32_t status_reg; 29 } AspeedINTCIRQ; 30 31 struct AspeedINTCState { 32 /*< private >*/ 33 SysBusDevice parent_obj; 34 35 /*< public >*/ 36 MemoryRegion iomem; 37 MemoryRegion iomem_container; 38 39 uint32_t *regs; 40 OrIRQState orgates[ASPEED_INTC_MAX_INPINS]; 41 qemu_irq output_pins[ASPEED_INTC_MAX_OUTPINS]; 42 43 uint32_t enable[ASPEED_INTC_MAX_INPINS]; 44 uint32_t mask[ASPEED_INTC_MAX_INPINS]; 45 uint32_t pending[ASPEED_INTC_MAX_INPINS]; 46 }; 47 48 struct AspeedINTCClass { 49 SysBusDeviceClass parent_class; 50 51 uint32_t num_lines; 52 uint32_t num_inpins; 53 uint32_t num_outpins; 54 uint64_t mem_size; 55 uint64_t nr_regs; 56 uint64_t reg_offset; 57 const MemoryRegionOps *reg_ops; 58 const AspeedINTCIRQ *irq_table; 59 int irq_table_count; 60 }; 61 62 #endif /* ASPEED_INTC_H */ 63