1 /* 2 * CPU watchpoints 3 * 4 * Copyright (c) 2003 Fabrice Bellard 5 * 6 * This library is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU Lesser General Public 8 * License as published by the Free Software Foundation; either 9 * version 2.1 of the License, or (at your option) any later version. 10 * 11 * This library is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 14 * Lesser General Public License for more details. 15 * 16 * You should have received a copy of the GNU Lesser General Public 17 * License along with this library; if not, see <http://www.gnu.org/licenses/>. 18 */ 19 20 #include "qemu/osdep.h" 21 #include "qemu/main-loop.h" 22 #include "qemu/error-report.h" 23 #include "exec/exec-all.h" 24 #include "exec/page-protection.h" 25 #include "tb-internal.h" 26 #include "system/tcg.h" 27 #include "system/replay.h" 28 #include "hw/core/tcg-cpu-ops.h" 29 #include "hw/core/cpu.h" 30 31 /* 32 * Return true if this watchpoint address matches the specified 33 * access (ie the address range covered by the watchpoint overlaps 34 * partially or completely with the address range covered by the 35 * access). 36 */ 37 static inline bool watchpoint_address_matches(CPUWatchpoint *wp, 38 vaddr addr, vaddr len) 39 { 40 /* 41 * We know the lengths are non-zero, but a little caution is 42 * required to avoid errors in the case where the range ends 43 * exactly at the top of the address space and so addr + len 44 * wraps round to zero. 45 */ 46 vaddr wpend = wp->vaddr + wp->len - 1; 47 vaddr addrend = addr + len - 1; 48 49 return !(addr > wpend || wp->vaddr > addrend); 50 } 51 52 /* Return flags for watchpoints that match addr + prot. */ 53 int cpu_watchpoint_address_matches(CPUState *cpu, vaddr addr, vaddr len) 54 { 55 CPUWatchpoint *wp; 56 int ret = 0; 57 58 QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) { 59 if (watchpoint_address_matches(wp, addr, len)) { 60 ret |= wp->flags; 61 } 62 } 63 return ret; 64 } 65 66 /* Generate a debug exception if a watchpoint has been hit. */ 67 void cpu_check_watchpoint(CPUState *cpu, vaddr addr, vaddr len, 68 MemTxAttrs attrs, int flags, uintptr_t ra) 69 { 70 CPUClass *cc = CPU_GET_CLASS(cpu); 71 CPUWatchpoint *wp; 72 73 assert(tcg_enabled()); 74 if (cpu->watchpoint_hit) { 75 /* 76 * We re-entered the check after replacing the TB. 77 * Now raise the debug interrupt so that it will 78 * trigger after the current instruction. 79 */ 80 bql_lock(); 81 cpu_interrupt(cpu, CPU_INTERRUPT_DEBUG); 82 bql_unlock(); 83 return; 84 } 85 86 if (cc->tcg_ops->adjust_watchpoint_address) { 87 /* this is currently used only by ARM BE32 */ 88 addr = cc->tcg_ops->adjust_watchpoint_address(cpu, addr, len); 89 } 90 91 assert((flags & ~BP_MEM_ACCESS) == 0); 92 QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) { 93 int hit_flags = wp->flags & flags; 94 95 if (hit_flags && watchpoint_address_matches(wp, addr, len)) { 96 if (replay_running_debug()) { 97 /* 98 * replay_breakpoint reads icount. 99 * Force recompile to succeed, because icount may 100 * be read only at the end of the block. 101 */ 102 if (!cpu->neg.can_do_io) { 103 /* Force execution of one insn next time. */ 104 cpu->cflags_next_tb = 1 | CF_NOIRQ | curr_cflags(cpu); 105 cpu_loop_exit_restore(cpu, ra); 106 } 107 /* 108 * Don't process the watchpoints when we are 109 * in a reverse debugging operation. 110 */ 111 replay_breakpoint(); 112 return; 113 } 114 115 wp->flags |= hit_flags << BP_HIT_SHIFT; 116 wp->hitaddr = MAX(addr, wp->vaddr); 117 wp->hitattrs = attrs; 118 119 if (wp->flags & BP_CPU 120 && cc->tcg_ops->debug_check_watchpoint 121 && !cc->tcg_ops->debug_check_watchpoint(cpu, wp)) { 122 wp->flags &= ~BP_WATCHPOINT_HIT; 123 continue; 124 } 125 cpu->watchpoint_hit = wp; 126 127 mmap_lock(); 128 /* This call also restores vCPU state */ 129 tb_check_watchpoint(cpu, ra); 130 if (wp->flags & BP_STOP_BEFORE_ACCESS) { 131 cpu->exception_index = EXCP_DEBUG; 132 mmap_unlock(); 133 cpu_loop_exit(cpu); 134 } else { 135 /* Force execution of one insn next time. */ 136 cpu->cflags_next_tb = 1 | CF_NOIRQ | curr_cflags(cpu); 137 mmap_unlock(); 138 cpu_loop_exit_noexc(cpu); 139 } 140 } else { 141 wp->flags &= ~BP_WATCHPOINT_HIT; 142 } 143 } 144 } 145