xref: /qemu/accel/tcg/watchpoint.c (revision fc524567087c2537b5103cdfc1d41e4f442892b6)
1 /*
2  * CPU watchpoints
3  *
4  *  Copyright (c) 2003 Fabrice Bellard
5  *
6  * This library is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU Lesser General Public
8  * License as published by the Free Software Foundation; either
9  * version 2.1 of the License, or (at your option) any later version.
10  *
11  * This library is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
14  * Lesser General Public License for more details.
15  *
16  * You should have received a copy of the GNU Lesser General Public
17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
18  */
19 
20 #include "qemu/osdep.h"
21 #include "qemu/main-loop.h"
22 #include "exec/breakpoint.h"
23 #include "exec/cpu-interrupt.h"
24 #include "exec/page-protection.h"
25 #include "exec/translation-block.h"
26 #include "system/tcg.h"
27 #include "system/replay.h"
28 #include "accel/tcg/cpu-ops.h"
29 #include "hw/core/cpu.h"
30 #include "internal-common.h"
31 
32 /*
33  * Return true if this watchpoint address matches the specified
34  * access (ie the address range covered by the watchpoint overlaps
35  * partially or completely with the address range covered by the
36  * access).
37  */
watchpoint_address_matches(CPUWatchpoint * wp,vaddr addr,vaddr len)38 static inline bool watchpoint_address_matches(CPUWatchpoint *wp,
39                                               vaddr addr, vaddr len)
40 {
41     /*
42      * We know the lengths are non-zero, but a little caution is
43      * required to avoid errors in the case where the range ends
44      * exactly at the top of the address space and so addr + len
45      * wraps round to zero.
46      */
47     vaddr wpend = wp->vaddr + wp->len - 1;
48     vaddr addrend = addr + len - 1;
49 
50     return !(addr > wpend || wp->vaddr > addrend);
51 }
52 
53 /* Return flags for watchpoints that match addr + prot.  */
cpu_watchpoint_address_matches(CPUState * cpu,vaddr addr,vaddr len)54 int cpu_watchpoint_address_matches(CPUState *cpu, vaddr addr, vaddr len)
55 {
56     CPUWatchpoint *wp;
57     int ret = 0;
58 
59     QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
60         if (watchpoint_address_matches(wp, addr, len)) {
61             ret |= wp->flags;
62         }
63     }
64     return ret;
65 }
66 
67 /* Generate a debug exception if a watchpoint has been hit.  */
cpu_check_watchpoint(CPUState * cpu,vaddr addr,vaddr len,MemTxAttrs attrs,int flags,uintptr_t ra)68 void cpu_check_watchpoint(CPUState *cpu, vaddr addr, vaddr len,
69                           MemTxAttrs attrs, int flags, uintptr_t ra)
70 {
71     CPUWatchpoint *wp;
72 
73     assert(tcg_enabled());
74     if (cpu->watchpoint_hit) {
75         /*
76          * We re-entered the check after replacing the TB.
77          * Now raise the debug interrupt so that it will
78          * trigger after the current instruction.
79          */
80         bql_lock();
81         cpu_interrupt(cpu, CPU_INTERRUPT_DEBUG);
82         bql_unlock();
83         return;
84     }
85 
86     if (cpu->cc->tcg_ops->adjust_watchpoint_address) {
87         /* this is currently used only by ARM BE32 */
88         addr = cpu->cc->tcg_ops->adjust_watchpoint_address(cpu, addr, len);
89     }
90 
91     assert((flags & ~BP_MEM_ACCESS) == 0);
92     QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
93         int hit_flags = wp->flags & flags;
94 
95         if (hit_flags && watchpoint_address_matches(wp, addr, len)) {
96             if (replay_running_debug()) {
97                 /*
98                  * replay_breakpoint reads icount.
99                  * Force recompile to succeed, because icount may
100                  * be read only at the end of the block.
101                  */
102                 if (!cpu->neg.can_do_io) {
103                     /* Force execution of one insn next time.  */
104                     cpu->cflags_next_tb = 1 | CF_NOIRQ | curr_cflags(cpu);
105                     cpu_loop_exit_restore(cpu, ra);
106                 }
107                 /*
108                  * Don't process the watchpoints when we are
109                  * in a reverse debugging operation.
110                  */
111                 replay_breakpoint();
112                 return;
113             }
114 
115             wp->flags |= hit_flags << BP_HIT_SHIFT;
116             wp->hitaddr = MAX(addr, wp->vaddr);
117             wp->hitattrs = attrs;
118 
119             if (wp->flags & BP_CPU
120                 && cpu->cc->tcg_ops->debug_check_watchpoint
121                 && !cpu->cc->tcg_ops->debug_check_watchpoint(cpu, wp)) {
122                 wp->flags &= ~BP_WATCHPOINT_HIT;
123                 continue;
124             }
125             cpu->watchpoint_hit = wp;
126 
127             /* This call also restores vCPU state */
128             tb_check_watchpoint(cpu, ra);
129             if (wp->flags & BP_STOP_BEFORE_ACCESS) {
130                 cpu->exception_index = EXCP_DEBUG;
131                 cpu_loop_exit(cpu);
132             } else {
133                 /* Force execution of one insn next time.  */
134                 cpu->cflags_next_tb = 1 | CF_NOIRQ | curr_cflags(cpu);
135                 cpu_loop_exit_noexc(cpu);
136             }
137         } else {
138             wp->flags &= ~BP_WATCHPOINT_HIT;
139         }
140     }
141 }
142